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be2net: do not call be_set/get_fw_log_level() on Skyhawk-R
Skyhawk-R FW does not support SET/GET_EXT_FAT_CAPABILITIES cmds via which FW logging level can be controlled. Also, the hack used in BE3 to control FW logging level via the ethtool interface is not needed in Skyhawk-R. This patch also cleans up this code by moving be_set/get_fw_log_level() routines to be_cmds.c where they belong. Signed-off-by: Vasundhara Volam <vasundhara.volam@emulex.com> remove new line Signed-off-by: Sathya Perla <sathya.perla@emulex.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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542963b7d7
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@ -3084,6 +3084,76 @@ err:
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return status;
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}
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int be_cmd_set_fw_log_level(struct be_adapter *adapter, u32 level)
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{
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struct be_dma_mem extfat_cmd;
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struct be_fat_conf_params *cfgs;
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int status;
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int i, j;
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memset(&extfat_cmd, 0, sizeof(struct be_dma_mem));
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extfat_cmd.size = sizeof(struct be_cmd_resp_get_ext_fat_caps);
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extfat_cmd.va = pci_alloc_consistent(adapter->pdev, extfat_cmd.size,
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&extfat_cmd.dma);
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if (!extfat_cmd.va)
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return -ENOMEM;
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status = be_cmd_get_ext_fat_capabilites(adapter, &extfat_cmd);
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if (status)
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goto err;
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cfgs = (struct be_fat_conf_params *)
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(extfat_cmd.va + sizeof(struct be_cmd_resp_hdr));
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for (i = 0; i < le32_to_cpu(cfgs->num_modules); i++) {
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u32 num_modes = le32_to_cpu(cfgs->module[i].num_modes);
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for (j = 0; j < num_modes; j++) {
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if (cfgs->module[i].trace_lvl[j].mode == MODE_UART)
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cfgs->module[i].trace_lvl[j].dbg_lvl =
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cpu_to_le32(level);
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}
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}
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status = be_cmd_set_ext_fat_capabilites(adapter, &extfat_cmd, cfgs);
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err:
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pci_free_consistent(adapter->pdev, extfat_cmd.size, extfat_cmd.va,
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extfat_cmd.dma);
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return status;
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}
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int be_cmd_get_fw_log_level(struct be_adapter *adapter)
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{
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struct be_dma_mem extfat_cmd;
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struct be_fat_conf_params *cfgs;
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int status, j;
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int level = 0;
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memset(&extfat_cmd, 0, sizeof(struct be_dma_mem));
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extfat_cmd.size = sizeof(struct be_cmd_resp_get_ext_fat_caps);
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extfat_cmd.va = pci_alloc_consistent(adapter->pdev, extfat_cmd.size,
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&extfat_cmd.dma);
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if (!extfat_cmd.va) {
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dev_err(&adapter->pdev->dev, "%s: Memory allocation failure\n",
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__func__);
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goto err;
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}
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status = be_cmd_get_ext_fat_capabilites(adapter, &extfat_cmd);
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if (!status) {
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cfgs = (struct be_fat_conf_params *)(extfat_cmd.va +
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sizeof(struct be_cmd_resp_hdr));
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for (j = 0; j < le32_to_cpu(cfgs->module[0].num_modes); j++) {
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if (cfgs->module[0].trace_lvl[j].mode == MODE_UART)
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level = cfgs->module[0].trace_lvl[j].dbg_lvl;
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}
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}
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pci_free_consistent(adapter->pdev, extfat_cmd.size, extfat_cmd.va,
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extfat_cmd.dma);
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err:
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return level;
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}
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int be_cmd_get_ext_fat_capabilites(struct be_adapter *adapter,
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struct be_dma_mem *cmd)
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{
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@ -2060,6 +2060,8 @@ int be_cmd_set_hsw_config(struct be_adapter *adapter, u16 pvid, u32 domain,
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int be_cmd_get_hsw_config(struct be_adapter *adapter, u16 *pvid, u32 domain,
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u16 intf_id, u8 *mode);
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int be_cmd_get_acpi_wol_cap(struct be_adapter *adapter);
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int be_cmd_set_fw_log_level(struct be_adapter *adapter, u32 level);
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int be_cmd_get_fw_log_level(struct be_adapter *adapter);
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int be_cmd_get_ext_fat_capabilites(struct be_adapter *adapter,
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struct be_dma_mem *cmd);
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int be_cmd_set_ext_fat_capabilites(struct be_adapter *adapter,
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@ -904,73 +904,21 @@ static u32 be_get_msg_level(struct net_device *netdev)
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{
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struct be_adapter *adapter = netdev_priv(netdev);
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if (lancer_chip(adapter)) {
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dev_err(&adapter->pdev->dev, "Operation not supported\n");
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return -EOPNOTSUPP;
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}
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return adapter->msg_enable;
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}
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static void be_set_fw_log_level(struct be_adapter *adapter, u32 level)
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{
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struct be_dma_mem extfat_cmd;
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struct be_fat_conf_params *cfgs;
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int status;
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int i, j;
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memset(&extfat_cmd, 0, sizeof(struct be_dma_mem));
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extfat_cmd.size = sizeof(struct be_cmd_resp_get_ext_fat_caps);
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extfat_cmd.va = pci_alloc_consistent(adapter->pdev, extfat_cmd.size,
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&extfat_cmd.dma);
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if (!extfat_cmd.va) {
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dev_err(&adapter->pdev->dev, "%s: Memory allocation failure\n",
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__func__);
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goto err;
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}
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status = be_cmd_get_ext_fat_capabilites(adapter, &extfat_cmd);
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if (!status) {
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cfgs = (struct be_fat_conf_params *)(extfat_cmd.va +
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sizeof(struct be_cmd_resp_hdr));
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for (i = 0; i < le32_to_cpu(cfgs->num_modules); i++) {
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u32 num_modes = le32_to_cpu(cfgs->module[i].num_modes);
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for (j = 0; j < num_modes; j++) {
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if (cfgs->module[i].trace_lvl[j].mode ==
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MODE_UART)
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cfgs->module[i].trace_lvl[j].dbg_lvl =
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cpu_to_le32(level);
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}
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}
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status = be_cmd_set_ext_fat_capabilites(adapter, &extfat_cmd,
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cfgs);
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if (status)
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dev_err(&adapter->pdev->dev,
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"Message level set failed\n");
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} else {
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dev_err(&adapter->pdev->dev, "Message level get failed\n");
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}
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pci_free_consistent(adapter->pdev, extfat_cmd.size, extfat_cmd.va,
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extfat_cmd.dma);
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err:
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return;
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}
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static void be_set_msg_level(struct net_device *netdev, u32 level)
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{
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struct be_adapter *adapter = netdev_priv(netdev);
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if (lancer_chip(adapter)) {
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dev_err(&adapter->pdev->dev, "Operation not supported\n");
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return;
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}
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if (adapter->msg_enable == level)
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return;
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if ((level & NETIF_MSG_HW) != (adapter->msg_enable & NETIF_MSG_HW))
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be_set_fw_log_level(adapter, level & NETIF_MSG_HW ?
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FW_LOG_LEVEL_DEFAULT : FW_LOG_LEVEL_FATAL);
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if (BEx_chip(adapter))
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be_cmd_set_fw_log_level(adapter, level & NETIF_MSG_HW ?
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FW_LOG_LEVEL_DEFAULT :
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FW_LOG_LEVEL_FATAL);
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adapter->msg_enable = level;
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return;
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@ -4302,47 +4302,9 @@ bool be_is_wol_supported(struct be_adapter *adapter)
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!be_is_wol_excluded(adapter)) ? true : false;
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}
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u32 be_get_fw_log_level(struct be_adapter *adapter)
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{
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struct be_dma_mem extfat_cmd;
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struct be_fat_conf_params *cfgs;
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int status;
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u32 level = 0;
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int j;
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if (lancer_chip(adapter))
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return 0;
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memset(&extfat_cmd, 0, sizeof(struct be_dma_mem));
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extfat_cmd.size = sizeof(struct be_cmd_resp_get_ext_fat_caps);
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extfat_cmd.va = pci_alloc_consistent(adapter->pdev, extfat_cmd.size,
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&extfat_cmd.dma);
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if (!extfat_cmd.va) {
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dev_err(&adapter->pdev->dev, "%s: Memory allocation failure\n",
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__func__);
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goto err;
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}
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status = be_cmd_get_ext_fat_capabilites(adapter, &extfat_cmd);
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if (!status) {
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cfgs = (struct be_fat_conf_params *)(extfat_cmd.va +
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sizeof(struct be_cmd_resp_hdr));
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for (j = 0; j < le32_to_cpu(cfgs->module[0].num_modes); j++) {
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if (cfgs->module[0].trace_lvl[j].mode == MODE_UART)
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level = cfgs->module[0].trace_lvl[j].dbg_lvl;
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}
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}
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pci_free_consistent(adapter->pdev, extfat_cmd.size, extfat_cmd.va,
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extfat_cmd.dma);
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err:
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return level;
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}
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static int be_get_initial_config(struct be_adapter *adapter)
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{
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int status;
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u32 level;
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int status, level;
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status = be_cmd_get_cntl_attributes(adapter);
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if (status)
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@ -4362,8 +4324,11 @@ static int be_get_initial_config(struct be_adapter *adapter)
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/* Must be a power of 2 or else MODULO will BUG_ON */
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adapter->be_get_temp_freq = 64;
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level = be_get_fw_log_level(adapter);
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adapter->msg_enable = level <= FW_LOG_LEVEL_DEFAULT ? NETIF_MSG_HW : 0;
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if (BEx_chip(adapter)) {
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level = be_cmd_get_fw_log_level(adapter);
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adapter->msg_enable =
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level <= FW_LOG_LEVEL_DEFAULT ? NETIF_MSG_HW : 0;
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}
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adapter->cfg_num_qs = netif_get_num_default_rss_queues();
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return 0;
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