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Staging patches for 3.18-rc1

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Here is the big staging patch set for 3.18-rc1.
 
 Once again, we are deleting more code than we added, with something like
 150000 lines deleted overall.  Some of this is due to drivers being
 added to the networking tree, so the old versions are removed here, but
 even then, the overall difference is quite good.
 
 Other than driver deletions, lots and lots and lots of minor cleanups
 all over the place.  Full details are in the shortlog below.
 
 Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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 Version: GnuPG v2
 
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 iFgAnik8M5tVMm5BNCzbiELz8BDiXPTh
 =otKa
 -----END PGP SIGNATURE-----

Merge tag 'staging-3.18-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/staging

Pull staging updates from Greg KH:
 "Here is the big staging patch set for 3.18-rc1.

  Once again, we are deleting more code than we added, with something
  like 150000 lines deleted overall.  Some of this is due to drivers
  being added to the networking tree, so the old versions are removed
  here, but even then, the overall difference is quite good.

  Other than driver deletions, lots and lots and lots of minor cleanups
  all over the place.  Full details are in the changelog"

* tag 'staging-3.18-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/staging: (1481 commits)
  staging: et131x: Remove et131x driver from drivers/staging
  staging: emxx_udc: Use min_t instead of min
  staging: emxx_udc: Fix replace printk(KERN_DEBUG ..) with dev_dbg
  staging: media: Fixed else after return or break warning
  staging: media: omap4iss: Fixed else after return or break warning
  staging: rtl8712: Fixed else not required after return
  staging: rtl8712: Fix missing blank line warning
  staging: rtl8192e: rtl8192e: Remove spaces before the semicolons
  staging: rtl8192e: rtl8192e: Remove unnecessary return statements
  staging: rtl8192e: Remove unneeded void return
  staging: rtl8192e: Fix void function return statements style
  staging: rtl8712: Fix unnecessary parentheses style warning
  staging: rtl8192e: Fix unnecessary space before function pointer arguments
  staging: rtl8192e: Array was made static const char * const
  staging: ft1000: ft1000-usb: Removed unnecessary else statement.
  staging: ft1000: ft1000-usb: Removed unnecessary else statement.
  staging: ft1000: ft1000-usb: Removed unnecessary parentheses.
  staging: ft1000: ft1000-usb: Added new line after declarations.
  staging: vt6655: Fixed C99 // comment errors in wpactl.c
  staging: speakup: Fixed warning <linux/serial.h> instead of <asm/serial.h>
  ...
This commit is contained in:
Linus Torvalds 2014-10-08 06:50:18 -04:00
commit b9af5643fd
1016 changed files with 27403 additions and 173760 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

7
Documentation/ABI/testing/sysfs-bus-iio-accel-bmc150 Normal file
View File

@ -0,0 +1,7 @@
What: /sys/bus/iio/devices/triggerX/name = "bmc150_accel-any-motion-devX"
KernelVersion: 3.17
Contact: linux-iio@vger.kernel.org
Description:
The BMC150 accelerometer kernel module provides an additional trigger,
which sets driver in a mode, where data is pushed to the buffer
only when there is any motion.

7
Documentation/ABI/testing/sysfs-bus-iio-gyro-bmg160 Normal file
View File

@ -0,0 +1,7 @@
What: /sys/bus/iio/devices/triggerX/name = "bmg160-any-motion-devX"
KernelVersion: 3.17
Contact: linux-iio@vger.kernel.org
Description:
The BMG160 gyro kernel module provides an additional trigger,
which sets driver in a mode, where data is pushed to the buffer
only when there is any motion.

18
Documentation/devicetree/bindings/arm/samsung/exynos-adc.txt
View File

@ -11,13 +11,25 @@ New driver handles the following
Required properties:
- compatible: Must be "samsung,exynos-adc-v1"
for exynos4412/5250 controllers.
for exynos4412/5250 and s5pv210 controllers.
Must be "samsung,exynos-adc-v2" for
future controllers.
Must be "samsung,exynos3250-adc" for
controllers compatible with ADC of Exynos3250.
- reg: Contains ADC register address range (base address and
length) and the address of the phy enable register.
Must be "samsung,s3c2410-adc" for
the ADC in s3c2410 and compatibles
Must be "samsung,s3c2416-adc" for
the ADC in s3c2416 and compatibles
Must be "samsung,s3c2440-adc" for
the ADC in s3c2440 and compatibles
Must be "samsung,s3c2443-adc" for
the ADC in s3c2443 and compatibles
Must be "samsung,s3c6410-adc" for
the ADC in s3c6410 and compatibles
- reg: List of ADC register address range
- The base address and range of ADC register
- The base address and range of ADC_PHY register (every
SoC except for s3c24xx/s3c64xx ADC)
- interrupts: Contains the interrupt information for the timer. The
format is being dependent on which interrupt controller
the Samsung device uses.

24
Documentation/devicetree/bindings/iio/adc/rockchip-saradc.txt Normal file
View File

@ -0,0 +1,24 @@
Rockchip Successive Approximation Register (SAR) A/D Converter bindings
Required properties:
- compatible: Should be "rockchip,saradc"
- reg: physical base address of the controller and length of memory mapped
region.
- interrupts: The interrupt number to the cpu. The interrupt specifier format
depends on the interrupt controller.
- clocks: Must contain an entry for each entry in clock-names.
- clock-names: Shall be "saradc" for the converter-clock, and "apb_pclk" for
the peripheral clock.
- vref-supply: The regulator supply ADC reference voltage.
- #io-channel-cells: Should be 1, see ../iio-bindings.txt
Example:
saradc: saradc@2006c000 {
compatible = "rockchip,saradc";
reg = <0x2006c000 0x100>;
interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru SCLK_SARADC>, <&cru PCLK_SARADC>;
clock-names = "saradc", "apb_pclk";
#io-channel-cells = <1>;
vref-supply = <&vcc18>;
};

14
Documentation/devicetree/bindings/iio/dac/max5821.txt Normal file
View File

@ -0,0 +1,14 @@
Maxim max5821 DAC device driver
Required properties:
- compatible: Must be "maxim,max5821"
- reg: Should contain the DAC I2C address
- vref-supply: Phandle to the vref power supply
Example:
max5821@38 {
compatible = "maxim,max5821";
reg = <0x38>;
vref-supply = <&reg_max5821>;
};

0
Documentation/devicetree/bindings/staging/xillybus.txt → Documentation/devicetree/bindings/xillybus/xillybus.txt
View File

0
drivers/staging/xillybus/README → Documentation/xillybus.txt
View File

28
MAINTAINERS
View File

@ -685,6 +685,17 @@ L: alsa-devel@alsa-project.org (moderated for non-subscribers)
W: http://blackfin.uclinux.org/
S: Supported
F: sound/soc/blackfin/*
ANALOG DEVICES INC IIO DRIVERS
M: Lars-Peter Clausen <lars@metafoo.de>
M: Michael Hennerich <Michael.Hennerich@analog.com>
W: http://wiki.analog.com/
W: http://ez.analog.com/community/linux-device-drivers
S: Supported
F: drivers/iio/*/ad*
X: drivers/iio/*/adjd*
F: drivers/staging/iio/*/ad*
F: staging/iio/trigger/iio-trig-bfin-timer.c
AOA (Apple Onboard Audio) ALSA DRIVER
M: Johannes Berg <johannes@sipsolutions.net>
@ -4617,6 +4628,9 @@ F: drivers/media/rc/iguanair.c
IIO SUBSYSTEM AND DRIVERS
M: Jonathan Cameron <jic23@kernel.org>
R: Hartmut Knaack <knaack.h@gmx.de>
R: Lars-Peter Clausen <lars@metafoo.de>
R: Peter Meerwald <pmeerw@pmeerw.net>
L: linux-iio@vger.kernel.org
S: Maintained
F: drivers/iio/
@ -8722,6 +8736,14 @@ W: http://www.lirc.org/
S: Odd Fixes
F: drivers/staging/media/lirc/
STAGING - LUSTRE PARALLEL FILESYSTEM
M: Oleg Drokin <oleg.drokin@intel.com>
M: Andreas Dilger <andreas.dilger@intel.com>
L: HPDD-discuss@lists.01.org (moderated for non-subscribers)
W: http://lustre.opensfs.org/
S: Maintained
F: drivers/staging/lustre
STAGING - NVIDIA COMPLIANT EMBEDDED CONTROLLER INTERFACE (nvec)
M: Julian Andres Klode <jak@jak-linux.org>
M: Marc Dietrich <marvin24@gmx.de>
@ -10196,6 +10218,12 @@ L: linux-serial@vger.kernel.org
S: Maintained
F: drivers/tty/serial/uartlite.c
XILLYBUS DRIVER
M: Eli Billauer <eli.billauer@gmail.com>
L: linux-kernel@vger.kernel.org
S: Supported
F: drivers/char/xillybus/
XTENSA XTFPGA PLATFORM SUPPORT
M: Max Filippov <jcmvbkbc@gmail.com>
L: linux-xtensa@linux-xtensa.org

2
drivers/char/Kconfig
View File

@ -600,5 +600,7 @@ config TILE_SROM
device appear much like a simple EEPROM, and knows
how to partition a single ROM for multiple purposes.
source "drivers/char/xillybus/Kconfig"
endmenu

1
drivers/char/Makefile
View File

@ -61,3 +61,4 @@ obj-$(CONFIG_JS_RTC) += js-rtc.o
js-rtc-y = rtc.o
obj-$(CONFIG_TILE_SROM) += tile-srom.o
obj-$(CONFIG_XILLYBUS) += xillybus/

0
drivers/staging/xillybus/Kconfig → drivers/char/xillybus/Kconfig
View File

0
drivers/staging/xillybus/Makefile → drivers/char/xillybus/Makefile
View File

1
drivers/staging/xillybus/xillybus.h → drivers/char/xillybus/xillybus.h
View File

@ -146,7 +146,6 @@ struct xilly_mapping {
int direction;
};
irqreturn_t xillybus_isr(int irq, void *data);
struct xilly_endpoint *xillybus_init_endpoint(struct pci_dev *pdev,

366
drivers/staging/xillybus/xillybus_core.c → drivers/char/xillybus/xillybus_core.c
View File

@ -133,30 +133,22 @@ irqreturn_t xillybus_isr(int irq, void *data)
unsigned int msg_channel, msg_bufno, msg_data, msg_dir;
struct xilly_channel *channel;
/*
* The endpoint structure is altered during periods when it's
* guaranteed no interrupt will occur, but in theory, the cache
* lines may not be updated. So a memory barrier is issued.
*/
smp_rmb();
buf = ep->msgbuf_addr;
buf_size = ep->msg_buf_size/sizeof(u32);
ep->ephw->hw_sync_sgl_for_cpu(ep,
ep->msgbuf_dma_addr,
ep->msg_buf_size,
DMA_FROM_DEVICE);
for (i = 0; i < buf_size; i += 2)
for (i = 0; i < buf_size; i += 2) {
if (((buf[i+1] >> 28) & 0xf) != ep->msg_counter) {
malformed_message(ep, &buf[i]);
dev_warn(ep->dev,
"Sending a NACK on counter %x (instead of %x) on entry %d\n",
((buf[i+1] >> 28) & 0xf),
ep->msg_counter,
i/2);
((buf[i+1] >> 28) & 0xf),
ep->msg_counter,
i/2);
if (++ep->failed_messages > 10) {
dev_err(ep->dev,
@ -174,15 +166,16 @@ irqreturn_t xillybus_isr(int irq, void *data)
return IRQ_HANDLED;
} else if (buf[i] & (1 << 22)) /* Last message */
break;
}
if (i >= buf_size) {
dev_err(ep->dev, "Bad interrupt message. Stopping.\n");
return IRQ_HANDLED;
}
buf_size = i;
buf_size = i + 2;
for (i = 0; i <= buf_size; i += 2) { /* Scan through messages */
for (i = 0; i < buf_size; i += 2) { /* Scan through messages */
opcode = (buf[i] >> 24) & 0xff;
msg_dir = buf[i] & 1;
@ -192,7 +185,6 @@ irqreturn_t xillybus_isr(int irq, void *data)
switch (opcode) {
case XILLYMSG_OPCODE_RELEASEBUF:
if ((msg_channel > ep->num_channels) ||
(msg_channel == 0)) {
malformed_message(ep, &buf[i]);
@ -337,10 +329,9 @@ static int xilly_get_dma_buffers(struct xilly_endpoint *ep,
struct xilly_buffer *this_buffer = NULL; /* Init to silence warning */
if (buffers) { /* Not the message buffer */
this_buffer = devm_kzalloc(
dev, bufnum * sizeof(struct xilly_buffer),
GFP_KERNEL);
this_buffer = devm_kcalloc(dev, bufnum,
sizeof(struct xilly_buffer),
GFP_KERNEL);
if (!this_buffer)
return -ENOMEM;
}
@ -372,16 +363,15 @@ static int xilly_get_dma_buffers(struct xilly_endpoint *ep,
dev,
GFP_KERNEL | __GFP_DMA32 | __GFP_ZERO,
allocorder);
if (!s->salami)
return -ENOMEM;
s->left_of_salami = allocsize;
}
rc = ep->ephw->map_single(ep, s->salami,
bytebufsize, s->direction,
&dma_addr);
if (rc)
return rc;
@ -389,7 +379,6 @@ static int xilly_get_dma_buffers(struct xilly_endpoint *ep,
ep->registers + fpga_dma_bufaddr_lowaddr_reg);
iowrite32(((u32) ((((u64) dma_addr) >> 32) & 0xffffffff)),
ep->registers + fpga_dma_bufaddr_highaddr_reg);
mmiowb();
if (buffers) { /* Not the message buffer */
this_buffer->addr = s->salami;
@ -410,13 +399,12 @@ static int xilly_get_dma_buffers(struct xilly_endpoint *ep,
s->left_of_salami -= bytebufsize;
s->salami += bytebufsize;
}
return 0; /* Success */
return 0;
}
static int xilly_setupchannels(struct xilly_endpoint *ep,
unsigned char *chandesc,
int entries
)
int entries)
{
struct device *dev = ep->dev;
int i, entry, rc;
@ -443,18 +431,16 @@ static int xilly_setupchannels(struct xilly_endpoint *ep,
.regdirection = 0x80000000,
};
channel = devm_kzalloc(dev, ep->num_channels *
channel = devm_kcalloc(dev, ep->num_channels,
sizeof(struct xilly_channel), GFP_KERNEL);
if (!channel)
goto memfail;
return -ENOMEM;
ep->channels = devm_kzalloc(dev, (ep->num_channels + 1) *
ep->channels = devm_kcalloc(dev, ep->num_channels + 1,
sizeof(struct xilly_channel *),
GFP_KERNEL);
if (!ep->channels)
goto memfail;
return -ENOMEM;
ep->channels[0] = NULL; /* Channel 0 is message buf. */
@ -526,12 +512,11 @@ static int xilly_setupchannels(struct xilly_endpoint *ep,
bytebufsize = channel->rd_buf_size = bufsize *
(1 << channel->log2_element_size);
buffers = devm_kzalloc(dev,
bufnum * sizeof(struct xilly_buffer *),
GFP_KERNEL);
buffers = devm_kcalloc(dev, bufnum,
sizeof(struct xilly_buffer *),
GFP_KERNEL);
if (!buffers)
goto memfail;
return -ENOMEM;
} else {
bytebufsize = bufsize << 2;
}
@ -566,7 +551,7 @@ static int xilly_setupchannels(struct xilly_endpoint *ep,
}
if (rc)
goto memfail;
return -ENOMEM;
}
if (!msg_buf_done) {
@ -575,15 +560,10 @@ static int xilly_setupchannels(struct xilly_endpoint *ep,
return -ENODEV;
}
return 0;
memfail:
dev_err(ep->dev,
"Failed to assign DMA buffer memory. Aborting.\n");
return -ENOMEM;
}
static void xilly_scan_idt(struct xilly_endpoint *endpoint,
struct xilly_idt_handle *idt_handle)
static int xilly_scan_idt(struct xilly_endpoint *endpoint,
struct xilly_idt_handle *idt_handle)
{
int count = 0;
unsigned char *idt = endpoint->channels[1]->wr_buffers[0]->addr;
@ -607,53 +587,49 @@ static void xilly_scan_idt(struct xilly_endpoint *endpoint,
if (scan > end_of_idt) {
dev_err(endpoint->dev,
"IDT device name list overflow. Aborting.\n");
idt_handle->chandesc = NULL;
return;
return -ENODEV;
}
idt_handle->chandesc = scan;
len = endpoint->idtlen - (3 + ((int) (scan - idt)));
if (len & 0x03) {
idt_handle->chandesc = NULL;
dev_err(endpoint->dev,
"Corrupt IDT device name list. Aborting.\n");
return -ENODEV;
}
idt_handle->entries = len >> 2;
endpoint->num_channels = count;
return 0;
}
static int xilly_obtain_idt(struct xilly_endpoint *endpoint)
{
int rc = 0;
struct xilly_channel *channel;
unsigned char *version;
long t;
channel = endpoint->channels[1]; /* This should be generated ad-hoc */
channel->wr_sleepy = 1;
wmb(); /* Setting wr_sleepy must come before the command */
iowrite32(1 |
(3 << 24), /* Opcode 3 for channel 0 = Send IDT */
endpoint->registers + fpga_buf_ctrl_reg);
mmiowb(); /* Just to appear safe */
(3 << 24), /* Opcode 3 for channel 0 = Send IDT */
endpoint->registers + fpga_buf_ctrl_reg);
wait_event_interruptible_timeout(channel->wr_wait,
(!channel->wr_sleepy),
XILLY_TIMEOUT);
t = wait_event_interruptible_timeout(channel->wr_wait,
(!channel->wr_sleepy),
XILLY_TIMEOUT);
if (channel->wr_sleepy) {
if (t <= 0) {
dev_err(endpoint->dev, "Failed to obtain IDT. Aborting.\n");
if (endpoint->fatal_error)
return -EIO;
rc = -ENODEV;
return rc;
return -ENODEV;
}
endpoint->ephw->hw_sync_sgl_for_cpu(
@ -665,16 +641,14 @@ static int xilly_obtain_idt(struct xilly_endpoint *endpoint)
if (channel->wr_buffers[0]->end_offset != endpoint->idtlen) {
dev_err(endpoint->dev,
"IDT length mismatch (%d != %d). Aborting.\n",
channel->wr_buffers[0]->end_offset, endpoint->idtlen);
rc = -ENODEV;
return rc;
channel->wr_buffers[0]->end_offset, endpoint->idtlen);
return -ENODEV;
}
if (crc32_le(~0, channel->wr_buffers[0]->addr,
endpoint->idtlen+1) != 0) {
dev_err(endpoint->dev, "IDT failed CRC check. Aborting.\n");
rc = -ENODEV;
return rc;
return -ENODEV;
}
version = channel->wr_buffers[0]->addr;
@ -683,12 +657,11 @@ static int xilly_obtain_idt(struct xilly_endpoint *endpoint)
if (*version > 0x82) {
dev_err(endpoint->dev,
"No support for IDT version 0x%02x. Maybe the xillybus driver needs an upgarde. Aborting.\n",
(int) *version);
rc = -ENODEV;
return rc;
*version);
return -ENODEV;
}
return 0; /* Success */
return 0;
}
static ssize_t xillybus_read(struct file *filp, char __user *userbuf,
@ -713,12 +686,9 @@ static ssize_t xillybus_read(struct file *filp, char __user *userbuf,
deadline = jiffies + 1 + XILLY_RX_TIMEOUT;
rc = mutex_lock_interruptible(&channel->wr_mutex);
if (rc)
return rc;
rc = 0; /* Just to be clear about it. Compiler optimizes this out */
while (1) { /* Note that we may drop mutex within this loop */
int bytes_to_do = count - bytes_done;
@ -793,14 +763,11 @@ static ssize_t xillybus_read(struct file *filp, char __user *userbuf,
bytes_done += howmany;
if (bufferdone) {
channel->endpoint->ephw->
hw_sync_sgl_for_device
(
channel->endpoint,
channel->wr_buffers[bufidx]->
dma_addr,
channel->wr_buf_size,
DMA_FROM_DEVICE);
channel->endpoint->ephw->hw_sync_sgl_for_device(
channel->endpoint,
channel->wr_buffers[bufidx]->dma_addr,
channel->wr_buf_size,
DMA_FROM_DEVICE);
/*
* Tell FPGA the buffer is done with. It's an
@ -810,11 +777,10 @@ static ssize_t xillybus_read(struct file *filp, char __user *userbuf,
* the channel-specific mutex.
*/
iowrite32(1 | (channel->chan_num << 1)
| (bufidx << 12),
channel->endpoint->registers +
fpga_buf_ctrl_reg);
mmiowb(); /* Just to appear safe */
iowrite32(1 | (channel->chan_num << 1) |
(bufidx << 12),
channel->endpoint->registers +
fpga_buf_ctrl_reg);
}
if (rc) {
@ -851,7 +817,7 @@ static ssize_t xillybus_read(struct file *filp, char __user *userbuf,
if (ready)
goto desperate;
bytes_done = -EAGAIN;
rc = -EAGAIN;
break;
}
@ -895,26 +861,21 @@ static ssize_t xillybus_read(struct file *filp, char __user *userbuf,
if (channel->wr_synchronous ||
(offsetlimit < (buf_elements - 1))) {
mutex_lock(&channel->endpoint->register_mutex);
iowrite32(offsetlimit,
channel->endpoint->registers +
fpga_buf_offset_reg);
mmiowb();
iowrite32(1 | (channel->chan_num << 1) |
(2 << 24) | /* 2 = offset limit */
(waiting_bufidx << 12),
channel->endpoint->registers +
fpga_buf_ctrl_reg);
mmiowb(); /* Just to appear safe */
(2 << 24) | /* 2 = offset limit */
(waiting_bufidx << 12),
channel->endpoint->registers +
fpga_buf_ctrl_reg);
mutex_unlock(&channel->endpoint->
register_mutex);
}
}
/*
@ -925,7 +886,6 @@ static ssize_t xillybus_read(struct file *filp, char __user *userbuf,
if (!channel->wr_allow_partial ||
(no_time_left && (bytes_done == 0))) {
/*
* This do-loop will run more than once if another
* thread reasserted wr_sleepy before we got the mutex
@ -972,7 +932,7 @@ interrupted: /* Mutex is not held if got here */
(!channel->wr_sleepy),
left_to_sleep);
if (!channel->wr_sleepy)
if (left_to_sleep > 0) /* wr_sleepy deasserted */
continue;
if (left_to_sleep < 0) { /* Interrupt */
@ -997,18 +957,18 @@ desperate:
*/
iowrite32(1 | (channel->chan_num << 1) |
(3 << 24) | /* Opcode 3, flush it all! */
(waiting_bufidx << 12),
channel->endpoint->registers +
fpga_buf_ctrl_reg);
mmiowb(); /* Just to appear safe */
(3 << 24) | /* Opcode 3, flush it all! */
(waiting_bufidx << 12),
channel->endpoint->registers +
fpga_buf_ctrl_reg);
}
/*
* Formally speaking, we should block for data at this point.
* But to keep the code cleaner, we'll just finish the loop,
* make the unlikely check for data, and then block at the
* usual place.
* Reaching here means that we *do* have data in the buffer,
* but the "partial" flag disallows returning less than
* required. And we don't have as much. So loop again,
* which is likely to end up blocking indefinitely until
* enough data has arrived.
*/
}
@ -1017,6 +977,9 @@ desperate:
if (channel->endpoint->fatal_error)
return -EIO;
if (rc)
return rc;
return bytes_done;
}
@ -1029,7 +992,7 @@ desperate:
static int xillybus_myflush(struct xilly_channel *channel, long timeout)
{
int rc = 0;
int rc;
unsigned long flags;
int end_offset_plus1;
@ -1041,7 +1004,6 @@ static int xillybus_myflush(struct xilly_channel *channel, long timeout)
if (channel->endpoint->fatal_error)
return -EIO;
rc = mutex_lock_interruptible(&channel->rd_mutex);
if (rc)
return rc;
@ -1056,7 +1018,9 @@ static int xillybus_myflush(struct xilly_channel *channel, long timeout)
bufidx = channel->rd_host_buf_idx;
bufidx_minus1 = (bufidx == 0) ? channel->num_rd_buffers - 1 : bufidx-1;
bufidx_minus1 = (bufidx == 0) ?
channel->num_rd_buffers - 1 :
bufidx - 1;
end_offset_plus1 = channel->rd_host_buf_pos >>
channel->log2_element_size;
@ -1113,26 +1077,24 @@ static int xillybus_myflush(struct xilly_channel *channel, long timeout)
iowrite32(end_offset_plus1 - 1,
channel->endpoint->registers + fpga_buf_offset_reg);
mmiowb();
iowrite32((channel->chan_num << 1) | /* Channel ID */
(2 << 24) | /* Opcode 2, submit buffer */
(bufidx << 12),
channel->endpoint->registers + fpga_buf_ctrl_reg);
mmiowb(); /* Just to appear safe */
(2 << 24) | /* Opcode 2, submit buffer */
(bufidx << 12),
channel->endpoint->registers + fpga_buf_ctrl_reg);
mutex_unlock(&channel->endpoint->register_mutex);
} else if (bufidx == 0)
} else if (bufidx == 0) {
bufidx = channel->num_rd_buffers - 1;
else
} else {
bufidx--;
}
channel->rd_host_buf_pos = new_rd_host_buf_pos;
if (timeout < 0)
goto done; /* Autoflush */
/*
* bufidx is now the last buffer written to (or equal to
* rd_fpga_buf_idx if buffer was never written to), and
@ -1141,8 +1103,6 @@ static int xillybus_myflush(struct xilly_channel *channel, long timeout)
* If bufidx == channel->rd_fpga_buf_idx we're either empty or full.
*/
rc = 0;
while (1) { /* Loop waiting for draining of buffers */
spin_lock_irqsave(&channel->rd_spinlock, flags);
@ -1173,7 +1133,7 @@ static int xillybus_myflush(struct xilly_channel *channel, long timeout)
(!channel->rd_full),
timeout) == 0) {
dev_warn(channel->endpoint->dev,
"Timed out while flushing. Output data may be lost.\n");
"Timed out while flushing. Output data may be lost.\n");
rc = -ETIMEDOUT;
break;
@ -1211,7 +1171,6 @@ static void xillybus_autoflush(struct work_struct *work)
int rc;
rc = xillybus_myflush(channel, -1);
if (rc == -EINTR)
dev_warn(channel->endpoint->dev,
"Autoflush failed because work queue thread got a signal.\n");
@ -1238,12 +1197,9 @@ static ssize_t xillybus_write(struct file *filp, const char __user *userbuf,
return -EIO;
rc = mutex_lock_interruptible(&channel->rd_mutex);
if (rc)
return rc;
rc = 0; /* Just to be clear about it. Compiler optimizes this out */
while (1) {
int bytes_to_do = count - bytes_done;
@ -1351,26 +1307,23 @@ static ssize_t xillybus_write(struct file *filp, const char __user *userbuf,
bytes_done += howmany;
if (bufferdone) {
channel->endpoint->ephw->
hw_sync_sgl_for_device(
channel->endpoint,
channel->rd_buffers[bufidx]->
dma_addr,
channel->rd_buf_size,
DMA_TO_DEVICE);
channel->endpoint->ephw->hw_sync_sgl_for_device(
channel->endpoint,
channel->rd_buffers[bufidx]->dma_addr,
channel->rd_buf_size,
DMA_TO_DEVICE);
mutex_lock(&channel->endpoint->register_mutex);
iowrite32(end_offset_plus1 - 1,
channel->endpoint->registers +
fpga_buf_offset_reg);
mmiowb();
iowrite32((channel->chan_num << 1) |
(2 << 24) | /* 2 = submit buffer */
(bufidx << 12),
channel->endpoint->registers +
fpga_buf_ctrl_reg);
mmiowb(); /* Just to appear safe */
(2 << 24) | /* 2 = submit buffer */
(bufidx << 12),
channel->endpoint->registers +
fpga_buf_ctrl_reg);
mutex_unlock(&channel->endpoint->
register_mutex);
@ -1411,14 +1364,12 @@ static ssize_t xillybus_write(struct file *filp, const char __user *userbuf,
*/
if (filp->f_flags & O_NONBLOCK) {
bytes_done = -EAGAIN;
rc = -EAGAIN;
break;
}
wait_event_interruptible(channel->rd_wait,
(!channel->rd_full));
if (channel->rd_full) {
if (wait_event_interruptible(channel->rd_wait,
(!channel->rd_full))) {
mutex_unlock(&channel->rd_mutex);
if (channel->endpoint->fatal_error)
@ -1437,6 +1388,12 @@ static ssize_t xillybus_write(struct file *filp, const char __user *userbuf,
&channel->rd_workitem,
XILLY_RX_TIMEOUT);
if (channel->endpoint->fatal_error)
return -EIO;
if (rc)
return rc;
if ((channel->rd_synchronous) && (bytes_done > 0)) {
rc = xillybus_myflush(filp->private_data, 0); /* No timeout */
@ -1444,9 +1401,6 @@ static ssize_t xillybus_write(struct file *filp, const char __user *userbuf,
return rc;
}
if (channel->endpoint->fatal_error)
return -EIO;
return bytes_done;
}
@ -1484,7 +1438,6 @@ static int xillybus_open(struct inode *inode, struct file *filp)
channel = endpoint->channels[1 + minor - endpoint->lowest_minor];
filp->private_data = channel;
/*
* It gets complicated because:
* 1. We don't want to take a mutex we don't have to
@ -1545,7 +1498,6 @@ static int xillybus_open(struct inode *inode, struct file *filp)
goto unlock;
}
if (filp->f_mode & FMODE_READ) {
if (channel->wr_ref_count == 0) { /* First open of file */
/* Move the host to first buffer */
@ -1566,7 +1518,6 @@ static int xillybus_open(struct inode *inode, struct file *filp)
((channel->wr_synchronous & 1) << 23),
channel->endpoint->registers +
fpga_buf_ctrl_reg);
mmiowb(); /* Just to appear safe */
}
channel->wr_ref_count++;
@ -1588,7 +1539,6 @@ static int xillybus_open(struct inode *inode, struct file *filp)
(4 << 24), /* Opcode 4, open channel */
channel->endpoint->registers +
fpga_buf_ctrl_reg);
mmiowb(); /* Just to appear safe */
}
channel->rd_ref_count++;
@ -1609,7 +1559,6 @@ unlock_wr:
static int xillybus_release(struct inode *inode, struct file *filp)
{
int rc;
unsigned long flags;
struct xilly_channel *channel = filp->private_data;
@ -1620,18 +1569,11 @@ static int xillybus_release(struct inode *inode, struct file *filp)
return -EIO;
if (filp->f_mode & FMODE_WRITE) {
rc = mutex_lock_interruptible(&channel->rd_mutex);
if (rc) {
dev_warn(channel->endpoint->dev,
"Failed to close file. Hardware left in messy state.\n");
return rc;
}
mutex_lock(&channel->rd_mutex);
channel->rd_ref_count--;
if (channel->rd_ref_count == 0) {
/*
* We rely on the kernel calling flush()
* before we get here.
@ -1641,28 +1583,20 @@ static int xillybus_release(struct inode *inode, struct file *filp)
(5 << 24), /* Opcode 5, close channel */
channel->endpoint->registers +
fpga_buf_ctrl_reg);
mmiowb(); /* Just to appear safe */
}
mutex_unlock(&channel->rd_mutex);
}
if (filp->f_mode & FMODE_READ) {
rc = mutex_lock_interruptible(&channel->wr_mutex);
if (rc) {
dev_warn(channel->endpoint->dev,
"Failed to close file. Hardware left in messy state.\n");
return rc;
}
mutex_lock(&channel->wr_mutex);
channel->wr_ref_count--;
if (channel->wr_ref_count == 0) {
iowrite32(1 | (channel->chan_num << 1) |
(5 << 24), /* Opcode 5, close channel */
channel->endpoint->registers +
fpga_buf_ctrl_reg);
mmiowb(); /* Just to appear safe */
(5 << 24), /* Opcode 5, close channel */
channel->endpoint->registers +
fpga_buf_ctrl_reg);
/*
* This is crazily cautious: We make sure that not
@ -1723,6 +1657,7 @@ static int xillybus_release(struct inode *inode, struct file *filp)
return 0;
}
static loff_t xillybus_llseek(struct file *filp, loff_t offset, int whence)
{
struct xilly_channel *channel = filp->private_data;
@ -1743,13 +1678,13 @@ static loff_t xillybus_llseek(struct file *filp, loff_t offset, int whence)
mutex_lock(&channel->rd_mutex);
switch (whence) {
case 0:
case SEEK_SET:
pos = offset;
break;
case 1:
case SEEK_CUR:
pos += offset;
break;
case 2:
case SEEK_END:
pos = offset; /* Going to the end => to the beginning */
break;
default:
@ -1767,11 +1702,10 @@ static loff_t xillybus_llseek(struct file *filp, loff_t offset, int whence)
iowrite32(pos >> channel->log2_element_size,
channel->endpoint->registers + fpga_buf_offset_reg);
mmiowb();
iowrite32((channel->chan_num << 1) |
(6 << 24), /* Opcode 6, set address */
channel->endpoint->registers + fpga_buf_ctrl_reg);
mmiowb(); /* Just to appear safe */
mutex_unlock(&channel->endpoint->register_mutex);
@ -1876,10 +1810,9 @@ static int xillybus_init_chrdev(struct xilly_endpoint *endpoint,
rc = alloc_chrdev_region(&dev, 0, /* minor start */
endpoint->num_channels,
xillyname);
if (rc) {
dev_warn(endpoint->dev, "Failed to obtain major/minors");
goto error1;
return rc;
}
endpoint->major = major = MAJOR(dev);
@ -1891,7 +1824,7 @@ static int xillybus_init_chrdev(struct xilly_endpoint *endpoint,
endpoint->num_channels);
if (rc) {
dev_warn(endpoint->dev, "Failed to add cdev. Aborting.\n");
goto error2;
goto unregister_chrdev;
}
idt++;
@ -1916,7 +1849,8 @@ static int xillybus_init_chrdev(struct xilly_endpoint *endpoint,
dev_warn(endpoint->dev,
"Failed to create %s device. Aborting.\n",
devname);
goto error3;
rc = -ENODEV;
goto unroll_device_create;
}
}
@ -1924,15 +1858,14 @@ static int xillybus_init_chrdev(struct xilly_endpoint *endpoint,
endpoint->num_channels);
return 0; /* succeed */
error3:
unroll_device_create:
devnum--; i--;
for (; devnum >= 0; devnum--, i--)
device_destroy(xillybus_class, MKDEV(major, i));
cdev_del(&endpoint->cdev);
error2:
unregister_chrdev:
unregister_chrdev_region(MKDEV(major, minor), endpoint->num_channels);
error1:
return rc;
}
@ -1954,7 +1887,6 @@ static void xillybus_cleanup_chrdev(struct xilly_endpoint *endpoint)
endpoint->num_channels);
}
struct xilly_endpoint *xillybus_init_endpoint(struct pci_dev *pdev,
struct device *dev,
struct xilly_endpoint_hardware
@ -1982,27 +1914,28 @@ EXPORT_SYMBOL(xillybus_init_endpoint);
static int xilly_quiesce(struct xilly_endpoint *endpoint)
{
long t;
endpoint->idtlen = -1;
wmb(); /* Make sure idtlen is set before sending command */
iowrite32((u32) (endpoint->dma_using_dac & 0x0001),
endpoint->registers + fpga_dma_control_reg);
mmiowb();
wait_event_interruptible_timeout(endpoint->ep_wait,
(endpoint->idtlen >= 0),
XILLY_TIMEOUT);
if (endpoint->idtlen < 0) {
t = wait_event_interruptible_timeout(endpoint->ep_wait,
(endpoint->idtlen >= 0),
XILLY_TIMEOUT);
if (t <= 0) {
dev_err(endpoint->dev,
"Failed to quiesce the device on exit.\n");
return -ENODEV;
}
return 0; /* Success */
return 0;
}
int xillybus_endpoint_discovery(struct xilly_endpoint *endpoint)
{
int rc = 0;
int rc;
long t;
void *bootstrap_resources;
int idtbuffersize = (1 << PAGE_SHIFT);
@ -2026,7 +1959,6 @@ int xillybus_endpoint_discovery(struct xilly_endpoint *endpoint)
*/
iowrite32(1, endpoint->registers + fpga_endian_reg);
mmiowb(); /* Writes below are affected by the one above. */
/* Bootstrap phase I: Allocate temporary message buffer */
@ -2037,39 +1969,32 @@ int xillybus_endpoint_discovery(struct xilly_endpoint *endpoint)
endpoint->num_channels = 0;
rc = xilly_setupchannels(endpoint, bogus_idt, 1);
if (rc)
return rc;
/* Clear the message subsystem (and counter in particular) */
iowrite32(0x04, endpoint->registers + fpga_msg_ctrl_reg);
mmiowb();
endpoint->idtlen = -1;
smp_wmb();
/*
* Set DMA 32/64 bit mode, quiesce the device (?!) and get IDT
* buffer size.
*/
iowrite32((u32) (endpoint->dma_using_dac & 0x0001),
endpoint->registers + fpga_dma_control_reg);
mmiowb();
endpoint->registers + fpga_dma_control_reg);
wait_event_interruptible_timeout(endpoint->ep_wait,
(endpoint->idtlen >= 0),
XILLY_TIMEOUT);
if (endpoint->idtlen < 0) {
t = wait_event_interruptible_timeout(endpoint->ep_wait,
(endpoint->idtlen >= 0),
XILLY_TIMEOUT);
if (t <= 0) {
dev_err(endpoint->dev, "No response from FPGA. Aborting.\n");
return -ENODEV;
}
/* Enable DMA */
iowrite32((u32) (0x0002 | (endpoint->dma_using_dac & 0x0001)),
endpoint->registers + fpga_dma_control_reg);
mmiowb();
endpoint->registers + fpga_dma_control_reg);
/* Bootstrap phase II: Allocate buffer for IDT and obtain it */
while (endpoint->idtlen >= idtbuffersize) {
@ -2080,23 +2005,16 @@ int xillybus_endpoint_discovery(struct xilly_endpoint *endpoint)
endpoint->num_channels = 1;
rc = xilly_setupchannels(endpoint, bogus_idt, 2);
if (rc)
goto failed_idt;
smp_wmb();
rc = xilly_obtain_idt(endpoint);
if (rc)
goto failed_idt;
xilly_scan_idt(endpoint, &idt_handle);
if (!idt_handle.chandesc) {
rc = -ENODEV;
rc = xilly_scan_idt(endpoint, &idt_handle);
if (rc)
goto failed_idt;
}
devres_close_group(dev, bootstrap_resources);
@ -2105,12 +2023,9 @@ int xillybus_endpoint_discovery(struct xilly_endpoint *endpoint)
rc = xilly_setupchannels(endpoint,
idt_handle.chandesc,
idt_handle.entries);
if (rc)
goto failed_idt;
smp_wmb(); /* mutex_lock below should suffice, but won't hurt.*/
/*
* endpoint is now completely configured. We put it on the list
* available to open() before registering the char device(s)
@ -2121,7 +2036,6 @@ int xillybus_endpoint_discovery(struct xilly_endpoint *endpoint)
mutex_unlock(&ep_list_lock);
rc = xillybus_init_chrdev(endpoint, idt_handle.idt);
if (rc)
goto failed_chrdevs;
@ -2162,25 +2076,19 @@ EXPORT_SYMBOL(xillybus_endpoint_remove);
static int __init xillybus_init(void)
{
int rc = 0;
mutex_init(&ep_list_lock);
xillybus_class = class_create(THIS_MODULE, xillyname);
if (IS_ERR(xillybus_class)) {
rc = PTR_ERR(xillybus_class);
pr_warn("Failed to register class xillybus\n");
return rc;
}
if (IS_ERR(xillybus_class))
return PTR_ERR(xillybus_class);
xillybus_wq = alloc_workqueue(xillyname, 0, 0);
if (!xillybus_wq) {
class_destroy(xillybus_class);
rc = -ENOMEM;
return -ENOMEM;
}
return rc;
return 0;
}
static void __exit xillybus_exit(void)

5
drivers/staging/xillybus/xillybus_of.c → drivers/char/xillybus/xillybus_of.c
View File

@ -106,9 +106,10 @@ static int xilly_map_single_of(struct xilly_endpoint *ep,
if (rc) {
dma_unmap_single(ep->dev, addr, size, direction);
kfree(this);
return rc;
}
return rc;
return 0;
}
static struct xilly_endpoint_hardware of_hw = {
@ -129,7 +130,7 @@ static int xilly_drv_probe(struct platform_device *op)
{
struct device *dev = &op->dev;
struct xilly_endpoint *endpoint;
int rc = 0;
int rc;
int irq;
struct resource res;
struct xilly_endpoint_hardware *ephw = &of_hw;

16
drivers/staging/xillybus/xillybus_pcie.c → drivers/char/xillybus/xillybus_pcie.c
View File

@ -98,7 +98,7 @@ static int xilly_map_single_pci(struct xilly_endpoint *ep,
int pci_direction;
dma_addr_t addr;
struct xilly_mapping *this;
int rc = 0;
int rc;
this = kzalloc(sizeof(*this), GFP_KERNEL);
if (!this)
@ -121,13 +121,13 @@ static int xilly_map_single_pci(struct xilly_endpoint *ep,
*ret_dma_handle = addr;
rc = devm_add_action(ep->dev, xilly_pci_unmap, this);
if (rc) {
pci_unmap_single(ep->pdev, addr, size, pci_direction);
kfree(this);
return rc;
}
return rc;
return 0;
}
static struct xilly_endpoint_hardware pci_hw = {
@ -138,10 +138,10 @@ static struct xilly_endpoint_hardware pci_hw = {
};
static int xilly_probe(struct pci_dev *pdev,
const struct pci_device_id *ent)
const struct pci_device_id *ent)
{
struct xilly_endpoint *endpoint;
int rc = 0;
int rc;
endpoint = xillybus_init_endpoint(pdev, &pdev->dev, &pci_hw);
@ -151,7 +151,6 @@ static int xilly_probe(struct pci_dev *pdev,
pci_set_drvdata(pdev, endpoint);
rc = pcim_enable_device(pdev);
if (rc) {
dev_err(endpoint->dev,
"pcim_enable_device() failed. Aborting.\n");
@ -187,7 +186,6 @@ static int xilly_probe(struct pci_dev *pdev,
}
rc = devm_request_irq(&pdev->dev, pdev->irq, xillybus_isr, 0,
xillyname, endpoint);
if (rc) {
dev_err(endpoint->dev,
"Failed to register MSI handler. Aborting.\n");
@ -201,9 +199,9 @@ static int xilly_probe(struct pci_dev *pdev,
* nobody and use 32 bits DMA addressing in any case.
*/
if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32)))
if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32))) {
endpoint->dma_using_dac = 0;
else {
} else {
dev_err(endpoint->dev, "Failed to set DMA mask. Aborting.\n");
return -ENODEV;
}

3
drivers/gpu/ipu-v3/Makefile
View File

@ -1,3 +1,4 @@
obj-$(CONFIG_IMX_IPUV3_CORE) += imx-ipu-v3.o
imx-ipu-v3-objs := ipu-common.o ipu-dc.o ipu-di.o ipu-dp.o ipu-dmfc.o ipu-smfc.o
imx-ipu-v3-objs := ipu-common.o ipu-cpmem.o ipu-dc.o ipu-di.o \
ipu-dp.o ipu-dmfc.o ipu-smfc.o

457
drivers/gpu/ipu-v3/ipu-common.c
View File

@ -44,17 +44,6 @@ static inline void ipu_cm_write(struct ipu_soc *ipu, u32 value, unsigned offset)
writel(value, ipu->cm_reg + offset);
}
static inline u32 ipu_idmac_read(struct ipu_soc *ipu, unsigned offset)
{
return readl(ipu->idmac_reg + offset);
}
static inline void ipu_idmac_write(struct ipu_soc *ipu, u32 value,
unsigned offset)
{
writel(value, ipu->idmac_reg + offset);
}
void ipu_srm_dp_sync_update(struct ipu_soc *ipu)
{
u32 val;
@ -65,379 +54,6 @@ void ipu_srm_dp_sync_update(struct ipu_soc *ipu)
}
EXPORT_SYMBOL_GPL(ipu_srm_dp_sync_update);
struct ipu_ch_param __iomem *ipu_get_cpmem(struct ipuv3_channel *channel)
{
struct ipu_soc *ipu = channel->ipu;
return ipu->cpmem_base + channel->num;
}
EXPORT_SYMBOL_GPL(ipu_get_cpmem);
void ipu_cpmem_set_high_priority(struct ipuv3_channel *channel)
{
struct ipu_soc *ipu = channel->ipu;
struct ipu_ch_param __iomem *p = ipu_get_cpmem(channel);
u32 val;
if (ipu->ipu_type == IPUV3EX)
ipu_ch_param_write_field(p, IPU_FIELD_ID, 1);
val = ipu_idmac_read(ipu, IDMAC_CHA_PRI(channel->num));
val |= 1 << (channel->num % 32);
ipu_idmac_write(ipu, val, IDMAC_CHA_PRI(channel->num));
};
EXPORT_SYMBOL_GPL(ipu_cpmem_set_high_priority);
void ipu_ch_param_write_field(struct ipu_ch_param __iomem *base, u32 wbs, u32 v)
{
u32 bit = (wbs >> 8) % 160;
u32 size = wbs & 0xff;
u32 word = (wbs >> 8) / 160;
u32 i = bit / 32;
u32 ofs = bit % 32;
u32 mask = (1 << size) - 1;
u32 val;
pr_debug("%s %d %d %d\n", __func__, word, bit , size);
val = readl(&base->word[word].data[i]);
val &= ~(mask << ofs);
val |= v << ofs;
writel(val, &base->word[word].data[i]);
if ((bit + size - 1) / 32 > i) {
val = readl(&base->word[word].data[i + 1]);
val &= ~(mask >> (ofs ? (32 - ofs) : 0));
val |= v >> (ofs ? (32 - ofs) : 0);
writel(val, &base->word[word].data[i + 1]);
}
}
EXPORT_SYMBOL_GPL(ipu_ch_param_write_field);
u32 ipu_ch_param_read_field(struct ipu_ch_param __iomem *base, u32 wbs)
{
u32 bit = (wbs >> 8) % 160;
u32 size = wbs & 0xff;
u32 word = (wbs >> 8) / 160;
u32 i = bit / 32;
u32 ofs = bit % 32;
u32 mask = (1 << size) - 1;
u32 val = 0;
pr_debug("%s %d %d %d\n", __func__, word, bit , size);
val = (readl(&base->word[word].data[i]) >> ofs) & mask;
if ((bit + size - 1) / 32 > i) {
u32 tmp;
tmp = readl(&base->word[word].data[i + 1]);
tmp &= mask >> (ofs ? (32 - ofs) : 0);
val |= tmp << (ofs ? (32 - ofs) : 0);
}
return val;
}
EXPORT_SYMBOL_GPL(ipu_ch_param_read_field);
int ipu_cpmem_set_format_rgb(struct ipu_ch_param __iomem *p,
const struct ipu_rgb *rgb)
{
int bpp = 0, npb = 0, ro, go, bo, to;
ro = rgb->bits_per_pixel - rgb->red.length - rgb->red.offset;
go = rgb->bits_per_pixel - rgb->green.length - rgb->green.offset;
bo = rgb->bits_per_pixel - rgb->blue.length - rgb->blue.offset;
to = rgb->bits_per_pixel - rgb->transp.length - rgb->transp.offset;
ipu_ch_param_write_field(p, IPU_FIELD_WID0, rgb->red.length - 1);
ipu_ch_param_write_field(p, IPU_FIELD_OFS0, ro);
ipu_ch_param_write_field(p, IPU_FIELD_WID1, rgb->green.length - 1);
ipu_ch_param_write_field(p, IPU_FIELD_OFS1, go);
ipu_ch_param_write_field(p, IPU_FIELD_WID2, rgb->blue.length - 1);
ipu_ch_param_write_field(p, IPU_FIELD_OFS2, bo);
if (rgb->transp.length) {
ipu_ch_param_write_field(p, IPU_FIELD_WID3,
rgb->transp.length - 1);
ipu_ch_param_write_field(p, IPU_FIELD_OFS3, to);
} else {
ipu_ch_param_write_field(p, IPU_FIELD_WID3, 7);
ipu_ch_param_write_field(p, IPU_FIELD_OFS3,
rgb->bits_per_pixel);
}
switch (rgb->bits_per_pixel) {
case 32:
bpp = 0;
npb = 15;
break;
case 24:
bpp = 1;
npb = 19;
break;
case 16:
bpp = 3;
npb = 31;
break;
case 8:
bpp = 5;
npb = 63;
break;
default:
return -EINVAL;
}
ipu_ch_param_write_field(p, IPU_FIELD_BPP, bpp);
ipu_ch_param_write_field(p, IPU_FIELD_NPB, npb);
ipu_ch_param_write_field(p, IPU_FIELD_PFS, 7); /* rgb mode */
return 0;
}
EXPORT_SYMBOL_GPL(ipu_cpmem_set_format_rgb);
int ipu_cpmem_set_format_passthrough(struct ipu_ch_param __iomem *p,
int width)
{
int bpp = 0, npb = 0;
switch (width) {
case 32:
bpp = 0;
npb = 15;
break;
case 24:
bpp = 1;
npb = 19;
break;
case 16:
bpp = 3;
npb = 31;
break;
case 8:
bpp = 5;
npb = 63;
break;
default:
return -EINVAL;
}
ipu_ch_param_write_field(p, IPU_FIELD_BPP, bpp);
ipu_ch_param_write_field(p, IPU_FIELD_NPB, npb);
ipu_ch_param_write_field(p, IPU_FIELD_PFS, 6); /* raw mode */
return 0;
}
EXPORT_SYMBOL_GPL(ipu_cpmem_set_format_passthrough);
void ipu_cpmem_set_yuv_interleaved(struct ipu_ch_param __iomem *p,
u32 pixel_format)
{
switch (pixel_format) {
case V4L2_PIX_FMT_UYVY:
ipu_ch_param_write_field(p, IPU_FIELD_BPP, 3); /* bits/pixel */
ipu_ch_param_write_field(p, IPU_FIELD_PFS, 0xA); /* pix format */
ipu_ch_param_write_field(p, IPU_FIELD_NPB, 31); /* burst size */
break;
case V4L2_PIX_FMT_YUYV:
ipu_ch_param_write_field(p, IPU_FIELD_BPP, 3); /* bits/pixel */
ipu_ch_param_write_field(p, IPU_FIELD_PFS, 0x8); /* pix format */
ipu_ch_param_write_field(p, IPU_FIELD_NPB, 31); /* burst size */
break;
}
}
EXPORT_SYMBOL_GPL(ipu_cpmem_set_yuv_interleaved);
void ipu_cpmem_set_yuv_planar_full(struct ipu_ch_param __iomem *p,
u32 pixel_format, int stride, int u_offset, int v_offset)
{
switch (pixel_format) {
case V4L2_PIX_FMT_YUV420:
ipu_ch_param_write_field(p, IPU_FIELD_SLUV, (stride / 2) - 1);
ipu_ch_param_write_field(p, IPU_FIELD_UBO, u_offset / 8);
ipu_ch_param_write_field(p, IPU_FIELD_VBO, v_offset / 8);
break;
case V4L2_PIX_FMT_YVU420:
ipu_ch_param_write_field(p, IPU_FIELD_SLUV, (stride / 2) - 1);
ipu_ch_param_write_field(p, IPU_FIELD_UBO, v_offset / 8);
ipu_ch_param_write_field(p, IPU_FIELD_VBO, u_offset / 8);
break;
}
}
EXPORT_SYMBOL_GPL(ipu_cpmem_set_yuv_planar_full);
void ipu_cpmem_set_yuv_planar(struct ipu_ch_param __iomem *p, u32 pixel_format,
int stride, int height)
{
int u_offset, v_offset;
int uv_stride = 0;
switch (pixel_format) {
case V4L2_PIX_FMT_YUV420:
case V4L2_PIX_FMT_YVU420:
uv_stride = stride / 2;
u_offset = stride * height;
v_offset = u_offset + (uv_stride * height / 2);
ipu_cpmem_set_yuv_planar_full(p, pixel_format, stride,
u_offset, v_offset);
break;
}
}
EXPORT_SYMBOL_GPL(ipu_cpmem_set_yuv_planar);
static const struct ipu_rgb def_rgb_32 = {
.red = { .offset = 16, .length = 8, },
.green = { .offset = 8, .length = 8, },
.blue = { .offset = 0, .length = 8, },
.transp = { .offset = 24, .length = 8, },
.bits_per_pixel = 32,
};
static const struct ipu_rgb def_bgr_32 = {
.red = { .offset = 0, .length = 8, },
.green = { .offset = 8, .length = 8, },
.blue = { .offset = 16, .length = 8, },
.transp = { .offset = 24, .length = 8, },
.bits_per_pixel = 32,
};
static const struct ipu_rgb def_rgb_24 = {
.red = { .offset = 16, .length = 8, },
.green = { .offset = 8, .length = 8, },
.blue = { .offset = 0, .length = 8, },
.transp = { .offset = 0, .length = 0, },
.bits_per_pixel = 24,
};
static const struct ipu_rgb def_bgr_24 = {
.red = { .offset = 0, .length = 8, },
.green = { .offset = 8, .length = 8, },
.blue = { .offset = 16, .length = 8, },
.transp = { .offset = 0, .length = 0, },
.bits_per_pixel = 24,
};
static const struct ipu_rgb def_rgb_16 = {
.red = { .offset = 11, .length = 5, },
.green = { .offset = 5, .length = 6, },
.blue = { .offset = 0, .length = 5, },
.transp = { .offset = 0, .length = 0, },
.bits_per_pixel = 16,
};
static const struct ipu_rgb def_bgr_16 = {
.red = { .offset = 0, .length = 5, },
.green = { .offset = 5, .length = 6, },
.blue = { .offset = 11, .length = 5, },
.transp = { .offset = 0, .length = 0, },
.bits_per_pixel = 16,
};
#define Y_OFFSET(pix, x, y) ((x) + pix->width * (y))
#define U_OFFSET(pix, x, y) ((pix->width * pix->height) + \
(pix->width * (y) / 4) + (x) / 2)
#define V_OFFSET(pix, x, y) ((pix->width * pix->height) + \
(pix->width * pix->height / 4) + \
(pix->width * (y) / 4) + (x) / 2)
int ipu_cpmem_set_fmt(struct ipu_ch_param __iomem *cpmem, u32 drm_fourcc)
{
switch (drm_fourcc) {
case DRM_FORMAT_YUV420:
case DRM_FORMAT_YVU420:
/* pix format */
ipu_ch_param_write_field(cpmem, IPU_FIELD_PFS, 2);
/* burst size */
ipu_ch_param_write_field(cpmem, IPU_FIELD_NPB, 63);
break;
case DRM_FORMAT_UYVY:
/* bits/pixel */
ipu_ch_param_write_field(cpmem, IPU_FIELD_BPP, 3);
/* pix format */
ipu_ch_param_write_field(cpmem, IPU_FIELD_PFS, 0xA);
/* burst size */
ipu_ch_param_write_field(cpmem, IPU_FIELD_NPB, 31);
break;
case DRM_FORMAT_YUYV:
/* bits/pixel */
ipu_ch_param_write_field(cpmem, IPU_FIELD_BPP, 3);
/* pix format */
ipu_ch_param_write_field(cpmem, IPU_FIELD_PFS, 0x8);
/* burst size */
ipu_ch_param_write_field(cpmem, IPU_FIELD_NPB, 31);
break;
case DRM_FORMAT_ABGR8888:
case DRM_FORMAT_XBGR8888:
ipu_cpmem_set_format_rgb(cpmem, &def_bgr_32);
break;
case DRM_FORMAT_ARGB8888:
case DRM_FORMAT_XRGB8888:
ipu_cpmem_set_format_rgb(cpmem, &def_rgb_32);
break;
case DRM_FORMAT_BGR888:
ipu_cpmem_set_format_rgb(cpmem, &def_bgr_24);
break;
case DRM_FORMAT_RGB888:
ipu_cpmem_set_format_rgb(cpmem, &def_rgb_24);
break;
case DRM_FORMAT_RGB565:
ipu_cpmem_set_format_rgb(cpmem, &def_rgb_16);
break;
case DRM_FORMAT_BGR565:
ipu_cpmem_set_format_rgb(cpmem, &def_bgr_16);
break;
default:
return -EINVAL;
}
return 0;
}
EXPORT_SYMBOL_GPL(ipu_cpmem_set_fmt);
/*
* The V4L2 spec defines packed RGB formats in memory byte order, which from
* point of view of the IPU corresponds to little-endian words with the first
* component in the least significant bits.
* The DRM pixel formats and IPU internal representation are ordered the other
* way around, with the first named component ordered at the most significant
* bits. Further, V4L2 formats are not well defined:
* http://linuxtv.org/downloads/v4l-dvb-apis/packed-rgb.html
* We choose the interpretation which matches GStreamer behavior.
*/
static int v4l2_pix_fmt_to_drm_fourcc(u32 pixelformat)
{
switch (pixelformat) {
case V4L2_PIX_FMT_RGB565:
/*
* Here we choose the 'corrected' interpretation of RGBP, a
* little-endian 16-bit word with the red component at the most
* significant bits:
* g[2:0]b[4:0] r[4:0]g[5:3] <=> [16:0] R:G:B
*/
return DRM_FORMAT_RGB565;
case V4L2_PIX_FMT_BGR24:
/* B G R <=> [24:0] R:G:B */
return DRM_FORMAT_RGB888;
case V4L2_PIX_FMT_RGB24:
/* R G B <=> [24:0] B:G:R */
return DRM_FORMAT_BGR888;
case V4L2_PIX_FMT_BGR32:
/* B G R A <=> [32:0] A:B:G:R */
return DRM_FORMAT_XRGB8888;
case V4L2_PIX_FMT_RGB32:
/* R G B A <=> [32:0] A:B:G:R */
return DRM_FORMAT_XBGR8888;
case V4L2_PIX_FMT_UYVY:
return DRM_FORMAT_UYVY;
case V4L2_PIX_FMT_YUYV:
return DRM_FORMAT_YUYV;
case V4L2_PIX_FMT_YUV420:
return DRM_FORMAT_YUV420;
case V4L2_PIX_FMT_YVU420:
return DRM_FORMAT_YVU420;
}
return -EINVAL;
}
enum ipu_color_space ipu_drm_fourcc_to_colorspace(u32 drm_fourcc)
{
switch (drm_fourcc) {
@ -465,66 +81,6 @@ enum ipu_color_space ipu_drm_fourcc_to_colorspace(u32 drm_fourcc)
}
EXPORT_SYMBOL_GPL(ipu_drm_fourcc_to_colorspace);
int ipu_cpmem_set_image(struct ipu_ch_param __iomem *cpmem,
struct ipu_image *image)
{
struct v4l2_pix_format *pix = &image->pix;
int y_offset, u_offset, v_offset;
pr_debug("%s: resolution: %dx%d stride: %d\n",
__func__, pix->width, pix->height,
pix->bytesperline);
ipu_cpmem_set_resolution(cpmem, image->rect.width,
image->rect.height);
ipu_cpmem_set_stride(cpmem, pix->bytesperline);
ipu_cpmem_set_fmt(cpmem, v4l2_pix_fmt_to_drm_fourcc(pix->pixelformat));
switch (pix->pixelformat) {
case V4L2_PIX_FMT_YUV420:
case V4L2_PIX_FMT_YVU420:
y_offset = Y_OFFSET(pix, image->rect.left, image->rect.top);
u_offset = U_OFFSET(pix, image->rect.left,
image->rect.top) - y_offset;
v_offset = V_OFFSET(pix, image->rect.left,
image->rect.top) - y_offset;
ipu_cpmem_set_yuv_planar_full(cpmem, pix->pixelformat,
pix->bytesperline, u_offset, v_offset);
ipu_cpmem_set_buffer(cpmem, 0, image->phys + y_offset);
break;
case V4L2_PIX_FMT_UYVY:
case V4L2_PIX_FMT_YUYV:
ipu_cpmem_set_buffer(cpmem, 0, image->phys +
image->rect.left * 2 +
image->rect.top * image->pix.bytesperline);
break;
case V4L2_PIX_FMT_RGB32:
case V4L2_PIX_FMT_BGR32:
ipu_cpmem_set_buffer(cpmem, 0, image->phys +
image->rect.left * 4 +
image->rect.top * image->pix.bytesperline);
break;
case V4L2_PIX_FMT_RGB565:
ipu_cpmem_set_buffer(cpmem, 0, image->phys +
image->rect.left * 2 +
image->rect.top * image->pix.bytesperline);
break;
case V4L2_PIX_FMT_RGB24:
case V4L2_PIX_FMT_BGR24:
ipu_cpmem_set_buffer(cpmem, 0, image->phys +
image->rect.left * 3 +
image->rect.top * image->pix.bytesperline);
break;
default:
return -EINVAL;
}
return 0;
}
EXPORT_SYMBOL_GPL(ipu_cpmem_set_image);
enum ipu_color_space ipu_pixelformat_to_colorspace(u32 pixelformat)
{
switch (pixelformat) {
@ -895,6 +451,12 @@ static int ipu_submodules_init(struct ipu_soc *ipu,
struct device *dev = &pdev->dev;
const struct ipu_devtype *devtype = ipu->devtype;
ret = ipu_cpmem_init(ipu, dev, ipu_base + devtype->cpmem_ofs);
if (ret) {
unit = "cpmem";
goto err_cpmem;
}
ret = ipu_di_init(ipu, dev, 0, ipu_base + devtype->disp0_ofs,
IPU_CONF_DI0_EN, ipu_clk);
if (ret) {
@ -949,6 +511,8 @@ err_dc:
err_di_1:
ipu_di_exit(ipu, 0);
err_di_0:
ipu_cpmem_exit(ipu);
err_cpmem:
dev_err(&pdev->dev, "init %s failed with %d\n", unit, ret);
return ret;
}
@ -1025,6 +589,7 @@ static void ipu_submodules_exit(struct ipu_soc *ipu)
ipu_dc_exit(ipu);
ipu_di_exit(ipu, 1);
ipu_di_exit(ipu, 0);
ipu_cpmem_exit(ipu);
}
static int platform_remove_devices_fn(struct device *dev, void *unused)
@ -1265,10 +830,8 @@ static int ipu_probe(struct platform_device *pdev)
ipu->idmac_reg = devm_ioremap(&pdev->dev,
ipu_base + devtype->cm_ofs + IPU_CM_IDMAC_REG_OFS,
PAGE_SIZE);
ipu->cpmem_base = devm_ioremap(&pdev->dev,
ipu_base + devtype->cpmem_ofs, PAGE_SIZE);
if (!ipu->cm_reg || !ipu->idmac_reg || !ipu->cpmem_base)
if (!ipu->cm_reg || !ipu->idmac_reg)
return -ENOMEM;
ipu->clk = devm_clk_get(&pdev->dev, "bus");

597
drivers/gpu/ipu-v3/ipu-cpmem.c Normal file
View File

@ -0,0 +1,597 @@
/*
* Copyright (C) 2012 Mentor Graphics Inc.
* Copyright 2005-2012 Freescale Semiconductor, Inc. All Rights Reserved.
*
* The code contained herein is licensed under the GNU General Public
* License. You may obtain a copy of the GNU General Public License
* Version 2 or later at the following locations:
*
* http://www.opensource.org/licenses/gpl-license.html
* http://www.gnu.org/copyleft/gpl.html
*/
#include <linux/types.h>
#include <linux/bitrev.h>
#include <linux/io.h>
#include <drm/drm_fourcc.h>
#include "ipu-prv.h"
struct ipu_cpmem_word {
u32 data[5];
u32 res[3];
};
struct ipu_ch_param {
struct ipu_cpmem_word word[2];
};
struct ipu_cpmem {
struct ipu_ch_param __iomem *base;
u32 module;
spinlock_t lock;
int use_count;
struct ipu_soc *ipu;
};
#define IPU_CPMEM_WORD(word, ofs, size) ((((word) * 160 + (ofs)) << 8) | (size))
#define IPU_FIELD_UBO IPU_CPMEM_WORD(0, 46, 22)
#define IPU_FIELD_VBO IPU_CPMEM_WORD(0, 68, 22)
#define IPU_FIELD_IOX IPU_CPMEM_WORD(0, 90, 4)
#define IPU_FIELD_RDRW IPU_CPMEM_WORD(0, 94, 1)
#define IPU_FIELD_SO IPU_CPMEM_WORD(0, 113, 1)
#define IPU_FIELD_SLY IPU_CPMEM_WORD(1, 102, 14)
#define IPU_FIELD_SLUV IPU_CPMEM_WORD(1, 128, 14)
#define IPU_FIELD_XV IPU_CPMEM_WORD(0, 0, 10)
#define IPU_FIELD_YV IPU_CPMEM_WORD(0, 10, 9)
#define IPU_FIELD_XB IPU_CPMEM_WORD(0, 19, 13)
#define IPU_FIELD_YB IPU_CPMEM_WORD(0, 32, 12)
#define IPU_FIELD_NSB_B IPU_CPMEM_WORD(0, 44, 1)
#define IPU_FIELD_CF IPU_CPMEM_WORD(0, 45, 1)
#define IPU_FIELD_SX IPU_CPMEM_WORD(0, 46, 12)
#define IPU_FIELD_SY IPU_CPMEM_WORD(0, 58, 11)
#define IPU_FIELD_NS IPU_CPMEM_WORD(0, 69, 10)
#define IPU_FIELD_SDX IPU_CPMEM_WORD(0, 79, 7)
#define IPU_FIELD_SM IPU_CPMEM_WORD(0, 86, 10)
#define IPU_FIELD_SCC IPU_CPMEM_WORD(0, 96, 1)
#define IPU_FIELD_SCE IPU_CPMEM_WORD(0, 97, 1)
#define IPU_FIELD_SDY IPU_CPMEM_WORD(0, 98, 7)
#define IPU_FIELD_SDRX IPU_CPMEM_WORD(0, 105, 1)
#define IPU_FIELD_SDRY IPU_CPMEM_WORD(0, 106, 1)
#define IPU_FIELD_BPP IPU_CPMEM_WORD(0, 107, 3)
#define IPU_FIELD_DEC_SEL IPU_CPMEM_WORD(0, 110, 2)
#define IPU_FIELD_DIM IPU_CPMEM_WORD(0, 112, 1)
#define IPU_FIELD_BNDM IPU_CPMEM_WORD(0, 114, 3)
#define IPU_FIELD_BM IPU_CPMEM_WORD(0, 117, 2)
#define IPU_FIELD_ROT IPU_CPMEM_WORD(0, 119, 1)
#define IPU_FIELD_HF IPU_CPMEM_WORD(0, 120, 1)
#define IPU_FIELD_VF IPU_CPMEM_WORD(0, 121, 1)
#define IPU_FIELD_THE IPU_CPMEM_WORD(0, 122, 1)
#define IPU_FIELD_CAP IPU_CPMEM_WORD(0, 123, 1)
#define IPU_FIELD_CAE IPU_CPMEM_WORD(0, 124, 1)
#define IPU_FIELD_FW IPU_CPMEM_WORD(0, 125, 13)
#define IPU_FIELD_FH IPU_CPMEM_WORD(0, 138, 12)
#define IPU_FIELD_EBA0 IPU_CPMEM_WORD(1, 0, 29)
#define IPU_FIELD_EBA1 IPU_CPMEM_WORD(1, 29, 29)
#define IPU_FIELD_ILO IPU_CPMEM_WORD(1, 58, 20)
#define IPU_FIELD_NPB IPU_CPMEM_WORD(1, 78, 7)
#define IPU_FIELD_PFS IPU_CPMEM_WORD(1, 85, 4)
#define IPU_FIELD_ALU IPU_CPMEM_WORD(1, 89, 1)
#define IPU_FIELD_ALBM IPU_CPMEM_WORD(1, 90, 3)
#define IPU_FIELD_ID IPU_CPMEM_WORD(1, 93, 2)
#define IPU_FIELD_TH IPU_CPMEM_WORD(1, 95, 7)
#define IPU_FIELD_SL IPU_CPMEM_WORD(1, 102, 14)
#define IPU_FIELD_WID0 IPU_CPMEM_WORD(1, 116, 3)
#define IPU_FIELD_WID1 IPU_CPMEM_WORD(1, 119, 3)
#define IPU_FIELD_WID2 IPU_CPMEM_WORD(1, 122, 3)
#define IPU_FIELD_WID3 IPU_CPMEM_WORD(1, 125, 3)
#define IPU_FIELD_OFS0 IPU_CPMEM_WORD(1, 128, 5)
#define IPU_FIELD_OFS1 IPU_CPMEM_WORD(1, 133, 5)
#define IPU_FIELD_OFS2 IPU_CPMEM_WORD(1, 138, 5)
#define IPU_FIELD_OFS3 IPU_CPMEM_WORD(1, 143, 5)
#define IPU_FIELD_SXYS IPU_CPMEM_WORD(1, 148, 1)
#define IPU_FIELD_CRE IPU_CPMEM_WORD(1, 149, 1)
#define IPU_FIELD_DEC_SEL2 IPU_CPMEM_WORD(1, 150, 1)
static inline struct ipu_ch_param __iomem *
ipu_get_cpmem(struct ipuv3_channel *ch)
{
struct ipu_cpmem *cpmem = ch->ipu->cpmem_priv;
return cpmem->base + ch->num;
}
static void ipu_ch_param_write_field(struct ipuv3_channel *ch, u32 wbs, u32 v)
{
struct ipu_ch_param __iomem *base = ipu_get_cpmem(ch);
u32 bit = (wbs >> 8) % 160;
u32 size = wbs & 0xff;
u32 word = (wbs >> 8) / 160;
u32 i = bit / 32;
u32 ofs = bit % 32;
u32 mask = (1 << size) - 1;
u32 val;
pr_debug("%s %d %d %d\n", __func__, word, bit , size);
val = readl(&base->word[word].data[i]);
val &= ~(mask << ofs);
val |= v << ofs;
writel(val, &base->word[word].data[i]);
if ((bit + size - 1) / 32 > i) {
val = readl(&base->word[word].data[i + 1]);
val &= ~(mask >> (ofs ? (32 - ofs) : 0));
val |= v >> (ofs ? (32 - ofs) : 0);
writel(val, &base->word[word].data[i + 1]);
}
}
static u32 ipu_ch_param_read_field(struct ipuv3_channel *ch, u32 wbs)
{
struct ipu_ch_param __iomem *base = ipu_get_cpmem(ch);
u32 bit = (wbs >> 8) % 160;
u32 size = wbs & 0xff;
u32 word = (wbs >> 8) / 160;
u32 i = bit / 32;
u32 ofs = bit % 32;
u32 mask = (1 << size) - 1;
u32 val = 0;
pr_debug("%s %d %d %d\n", __func__, word, bit , size);
val = (readl(&base->word[word].data[i]) >> ofs) & mask;
if ((bit + size - 1) / 32 > i) {
u32 tmp;
tmp = readl(&base->word[word].data[i + 1]);
tmp &= mask >> (ofs ? (32 - ofs) : 0);
val |= tmp << (ofs ? (32 - ofs) : 0);
}
return val;
}
/*
* The V4L2 spec defines packed RGB formats in memory byte order, which from
* point of view of the IPU corresponds to little-endian words with the first
* component in the least significant bits.
* The DRM pixel formats and IPU internal representation are ordered the other
* way around, with the first named component ordered at the most significant
* bits. Further, V4L2 formats are not well defined:
* http://linuxtv.org/downloads/v4l-dvb-apis/packed-rgb.html
* We choose the interpretation which matches GStreamer behavior.
*/
static int v4l2_pix_fmt_to_drm_fourcc(u32 pixelformat)
{
switch (pixelformat) {
case V4L2_PIX_FMT_RGB565:
/*
* Here we choose the 'corrected' interpretation of RGBP, a
* little-endian 16-bit word with the red component at the most
* significant bits:
* g[2:0]b[4:0] r[4:0]g[5:3] <=> [16:0] R:G:B
*/
return DRM_FORMAT_RGB565;
case V4L2_PIX_FMT_BGR24:
/* B G R <=> [24:0] R:G:B */
return DRM_FORMAT_RGB888;
case V4L2_PIX_FMT_RGB24:
/* R G B <=> [24:0] B:G:R */
return DRM_FORMAT_BGR888;
case V4L2_PIX_FMT_BGR32:
/* B G R A <=> [32:0] A:B:G:R */
return DRM_FORMAT_XRGB8888;
case V4L2_PIX_FMT_RGB32:
/* R G B A <=> [32:0] A:B:G:R */
return DRM_FORMAT_XBGR8888;
case V4L2_PIX_FMT_UYVY:
return DRM_FORMAT_UYVY;
case V4L2_PIX_FMT_YUYV:
return DRM_FORMAT_YUYV;
case V4L2_PIX_FMT_YUV420:
return DRM_FORMAT_YUV420;
case V4L2_PIX_FMT_YVU420:
return DRM_FORMAT_YVU420;
}
return -EINVAL;
}
void ipu_cpmem_zero(struct ipuv3_channel *ch)
{
struct ipu_ch_param __iomem *p = ipu_get_cpmem(ch);
void __iomem *base = p;
int i;
for (i = 0; i < sizeof(*p) / sizeof(u32); i++)
writel(0, base + i * sizeof(u32));
}
EXPORT_SYMBOL_GPL(ipu_cpmem_zero);
void ipu_cpmem_set_resolution(struct ipuv3_channel *ch, int xres, int yres)
{
ipu_ch_param_write_field(ch, IPU_FIELD_FW, xres - 1);
ipu_ch_param_write_field(ch, IPU_FIELD_FH, yres - 1);
}
EXPORT_SYMBOL_GPL(ipu_cpmem_set_resolution);
void ipu_cpmem_set_stride(struct ipuv3_channel *ch, int stride)
{
ipu_ch_param_write_field(ch, IPU_FIELD_SLY, stride - 1);
}
EXPORT_SYMBOL_GPL(ipu_cpmem_set_stride);
void ipu_cpmem_set_high_priority(struct ipuv3_channel *ch)
{
struct ipu_soc *ipu = ch->ipu;
u32 val;
if (ipu->ipu_type == IPUV3EX)
ipu_ch_param_write_field(ch, IPU_FIELD_ID, 1);
val = ipu_idmac_read(ipu, IDMAC_CHA_PRI(ch->num));
val |= 1 << (ch->num % 32);
ipu_idmac_write(ipu, val, IDMAC_CHA_PRI(ch->num));
};
EXPORT_SYMBOL_GPL(ipu_cpmem_set_high_priority);
void ipu_cpmem_set_buffer(struct ipuv3_channel *ch, int bufnum, dma_addr_t buf)
{
if (bufnum)
ipu_ch_param_write_field(ch, IPU_FIELD_EBA1, buf >> 3);
else
ipu_ch_param_write_field(ch, IPU_FIELD_EBA0, buf >> 3);
}
EXPORT_SYMBOL_GPL(ipu_cpmem_set_buffer);
void ipu_cpmem_interlaced_scan(struct ipuv3_channel *ch, int stride)
{
ipu_ch_param_write_field(ch, IPU_FIELD_SO, 1);
ipu_ch_param_write_field(ch, IPU_FIELD_ILO, stride / 8);
ipu_ch_param_write_field(ch, IPU_FIELD_SLY, (stride * 2) - 1);
};
EXPORT_SYMBOL_GPL(ipu_cpmem_interlaced_scan);
void ipu_cpmem_set_burstsize(struct ipuv3_channel *ch, int burstsize)
{
ipu_ch_param_write_field(ch, IPU_FIELD_NPB, burstsize - 1);
};
EXPORT_SYMBOL_GPL(ipu_cpmem_set_burstsize);
int ipu_cpmem_set_format_rgb(struct ipuv3_channel *ch,
const struct ipu_rgb *rgb)
{
int bpp = 0, npb = 0, ro, go, bo, to;
ro = rgb->bits_per_pixel - rgb->red.length - rgb->red.offset;
go = rgb->bits_per_pixel - rgb->green.length - rgb->green.offset;
bo = rgb->bits_per_pixel - rgb->blue.length - rgb->blue.offset;
to = rgb->bits_per_pixel - rgb->transp.length - rgb->transp.offset;
ipu_ch_param_write_field(ch, IPU_FIELD_WID0, rgb->red.length - 1);
ipu_ch_param_write_field(ch, IPU_FIELD_OFS0, ro);
ipu_ch_param_write_field(ch, IPU_FIELD_WID1, rgb->green.length - 1);
ipu_ch_param_write_field(ch, IPU_FIELD_OFS1, go);
ipu_ch_param_write_field(ch, IPU_FIELD_WID2, rgb->blue.length - 1);
ipu_ch_param_write_field(ch, IPU_FIELD_OFS2, bo);
if (rgb->transp.length) {
ipu_ch_param_write_field(ch, IPU_FIELD_WID3,
rgb->transp.length - 1);
ipu_ch_param_write_field(ch, IPU_FIELD_OFS3, to);
} else {
ipu_ch_param_write_field(ch, IPU_FIELD_WID3, 7);
ipu_ch_param_write_field(ch, IPU_FIELD_OFS3,
rgb->bits_per_pixel);
}
switch (rgb->bits_per_pixel) {
case 32:
bpp = 0;
npb = 15;
break;
case 24:
bpp = 1;
npb = 19;
break;
case 16:
bpp = 3;
npb = 31;
break;
case 8:
bpp = 5;
npb = 63;
break;
default:
return -EINVAL;
}
ipu_ch_param_write_field(ch, IPU_FIELD_BPP, bpp);
ipu_ch_param_write_field(ch, IPU_FIELD_NPB, npb);
ipu_ch_param_write_field(ch, IPU_FIELD_PFS, 7); /* rgb mode */
return 0;
}
EXPORT_SYMBOL_GPL(ipu_cpmem_set_format_rgb);
int ipu_cpmem_set_format_passthrough(struct ipuv3_channel *ch, int width)
{
int bpp = 0, npb = 0;
switch (width) {
case 32:
bpp = 0;
npb = 15;
break;
case 24:
bpp = 1;
npb = 19;
break;
case 16:
bpp = 3;
npb = 31;
break;
case 8:
bpp = 5;
npb = 63;
break;
default:
return -EINVAL;
}
ipu_ch_param_write_field(ch, IPU_FIELD_BPP, bpp);
ipu_ch_param_write_field(ch, IPU_FIELD_NPB, npb);
ipu_ch_param_write_field(ch, IPU_FIELD_PFS, 6); /* raw mode */
return 0;
}
EXPORT_SYMBOL_GPL(ipu_cpmem_set_format_passthrough);
void ipu_cpmem_set_yuv_interleaved(struct ipuv3_channel *ch, u32 pixel_format)
{
switch (pixel_format) {
case V4L2_PIX_FMT_UYVY:
ipu_ch_param_write_field(ch, IPU_FIELD_BPP, 3); /* bits/pixel */
ipu_ch_param_write_field(ch, IPU_FIELD_PFS, 0xA);/* pix fmt */
ipu_ch_param_write_field(ch, IPU_FIELD_NPB, 31);/* burst size */
break;
case V4L2_PIX_FMT_YUYV:
ipu_ch_param_write_field(ch, IPU_FIELD_BPP, 3); /* bits/pixel */
ipu_ch_param_write_field(ch, IPU_FIELD_PFS, 0x8);/* pix fmt */
ipu_ch_param_write_field(ch, IPU_FIELD_NPB, 31);/* burst size */
break;
}
}
EXPORT_SYMBOL_GPL(ipu_cpmem_set_yuv_interleaved);
void ipu_cpmem_set_yuv_planar_full(struct ipuv3_channel *ch,
u32 pixel_format, int stride,
int u_offset, int v_offset)
{
switch (pixel_format) {
case V4L2_PIX_FMT_YUV420:
ipu_ch_param_write_field(ch, IPU_FIELD_SLUV, (stride / 2) - 1);
ipu_ch_param_write_field(ch, IPU_FIELD_UBO, u_offset / 8);
ipu_ch_param_write_field(ch, IPU_FIELD_VBO, v_offset / 8);
break;
case V4L2_PIX_FMT_YVU420:
ipu_ch_param_write_field(ch, IPU_FIELD_SLUV, (stride / 2) - 1);
ipu_ch_param_write_field(ch, IPU_FIELD_UBO, v_offset / 8);
ipu_ch_param_write_field(ch, IPU_FIELD_VBO, u_offset / 8);
break;
}
}
EXPORT_SYMBOL_GPL(ipu_cpmem_set_yuv_planar_full);
void ipu_cpmem_set_yuv_planar(struct ipuv3_channel *ch,
u32 pixel_format, int stride, int height)
{
int u_offset, v_offset;
int uv_stride = 0;
switch (pixel_format) {
case V4L2_PIX_FMT_YUV420:
case V4L2_PIX_FMT_YVU420:
uv_stride = stride / 2;
u_offset = stride * height;
v_offset = u_offset + (uv_stride * height / 2);
ipu_cpmem_set_yuv_planar_full(ch, pixel_format, stride,
u_offset, v_offset);
break;
}
}
EXPORT_SYMBOL_GPL(ipu_cpmem_set_yuv_planar);
static const struct ipu_rgb def_rgb_32 = {
.red = { .offset = 16, .length = 8, },
.green = { .offset = 8, .length = 8, },
.blue = { .offset = 0, .length = 8, },
.transp = { .offset = 24, .length = 8, },
.bits_per_pixel = 32,
};
static const struct ipu_rgb def_bgr_32 = {
.red = { .offset = 0, .length = 8, },
.green = { .offset = 8, .length = 8, },
.blue = { .offset = 16, .length = 8, },
.transp = { .offset = 24, .length = 8, },
.bits_per_pixel = 32,
};
static const struct ipu_rgb def_rgb_24 = {
.red = { .offset = 16, .length = 8, },
.green = { .offset = 8, .length = 8, },
.blue = { .offset = 0, .length = 8, },
.transp = { .offset = 0, .length = 0, },
.bits_per_pixel = 24,
};
static const struct ipu_rgb def_bgr_24 = {
.red = { .offset = 0, .length = 8, },
.green = { .offset = 8, .length = 8, },
.blue = { .offset = 16, .length = 8, },
.transp = { .offset = 0, .length = 0, },
.bits_per_pixel = 24,
};
static const struct ipu_rgb def_rgb_16 = {
.red = { .offset = 11, .length = 5, },
.green = { .offset = 5, .length = 6, },
.blue = { .offset = 0, .length = 5, },
.transp = { .offset = 0, .length = 0, },
.bits_per_pixel = 16,
};
static const struct ipu_rgb def_bgr_16 = {
.red = { .offset = 0, .length = 5, },
.green = { .offset = 5, .length = 6, },
.blue = { .offset = 11, .length = 5, },
.transp = { .offset = 0, .length = 0, },
.bits_per_pixel = 16,
};
#define Y_OFFSET(pix, x, y) ((x) + pix->width * (y))
#define U_OFFSET(pix, x, y) ((pix->width * pix->height) + \
(pix->width * (y) / 4) + (x) / 2)
#define V_OFFSET(pix, x, y) ((pix->width * pix->height) + \
(pix->width * pix->height / 4) + \
(pix->width * (y) / 4) + (x) / 2)
int ipu_cpmem_set_fmt(struct ipuv3_channel *ch, u32 drm_fourcc)
{
switch (drm_fourcc) {
case DRM_FORMAT_YUV420:
case DRM_FORMAT_YVU420:
/* pix format */
ipu_ch_param_write_field(ch, IPU_FIELD_PFS, 2);
/* burst size */
ipu_ch_param_write_field(ch, IPU_FIELD_NPB, 31);
break;
case DRM_FORMAT_UYVY:
/* bits/pixel */
ipu_ch_param_write_field(ch, IPU_FIELD_BPP, 3);
/* pix format */
ipu_ch_param_write_field(ch, IPU_FIELD_PFS, 0xA);
/* burst size */
ipu_ch_param_write_field(ch, IPU_FIELD_NPB, 31);
break;
case DRM_FORMAT_YUYV:
/* bits/pixel */
ipu_ch_param_write_field(ch, IPU_FIELD_BPP, 3);
/* pix format */
ipu_ch_param_write_field(ch, IPU_FIELD_PFS, 0x8);
/* burst size */
ipu_ch_param_write_field(ch, IPU_FIELD_NPB, 31);
break;
case DRM_FORMAT_ABGR8888:
case DRM_FORMAT_XBGR8888:
ipu_cpmem_set_format_rgb(ch, &def_bgr_32);
break;
case DRM_FORMAT_ARGB8888:
case DRM_FORMAT_XRGB8888:
ipu_cpmem_set_format_rgb(ch, &def_rgb_32);
break;
case DRM_FORMAT_BGR888:
ipu_cpmem_set_format_rgb(ch, &def_bgr_24);
break;
case DRM_FORMAT_RGB888:
ipu_cpmem_set_format_rgb(ch, &def_rgb_24);
break;
case DRM_FORMAT_RGB565:
ipu_cpmem_set_format_rgb(ch, &def_rgb_16);
break;
case DRM_FORMAT_BGR565:
ipu_cpmem_set_format_rgb(ch, &def_bgr_16);
break;
default:
return -EINVAL;
}
return 0;
}
EXPORT_SYMBOL_GPL(ipu_cpmem_set_fmt);
int ipu_cpmem_set_image(struct ipuv3_channel *ch, struct ipu_image *image)
{
struct v4l2_pix_format *pix = &image->pix;
int y_offset, u_offset, v_offset;
pr_debug("%s: resolution: %dx%d stride: %d\n",
__func__, pix->width, pix->height,
pix->bytesperline);
ipu_cpmem_set_resolution(ch, image->rect.width, image->rect.height);
ipu_cpmem_set_stride(ch, pix->bytesperline);
ipu_cpmem_set_fmt(ch, v4l2_pix_fmt_to_drm_fourcc(pix->pixelformat));
switch (pix->pixelformat) {
case V4L2_PIX_FMT_YUV420:
case V4L2_PIX_FMT_YVU420:
y_offset = Y_OFFSET(pix, image->rect.left, image->rect.top);
u_offset = U_OFFSET(pix, image->rect.left,
image->rect.top) - y_offset;
v_offset = V_OFFSET(pix, image->rect.left,
image->rect.top) - y_offset;
ipu_cpmem_set_yuv_planar_full(ch, pix->pixelformat,
pix->bytesperline, u_offset, v_offset);
ipu_cpmem_set_buffer(ch, 0, image->phys + y_offset);
break;
case V4L2_PIX_FMT_UYVY:
case V4L2_PIX_FMT_YUYV:
ipu_cpmem_set_buffer(ch, 0, image->phys +
image->rect.left * 2 +
image->rect.top * image->pix.bytesperline);
break;
case V4L2_PIX_FMT_RGB32:
case V4L2_PIX_FMT_BGR32:
ipu_cpmem_set_buffer(ch, 0, image->phys +
image->rect.left * 4 +
image->rect.top * image->pix.bytesperline);
break;
case V4L2_PIX_FMT_RGB565:
ipu_cpmem_set_buffer(ch, 0, image->phys +
image->rect.left * 2 +
image->rect.top * image->pix.bytesperline);
break;
case V4L2_PIX_FMT_RGB24:
case V4L2_PIX_FMT_BGR24:
ipu_cpmem_set_buffer(ch, 0, image->phys +
image->rect.left * 3 +
image->rect.top * image->pix.bytesperline);
break;
default:
return -EINVAL;
}
return 0;
}
EXPORT_SYMBOL_GPL(ipu_cpmem_set_image);
int ipu_cpmem_init(struct ipu_soc *ipu, struct device *dev, unsigned long base)
{
struct ipu_cpmem *cpmem;
cpmem = devm_kzalloc(dev, sizeof(*cpmem), GFP_KERNEL);
if (!cpmem)
return -ENOMEM;
ipu->cpmem_priv = cpmem;
spin_lock_init(&cpmem->lock);
cpmem->base = devm_ioremap(dev, base, SZ_128K);
if (!cpmem->base)
return -ENOMEM;
dev_dbg(dev, "CPMEM base: 0x%08lx remapped to %p\n",
base, cpmem->base);
cpmem->ipu = ipu;
return 0;
}
void ipu_cpmem_exit(struct ipu_soc *ipu)
{
}

14
drivers/gpu/ipu-v3/ipu-prv.h
View File

@ -148,6 +148,7 @@ struct ipuv3_channel {
struct ipu_soc *ipu;
};
struct ipu_cpmem;
struct ipu_dc_priv;
struct ipu_dmfc_priv;
struct ipu_di;
@ -164,7 +165,6 @@ struct ipu_soc {
void __iomem *cm_reg;
void __iomem *idmac_reg;
struct ipu_ch_param __iomem *cpmem_base;
int usecount;
@ -176,6 +176,7 @@ struct ipu_soc {
int irq_err;
struct irq_domain *domain;
struct ipu_cpmem *cpmem_priv;
struct ipu_dc_priv *dc_priv;
struct ipu_dp_priv *dp_priv;
struct ipu_dmfc_priv *dmfc_priv;
@ -183,6 +184,17 @@ struct ipu_soc {
struct ipu_smfc_priv *smfc_priv;
};
static inline u32 ipu_idmac_read(struct ipu_soc *ipu, unsigned offset)
{
return readl(ipu->idmac_reg + offset);
}
static inline void ipu_idmac_write(struct ipu_soc *ipu, u32 value,
unsigned offset)
{
writel(value, ipu->idmac_reg + offset);
}
void ipu_srm_dp_sync_update(struct ipu_soc *ipu);
int ipu_module_enable(struct ipu_soc *ipu, u32 mask);

24
drivers/iio/accel/Kconfig
View File

@ -6,17 +6,32 @@
menu "Accelerometers"
config BMA180
tristate "Bosch BMA180 3-Axis Accelerometer Driver"
tristate "Bosch BMA180/BMA250 3-Axis Accelerometer Driver"
depends on I2C
select IIO_BUFFER
select IIO_TRIGGERED_BUFFER
help
Say Y here if you want to build a driver for the Bosch BMA180
triaxial acceleration sensor.
Say Y here if you want to build a driver for the Bosch BMA180 or
BMA250 triaxial acceleration sensor.
To compile this driver as a module, choose M here: the
module will be called bma180.
config BMC150_ACCEL
tristate "Bosch BMC150 Accelerometer Driver"
depends on I2C
select IIO_BUFFER
select IIO_TRIGGERED_BUFFER
help
Say yes here to build support for the following Bosch accelerometers:
BMC150, BMI055, BMA250E, BMA222E, BMA255, BMA280.
Currently this only supports the device via an i2c interface.
This is a combo module with both accelerometer and magnetometer.
This driver is only implementing accelerometer part, which has
its own address and register map.
config HID_SENSOR_ACCEL_3D
depends on HID_SENSOR_HUB
select IIO_BUFFER
@ -84,7 +99,8 @@ config KXCJK1013
select IIO_TRIGGERED_BUFFER
help
Say Y here if you want to build a driver for the Kionix KXCJK-1013
triaxial acceleration sensor.
triaxial acceleration sensor. This driver also supports KXCJ9-1008
and KXTJ2-1009.
To compile this driver as a module, choose M here: the module will
be called kxcjk-1013.

1
drivers/iio/accel/Makefile
View File

@ -4,6 +4,7 @@
# When adding new entries keep the list in alphabetical order
obj-$(CONFIG_BMA180) += bma180.o
obj-$(CONFIG_BMC150_ACCEL) += bmc150-accel.o
obj-$(CONFIG_HID_SENSOR_ACCEL_3D) += hid-sensor-accel-3d.o
obj-$(CONFIG_KXCJK1013) += kxcjk-1013.o
obj-$(CONFIG_KXSD9) += kxsd9.o

484
drivers/iio/accel/bma180.c
View File

@ -3,9 +3,15 @@
*
* Copyright 2013 Oleksandr Kravchenko <x0199363@ti.com>
*
* Support for BMA250 (c) Peter Meerwald <pmeerw@pmeerw.net>
*
* This file is subject to the terms and conditions of version 2 of
* the GNU General Public License. See the file COPYING in the main
* directory of this archive for more details.
*
* SPI is not supported by driver
* BMA180: 7-bit I2C slave address 0x40 or 0x41
* BMA250: 7-bit I2C slave address 0x18 or 0x19
*/
#include <linux/module.h>
@ -26,9 +32,37 @@
#define BMA180_DRV_NAME "bma180"
#define BMA180_IRQ_NAME "bma180_event"
enum {
BMA180,
BMA250,
};
struct bma180_data;
struct bma180_part_info {
const struct iio_chan_spec *channels;
unsigned num_channels;
const int *scale_table;
unsigned num_scales;
const int *bw_table;
unsigned num_bw;
u8 int_reset_reg, int_reset_mask;
u8 sleep_reg, sleep_mask;
u8 bw_reg, bw_mask;
u8 scale_reg, scale_mask;
u8 power_reg, power_mask, lowpower_val;
u8 int_enable_reg, int_enable_mask;
u8 softreset_reg;
int (*chip_config)(struct bma180_data *data);
void (*chip_disable)(struct bma180_data *data);
};
/* Register set */
#define BMA180_CHIP_ID 0x00 /* Need to distinguish BMA180 from other */
#define BMA180_ACC_X_LSB 0x02 /* First of 6 registers of accel data */
#define BMA180_TEMP 0x08
#define BMA180_CTRL_REG0 0x0d
#define BMA180_RESET 0x10
#define BMA180_BW_TCS 0x20
@ -49,65 +83,81 @@
#define BMA180_SMP_SKIP BIT(0)
/* Bit masks for registers bit fields */
#define BMA180_RANGE 0x0e /* Range of measured accel values*/
#define BMA180_RANGE 0x0e /* Range of measured accel values */
#define BMA180_BW 0xf0 /* Accel bandwidth */
#define BMA180_MODE_CONFIG 0x03 /* Config operation modes */
/* We have to write this value in reset register to do soft reset */
#define BMA180_RESET_VAL 0xb6
#define BMA_180_ID_REG_VAL 0x03
#define BMA180_ID_REG_VAL 0x03
/* Chip power modes */
#define BMA180_LOW_NOISE 0x00
#define BMA180_LOW_POWER 0x03
#define BMA180_LOW_NOISE_STR "low_noise"
#define BMA180_LOW_POWER_STR "low_power"
#define BMA250_RANGE_REG 0x0f
#define BMA250_BW_REG 0x10
#define BMA250_POWER_REG 0x11
#define BMA250_RESET_REG 0x14
#define BMA250_INT_ENABLE_REG 0x17
#define BMA250_INT_MAP_REG 0x1a
#define BMA250_INT_RESET_REG 0x21
/* Defaults values */
#define BMA180_DEF_PMODE 0
#define BMA180_DEF_BW 20
#define BMA180_DEF_SCALE 2452
/* Available values for sysfs */
#define BMA180_FLP_FREQ_AVAILABLE \
"10 20 40 75 150 300"
#define BMA180_SCALE_AVAILABLE \
"0.001275 0.001863 0.002452 0.003727 0.004903 0.009709 0.019417"
#define BMA250_RANGE_MASK GENMASK(3, 0) /* Range of accel values */
#define BMA250_BW_MASK GENMASK(4, 0) /* Accel bandwidth */
#define BMA250_SUSPEND_MASK BIT(7) /* chip will sleep */
#define BMA250_LOWPOWER_MASK BIT(6)
#define BMA250_DATA_INTEN_MASK BIT(4)
#define BMA250_INT1_DATA_MASK BIT(0)
#define BMA250_INT_RESET_MASK BIT(7) /* Reset pending interrupts */
struct bma180_data {
struct i2c_client *client;
struct iio_trigger *trig;
const struct bma180_part_info *part_info;
struct mutex mutex;
int sleep_state;
bool sleep_state;
int scale;
int bw;
int pmode;
char *buff;
bool pmode;
u8 buff[16]; /* 3x 16-bit + 8-bit + padding + timestamp */
};
enum bma180_axis {
enum bma180_chan {
AXIS_X,
AXIS_Y,
AXIS_Z,
TEMP
};
static int bw_table[] = { 10, 20, 40, 75, 150, 300 }; /* Hz */
static int scale_table[] = { 1275, 1863, 2452, 3727, 4903, 9709, 19417 };
static int bma180_bw_table[] = { 10, 20, 40, 75, 150, 300 }; /* Hz */
static int bma180_scale_table[] = { 1275, 1863, 2452, 3727, 4903, 9709, 19417 };
static int bma180_get_acc_reg(struct bma180_data *data, enum bma180_axis axis)
static int bma250_bw_table[] = { 8, 16, 31, 63, 125, 250 }; /* Hz */
static int bma250_scale_table[] = { 0, 0, 0, 38344, 0, 76590, 0, 0, 153180, 0,
0, 0, 306458 };
static int bma180_get_data_reg(struct bma180_data *data, enum bma180_chan chan)
{
u8 reg = BMA180_ACC_X_LSB + axis * 2;
int ret;
if (data->sleep_state)
return -EBUSY;
ret = i2c_smbus_read_word_data(data->client, reg);
if (ret < 0)
dev_err(&data->client->dev,
"failed to read accel_%c registers\n", 'x' + axis);
switch (chan) {
case TEMP:
ret = i2c_smbus_read_byte_data(data->client, BMA180_TEMP);
if (ret < 0)
dev_err(&data->client->dev, "failed to read temp register\n");
break;
default:
ret = i2c_smbus_read_word_data(data->client,
BMA180_ACC_X_LSB + chan * 2);
if (ret < 0)
dev_err(&data->client->dev,
"failed to read accel_%c register\n",
'x' + chan);
}
return ret;
}
@ -125,7 +175,8 @@ static int bma180_set_bits(struct bma180_data *data, u8 reg, u8 mask, u8 val)
static int bma180_reset_intr(struct bma180_data *data)
{
int ret = bma180_set_bits(data, BMA180_CTRL_REG0, BMA180_RESET_INT, 1);
int ret = bma180_set_bits(data, data->part_info->int_reset_reg,
data->part_info->int_reset_mask, 1);
if (ret)
dev_err(&data->client->dev, "failed to reset interrupt\n");
@ -133,12 +184,10 @@ static int bma180_reset_intr(struct bma180_data *data)
return ret;
}
static int bma180_set_new_data_intr_state(struct bma180_data *data, int state)
static int bma180_set_new_data_intr_state(struct bma180_data *data, bool state)
{
u8 reg_val = state ? BMA180_NEW_DATA_INT : 0x00;
int ret = i2c_smbus_write_byte_data(data->client, BMA180_CTRL_REG3,
reg_val);
int ret = bma180_set_bits(data, data->part_info->int_enable_reg,
data->part_info->int_enable_mask, state);
if (ret)
goto err;
ret = bma180_reset_intr(data);
@ -153,9 +202,10 @@ err:
return ret;
}
static int bma180_set_sleep_state(struct bma180_data *data, int state)
static int bma180_set_sleep_state(struct bma180_data *data, bool state)
{
int ret = bma180_set_bits(data, BMA180_CTRL_REG0, BMA180_SLEEP, state);
int ret = bma180_set_bits(data, data->part_info->sleep_reg,
data->part_info->sleep_mask, state);
if (ret) {
dev_err(&data->client->dev,
@ -167,7 +217,7 @@ static int bma180_set_sleep_state(struct bma180_data *data, int state)
return 0;
}
static int bma180_set_ee_writing_state(struct bma180_data *data, int state)
static int bma180_set_ee_writing_state(struct bma180_data *data, bool state)
{
int ret = bma180_set_bits(data, BMA180_CTRL_REG0, BMA180_EE_W, state);
@ -185,10 +235,10 @@ static int bma180_set_bw(struct bma180_data *data, int val)
if (data->sleep_state)
return -EBUSY;
for (i = 0; i < ARRAY_SIZE(bw_table); ++i) {
if (bw_table[i] == val) {
ret = bma180_set_bits(data,
BMA180_BW_TCS, BMA180_BW, i);
for (i = 0; i < data->part_info->num_bw; ++i) {
if (data->part_info->bw_table[i] == val) {
ret = bma180_set_bits(data, data->part_info->bw_reg,
data->part_info->bw_mask, i);
if (ret) {
dev_err(&data->client->dev,
"failed to set bandwidth\n");
@ -209,10 +259,10 @@ static int bma180_set_scale(struct bma180_data *data, int val)
if (data->sleep_state)
return -EBUSY;
for (i = 0; i < ARRAY_SIZE(scale_table); ++i)
if (scale_table[i] == val) {
ret = bma180_set_bits(data,
BMA180_OFFSET_LSB1, BMA180_RANGE, i);
for (i = 0; i < data->part_info->num_scales; ++i)
if (data->part_info->scale_table[i] == val) {
ret = bma180_set_bits(data, data->part_info->scale_reg,
data->part_info->scale_mask, i);
if (ret) {
dev_err(&data->client->dev,
"failed to set scale\n");
@ -225,11 +275,11 @@ static int bma180_set_scale(struct bma180_data *data, int val)
return -EINVAL;
}
static int bma180_set_pmode(struct bma180_data *data, int mode)
static int bma180_set_pmode(struct bma180_data *data, bool mode)
{
u8 reg_val = mode ? BMA180_LOW_POWER : BMA180_LOW_NOISE;
int ret = bma180_set_bits(data, BMA180_TCO_Z, BMA180_MODE_CONFIG,
reg_val);
u8 reg_val = mode ? data->part_info->lowpower_val : 0;
int ret = bma180_set_bits(data, data->part_info->power_reg,
data->part_info->power_mask, reg_val);
if (ret) {
dev_err(&data->client->dev, "failed to set power mode\n");
@ -243,7 +293,7 @@ static int bma180_set_pmode(struct bma180_data *data, int mode)
static int bma180_soft_reset(struct bma180_data *data)
{
int ret = i2c_smbus_write_byte_data(data->client,
BMA180_RESET, BMA180_RESET_VAL);
data->part_info->softreset_reg, BMA180_RESET_VAL);
if (ret)
dev_err(&data->client->dev, "failed to reset the chip\n");
@ -257,57 +307,86 @@ static int bma180_chip_init(struct bma180_data *data)
int ret = i2c_smbus_read_byte_data(data->client, BMA180_CHIP_ID);
if (ret < 0)
goto err;
if (ret != BMA_180_ID_REG_VAL) {
ret = -ENODEV;
goto err;
}
return ret;
if (ret != BMA180_ID_REG_VAL)
return -ENODEV;
ret = bma180_soft_reset(data);
if (ret)
goto err;
return ret;
/*
* No serial transaction should occur within minimum 10 us
* after soft_reset command
*/
msleep(20);
ret = bma180_set_new_data_intr_state(data, false);
if (ret)
return ret;
return bma180_set_pmode(data, false);
}
static int bma180_chip_config(struct bma180_data *data)
{
int ret = bma180_chip_init(data);
if (ret)
goto err;
ret = bma180_set_bits(data, BMA180_CTRL_REG0, BMA180_DIS_WAKE_UP, 1);
if (ret)
goto err;
ret = bma180_set_ee_writing_state(data, 1);
if (ret)
goto err;
ret = bma180_set_new_data_intr_state(data, 0);
ret = bma180_set_ee_writing_state(data, true);
if (ret)
goto err;
ret = bma180_set_bits(data, BMA180_OFFSET_LSB1, BMA180_SMP_SKIP, 1);
if (ret)
goto err;
ret = bma180_set_pmode(data, BMA180_DEF_PMODE);
ret = bma180_set_bw(data, 20); /* 20 Hz */
if (ret)
goto err;
ret = bma180_set_bw(data, BMA180_DEF_BW);
if (ret)
goto err;
ret = bma180_set_scale(data, BMA180_DEF_SCALE);
ret = bma180_set_scale(data, 2452); /* 2 G */
if (ret)
goto err;
return 0;
err:
dev_err(&data->client->dev, "failed to init the chip\n");
dev_err(&data->client->dev, "failed to config the chip\n");
return ret;
}
static int bma250_chip_config(struct bma180_data *data)
{
int ret = bma180_chip_init(data);
if (ret)
goto err;
ret = bma180_set_bw(data, 16); /* 16 Hz */
if (ret)
goto err;
ret = bma180_set_scale(data, 38344); /* 2 G */
if (ret)
goto err;
ret = bma180_set_bits(data, BMA250_INT_MAP_REG,
BMA250_INT1_DATA_MASK, 1);
if (ret)
goto err;
return 0;
err:
dev_err(&data->client->dev, "failed to config the chip\n");
return ret;
}
static void bma180_chip_disable(struct bma180_data *data)
{
if (bma180_set_new_data_intr_state(data, 0))
if (bma180_set_new_data_intr_state(data, false))
goto err;
if (bma180_set_ee_writing_state(data, 0))
if (bma180_set_ee_writing_state(data, false))
goto err;
if (bma180_set_sleep_state(data, 1))
if (bma180_set_sleep_state(data, true))
goto err;
return;
@ -316,13 +395,64 @@ err:
dev_err(&data->client->dev, "failed to disable the chip\n");
}
static IIO_CONST_ATTR(in_accel_filter_low_pass_3db_frequency_available,
BMA180_FLP_FREQ_AVAILABLE);
static IIO_CONST_ATTR(in_accel_scale_available, BMA180_SCALE_AVAILABLE);
static void bma250_chip_disable(struct bma180_data *data)
{
if (bma180_set_new_data_intr_state(data, false))
goto err;
if (bma180_set_sleep_state(data, true))
goto err;
return;
err:
dev_err(&data->client->dev, "failed to disable the chip\n");
}
static ssize_t bma180_show_avail(char *buf, const int *vals, unsigned n,
bool micros)
{
size_t len = 0;
int i;
for (i = 0; i < n; i++) {
if (!vals[i])
continue;
len += scnprintf(buf + len, PAGE_SIZE - len,
micros ? "0.%06d " : "%d ", vals[i]);
}
buf[len - 1] = '\n';
return len;
}
static ssize_t bma180_show_filter_freq_avail(struct device *dev,
struct device_attribute *attr, char *buf)
{
struct bma180_data *data = iio_priv(dev_to_iio_dev(dev));
return bma180_show_avail(buf, data->part_info->bw_table,
data->part_info->num_bw, false);
}
static ssize_t bma180_show_scale_avail(struct device *dev,
struct device_attribute *attr, char *buf)
{
struct bma180_data *data = iio_priv(dev_to_iio_dev(dev));
return bma180_show_avail(buf, data->part_info->scale_table,
data->part_info->num_scales, true);
}
static IIO_DEVICE_ATTR(in_accel_filter_low_pass_3db_frequency_available,
S_IRUGO, bma180_show_filter_freq_avail, NULL, 0);
static IIO_DEVICE_ATTR(in_accel_scale_available,
S_IRUGO, bma180_show_scale_avail, NULL, 0);
static struct attribute *bma180_attributes[] = {
&iio_const_attr_in_accel_filter_low_pass_3db_frequency_available.dev_attr.attr,
&iio_const_attr_in_accel_scale_available.dev_attr.attr,
&iio_dev_attr_in_accel_filter_low_pass_3db_frequency_available.
dev_attr.attr,
&iio_dev_attr_in_accel_scale_available.dev_attr.attr,
NULL,
};
@ -340,22 +470,35 @@ static int bma180_read_raw(struct iio_dev *indio_dev,
switch (mask) {
case IIO_CHAN_INFO_RAW:
mutex_lock(&data->mutex);
if (iio_buffer_enabled(indio_dev))
ret = -EBUSY;
else
ret = bma180_get_acc_reg(data, chan->scan_index);
if (iio_buffer_enabled(indio_dev)) {
mutex_unlock(&data->mutex);
return -EBUSY;
}
ret = bma180_get_data_reg(data, chan->scan_index);
mutex_unlock(&data->mutex);
if (ret < 0)
return ret;
*val = (s16)ret >> chan->scan_type.shift;
*val = sign_extend32(ret >> chan->scan_type.shift,
chan->scan_type.realbits - 1);
return IIO_VAL_INT;
case IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY:
*val = data->bw;
return IIO_VAL_INT;
case IIO_CHAN_INFO_SCALE:
*val = 0;
*val2 = data->scale;
return IIO_VAL_INT_PLUS_MICRO;
switch (chan->type) {
case IIO_ACCEL:
*val = 0;
*val2 = data->scale;
return IIO_VAL_INT_PLUS_MICRO;
case IIO_TEMP:
*val = 500;
return IIO_VAL_INT;
default:
return -EINVAL;
}
case IIO_CHAN_INFO_OFFSET:
*val = 48; /* 0 LSB @ 24 degree C */
return IIO_VAL_INT;
default:
return -EINVAL;
}
@ -387,33 +530,14 @@ static int bma180_write_raw(struct iio_dev *indio_dev,
}
}
static int bma180_update_scan_mode(struct iio_dev *indio_dev,
const unsigned long *scan_mask)
{
struct bma180_data *data = iio_priv(indio_dev);
if (data->buff)
devm_kfree(&indio_dev->dev, data->buff);
data->buff = devm_kzalloc(&indio_dev->dev,
indio_dev->scan_bytes, GFP_KERNEL);
if (!data->buff)
return -ENOMEM;
return 0;
}
static const struct iio_info bma180_info = {
.attrs = &bma180_attrs_group,
.read_raw = bma180_read_raw,
.write_raw = bma180_write_raw,
.update_scan_mode = bma180_update_scan_mode,
.driver_module = THIS_MODULE,
};
static const char * const bma180_power_modes[] = {
BMA180_LOW_NOISE_STR,
BMA180_LOW_POWER_STR,
};
static const char * const bma180_power_modes[] = { "low_noise", "low_power" };
static int bma180_get_power_mode(struct iio_dev *indio_dev,
const struct iio_chan_spec *chan)
@ -449,7 +573,7 @@ static const struct iio_chan_spec_ext_info bma180_ext_info[] = {
{ },
};
#define BMA180_CHANNEL(_axis) { \
#define BMA180_ACC_CHANNEL(_axis, _bits) { \
.type = IIO_ACCEL, \
.modified = 1, \
.channel2 = IIO_MOD_##_axis, \
@ -459,18 +583,70 @@ static const struct iio_chan_spec_ext_info bma180_ext_info[] = {
.scan_index = AXIS_##_axis, \
.scan_type = { \
.sign = 's', \
.realbits = 14, \
.realbits = _bits, \
.storagebits = 16, \
.shift = 2, \
.shift = 16 - _bits, \
}, \
.ext_info = bma180_ext_info, \
}
#define BMA180_TEMP_CHANNEL { \
.type = IIO_TEMP, \
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
BIT(IIO_CHAN_INFO_SCALE) | BIT(IIO_CHAN_INFO_OFFSET), \
.scan_index = TEMP, \
.scan_type = { \
.sign = 's', \
.realbits = 8, \
.storagebits = 16, \
}, \
}
static const struct iio_chan_spec bma180_channels[] = {
BMA180_CHANNEL(X),
BMA180_CHANNEL(Y),
BMA180_CHANNEL(Z),
IIO_CHAN_SOFT_TIMESTAMP(3),
BMA180_ACC_CHANNEL(X, 14),
BMA180_ACC_CHANNEL(Y, 14),
BMA180_ACC_CHANNEL(Z, 14),
BMA180_TEMP_CHANNEL,
IIO_CHAN_SOFT_TIMESTAMP(4),
};
static const struct iio_chan_spec bma250_channels[] = {
BMA180_ACC_CHANNEL(X, 10),
BMA180_ACC_CHANNEL(Y, 10),
BMA180_ACC_CHANNEL(Z, 10),
BMA180_TEMP_CHANNEL,
IIO_CHAN_SOFT_TIMESTAMP(4),
};
static const struct bma180_part_info bma180_part_info[] = {
[BMA180] = {
bma180_channels, ARRAY_SIZE(bma180_channels),
bma180_scale_table, ARRAY_SIZE(bma180_scale_table),
bma180_bw_table, ARRAY_SIZE(bma180_bw_table),
BMA180_CTRL_REG0, BMA180_RESET_INT,
BMA180_CTRL_REG0, BMA180_SLEEP,
BMA180_BW_TCS, BMA180_BW,
BMA180_OFFSET_LSB1, BMA180_RANGE,
BMA180_TCO_Z, BMA180_MODE_CONFIG, BMA180_LOW_POWER,
BMA180_CTRL_REG3, BMA180_NEW_DATA_INT,
BMA180_RESET,
bma180_chip_config,
bma180_chip_disable,
},
[BMA250] = {
bma250_channels, ARRAY_SIZE(bma250_channels),
bma250_scale_table, ARRAY_SIZE(bma250_scale_table),
bma250_bw_table, ARRAY_SIZE(bma250_bw_table),
BMA250_INT_RESET_REG, BMA250_INT_RESET_MASK,
BMA250_POWER_REG, BMA250_SUSPEND_MASK,
BMA250_BW_REG, BMA250_BW_MASK,
BMA250_RANGE_REG, BMA250_RANGE_MASK,
BMA250_POWER_REG, BMA250_LOWPOWER_MASK, 1,
BMA250_INT_ENABLE_REG, BMA250_DATA_INTEN_MASK,
BMA250_RESET_REG,
bma250_chip_config,
bma250_chip_disable,
},
};
static irqreturn_t bma180_trigger_handler(int irq, void *p)
@ -485,13 +661,14 @@ static irqreturn_t bma180_trigger_handler(int irq, void *p)
for_each_set_bit(bit, indio_dev->buffer->scan_mask,
indio_dev->masklength) {
ret = bma180_get_acc_reg(data, bit);
ret = bma180_get_data_reg(data, bit);
if (ret < 0) {
mutex_unlock(&data->mutex);
goto err;
}
((s16 *)data->buff)[i++] = ret;
}
mutex_unlock(&data->mutex);
iio_push_to_buffers_with_timestamp(indio_dev, data->buff, time_ns);
@ -529,7 +706,6 @@ static int bma180_probe(struct i2c_client *client,
{
struct bma180_data *data;
struct iio_dev *indio_dev;
struct iio_trigger *trig;
int ret;
indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data));
@ -539,44 +715,46 @@ static int bma180_probe(struct i2c_client *client,
data = iio_priv(indio_dev);
i2c_set_clientdata(client, indio_dev);
data->client = client;
data->part_info = &bma180_part_info[id->driver_data];
ret = bma180_chip_init(data);
ret = data->part_info->chip_config(data);
if (ret < 0)
goto err_chip_disable;
mutex_init(&data->mutex);
indio_dev->dev.parent = &client->dev;
indio_dev->channels = bma180_channels;
indio_dev->num_channels = ARRAY_SIZE(bma180_channels);
indio_dev->name = BMA180_DRV_NAME;
indio_dev->channels = data->part_info->channels;
indio_dev->num_channels = data->part_info->num_channels;
indio_dev->name = id->name;
indio_dev->modes = INDIO_DIRECT_MODE;
indio_dev->info = &bma180_info;
trig = iio_trigger_alloc("%s-dev%d", indio_dev->name, indio_dev->id);
if (!trig) {
ret = -ENOMEM;
goto err_chip_disable;
if (client->irq > 0) {
data->trig = iio_trigger_alloc("%s-dev%d", indio_dev->name,
indio_dev->id);
if (!data->trig) {
ret = -ENOMEM;
goto err_chip_disable;
}
ret = devm_request_irq(&client->dev, client->irq,
iio_trigger_generic_data_rdy_poll, IRQF_TRIGGER_RISING,
"bma180_event", data->trig);
if (ret) {
dev_err(&client->dev, "unable to request IRQ\n");
goto err_trigger_free;
}
data->trig->dev.parent = &client->dev;
data->trig->ops = &bma180_trigger_ops;
iio_trigger_set_drvdata(data->trig, indio_dev);
indio_dev->trig = iio_trigger_get(data->trig);
ret = iio_trigger_register(data->trig);
if (ret)
goto err_trigger_free;
}
ret = devm_request_irq(&client->dev, client->irq,
iio_trigger_generic_data_rdy_poll,
IRQF_TRIGGER_RISING, BMA180_IRQ_NAME, trig);
if (ret) {
dev_err(&client->dev, "unable to request IRQ\n");
goto err_trigger_free;
}
trig->dev.parent = &client->dev;
trig->ops = &bma180_trigger_ops;
iio_trigger_set_drvdata(trig, indio_dev);
data->trig = trig;
indio_dev->trig = iio_trigger_get(trig);
ret = iio_trigger_register(trig);
if (ret)
goto err_trigger_free;
ret = iio_triggered_buffer_setup(indio_dev, NULL,
bma180_trigger_handler, NULL);
if (ret < 0) {
@ -595,11 +773,12 @@ static int bma180_probe(struct i2c_client *client,
err_buffer_cleanup:
iio_triggered_buffer_cleanup(indio_dev);
err_trigger_unregister:
iio_trigger_unregister(trig);
if (data->trig)
iio_trigger_unregister(data->trig);
err_trigger_free:
iio_trigger_free(trig);
iio_trigger_free(data->trig);
err_chip_disable:
bma180_chip_disable(data);
data->part_info->chip_disable(data);
return ret;
}
@ -611,11 +790,13 @@ static int bma180_remove(struct i2c_client *client)
iio_device_unregister(indio_dev);
iio_triggered_buffer_cleanup(indio_dev);
iio_trigger_unregister(data->trig);
iio_trigger_free(data->trig);
if (data->trig) {
iio_trigger_unregister(data->trig);
iio_trigger_free(data->trig);
}
mutex_lock(&data->mutex);
bma180_chip_disable(data);
data->part_info->chip_disable(data);
mutex_unlock(&data->mutex);
return 0;
@ -629,7 +810,7 @@ static int bma180_suspend(struct device *dev)
int ret;
mutex_lock(&data->mutex);
ret = bma180_set_sleep_state(data, 1);
ret = bma180_set_sleep_state(data, true);
mutex_unlock(&data->mutex);
return ret;
@ -642,7 +823,7 @@ static int bma180_resume(struct device *dev)
int ret;
mutex_lock(&data->mutex);
ret = bma180_set_sleep_state(data, 0);
ret = bma180_set_sleep_state(data, false);
mutex_unlock(&data->mutex);
return ret;
@ -654,27 +835,28 @@ static SIMPLE_DEV_PM_OPS(bma180_pm_ops, bma180_suspend, bma180_resume);
#define BMA180_PM_OPS NULL
#endif
static struct i2c_device_id bma180_id[] = {
{ BMA180_DRV_NAME, 0 },
static struct i2c_device_id bma180_ids[] = {
{ "bma180", BMA180 },
{ "bma250", BMA250 },
{ }
};
MODULE_DEVICE_TABLE(i2c, bma180_id);
MODULE_DEVICE_TABLE(i2c, bma180_ids);
static struct i2c_driver bma180_driver = {
.driver = {
.name = BMA180_DRV_NAME,
.name = "bma180",
.owner = THIS_MODULE,
.pm = BMA180_PM_OPS,
},
.probe = bma180_probe,
.remove = bma180_remove,
.id_table = bma180_id,
.id_table = bma180_ids,
};
module_i2c_driver(bma180_driver);
MODULE_AUTHOR("Kravchenko Oleksandr <x0199363@ti.com>");
MODULE_AUTHOR("Texas Instruments, Inc.");
MODULE_DESCRIPTION("Bosch BMA180 triaxial acceleration sensor");
MODULE_DESCRIPTION("Bosch BMA180/BMA250 triaxial acceleration sensor");
MODULE_LICENSE("GPL");

1430
drivers/iio/accel/bmc150-accel.c Normal file
View File

File diff suppressed because it is too large Load Diff

1
drivers/iio/accel/hid-sensor-accel-3d.c
View File

@ -419,7 +419,6 @@ static struct platform_driver hid_accel_3d_platform_driver = {
.id_table = hid_accel_3d_ids,
.driver = {
.name = KBUILD_MODNAME,
.owner = THIS_MODULE,
},
.probe = hid_accel_3d_probe,
.remove = hid_accel_3d_remove,

875
drivers/iio/accel/kxcjk-1013.c
View File

File diff suppressed because it is too large Load Diff

22
drivers/iio/adc/Kconfig
View File

@ -129,7 +129,7 @@ config AT91_ADC
config EXYNOS_ADC
tristate "Exynos ADC driver support"
depends on ARCH_EXYNOS || (OF && COMPILE_TEST)
depends on ARCH_EXYNOS || ARCH_S3C24XX || ARCH_S3C64XX || (OF && COMPILE_TEST)
help
Core support for the ADC block found in the Samsung EXYNOS series
of SoCs for drivers such as the touchscreen and hwmon to use to share
@ -206,6 +206,16 @@ config NAU7802
To compile this driver as a module, choose M here: the
module will be called nau7802.
config ROCKCHIP_SARADC
tristate "Rockchip SARADC driver"
depends on ARCH_ROCKCHIP || (ARM && COMPILE_TEST)
help
Say yes here to build support for the SARADC found in SoCs from
Rockchip.
To compile this driver as a module, choose M here: the
module will be called rockchip_saradc.
config TI_ADC081C
tristate "Texas Instruments ADC081C021/027"
depends on I2C
@ -216,6 +226,16 @@ config TI_ADC081C
This driver can also be built as a module. If so, the module will be
called ti-adc081c.
config TI_ADC128S052
tristate "Texas Instruments ADC128S052"
depends on SPI
help
If you say yes here you get support for Texas Instruments ADC128S052
chip.
This driver can also be built as a module. If so, the module will be
called ti-adc128s052.
config TI_AM335X_ADC
tristate "TI's AM335X ADC driver"
depends on MFD_TI_AM335X_TSCADC

2
drivers/iio/adc/Makefile
View File

@ -22,7 +22,9 @@ obj-$(CONFIG_MCP320X) += mcp320x.o
obj-$(CONFIG_MCP3422) += mcp3422.o
obj-$(CONFIG_MEN_Z188_ADC) += men_z188_adc.o
obj-$(CONFIG_NAU7802) += nau7802.o
obj-$(CONFIG_ROCKCHIP_SARADC) += rockchip_saradc.o
obj-$(CONFIG_TI_ADC081C) += ti-adc081c.o
obj-$(CONFIG_TI_ADC128S052) += ti-adc128s052.o
obj-$(CONFIG_TI_AM335X_ADC) += ti_am335x_adc.o
obj-$(CONFIG_TWL4030_MADC) += twl4030-madc.o
obj-$(CONFIG_TWL6030_GPADC) += twl6030-gpadc.o

2
drivers/iio/adc/at91_adc.c
View File

@ -267,7 +267,7 @@ static irqreturn_t at91_adc_trigger_handler(int irq, void *p)
}
/* Handler for classic adc channel eoc trigger */
void handle_adc_eoc_trigger(int irq, struct iio_dev *idev)
static void handle_adc_eoc_trigger(int irq, struct iio_dev *idev)
{
struct at91_adc_state *st = iio_priv(idev);

138
drivers/iio/adc/exynos_adc.c
View File

@ -40,13 +40,16 @@
#include <linux/iio/machine.h>
#include <linux/iio/driver.h>
/* EXYNOS4412/5250 ADC_V1 registers definitions */
/* S3C/EXYNOS4412/5250 ADC_V1 registers definitions */
#define ADC_V1_CON(x) ((x) + 0x00)
#define ADC_V1_DLY(x) ((x) + 0x08)
#define ADC_V1_DATX(x) ((x) + 0x0C)
#define ADC_V1_INTCLR(x) ((x) + 0x18)
#define ADC_V1_MUX(x) ((x) + 0x1c)
/* S3C2410 ADC registers definitions */
#define ADC_S3C2410_MUX(x) ((x) + 0x18)
/* Future ADC_V2 registers definitions */
#define ADC_V2_CON1(x) ((x) + 0x00)
#define ADC_V2_CON2(x) ((x) + 0x04)
@ -61,6 +64,11 @@
#define ADC_V1_CON_PRSCLV(x) (((x) & 0xFF) << 6)
#define ADC_V1_CON_STANDBY (1u << 2)
/* Bit definitions for S3C2410 ADC */
#define ADC_S3C2410_CON_SELMUX(x) (((x) & 7) << 3)
#define ADC_S3C2410_DATX_MASK 0x3FF
#define ADC_S3C2416_CON_RES_SEL (1u << 3)
/* Bit definitions for ADC_V2 */
#define ADC_V2_CON1_SOFT_RESET (1u << 2)
@ -77,6 +85,7 @@
/* Bit definitions common for ADC_V1 and ADC_V2 */
#define ADC_CON_EN_START (1u << 0)
#define ADC_CON_EN_START_MASK (0x3 << 0)
#define ADC_DATX_MASK 0xFFF
#define EXYNOS_ADC_TIMEOUT (msecs_to_jiffies(100))
@ -100,6 +109,8 @@ struct exynos_adc {
struct exynos_adc_data {
int num_channels;
bool needs_sclk;
bool needs_adc_phy;
u32 mask;
void (*init_hw)(struct exynos_adc *info);
void (*exit_hw)(struct exynos_adc *info);
@ -171,7 +182,8 @@ static void exynos_adc_v1_init_hw(struct exynos_adc *info)
{
u32 con1;
writel(1, info->enable_reg);
if (info->data->needs_adc_phy)
writel(1, info->enable_reg);
/* set default prescaler values and Enable prescaler */
con1 = ADC_V1_CON_PRSCLV(49) | ADC_V1_CON_PRSCEN;
@ -185,7 +197,8 @@ static void exynos_adc_v1_exit_hw(struct exynos_adc *info)
{
u32 con;
writel(0, info->enable_reg);
if (info->data->needs_adc_phy)
writel(0, info->enable_reg);
con = readl(ADC_V1_CON(info->regs));
con |= ADC_V1_CON_STANDBY;
@ -210,6 +223,8 @@ static void exynos_adc_v1_start_conv(struct exynos_adc *info,
static const struct exynos_adc_data exynos_adc_v1_data = {
.num_channels = MAX_ADC_V1_CHANNELS,
.mask = ADC_DATX_MASK, /* 12 bit ADC resolution */
.needs_adc_phy = true,
.init_hw = exynos_adc_v1_init_hw,
.exit_hw = exynos_adc_v1_exit_hw,
@ -217,11 +232,89 @@ static const struct exynos_adc_data exynos_adc_v1_data = {
.start_conv = exynos_adc_v1_start_conv,
};
static void exynos_adc_s3c2416_start_conv(struct exynos_adc *info,
unsigned long addr)
{
u32 con1;
/* Enable 12 bit ADC resolution */
con1 = readl(ADC_V1_CON(info->regs));
con1 |= ADC_S3C2416_CON_RES_SEL;
writel(con1, ADC_V1_CON(info->regs));
/* Select channel for S3C2416 */
writel(addr, ADC_S3C2410_MUX(info->regs));
con1 = readl(ADC_V1_CON(info->regs));
writel(con1 | ADC_CON_EN_START, ADC_V1_CON(info->regs));
}
static struct exynos_adc_data const exynos_adc_s3c2416_data = {
.num_channels = MAX_ADC_V1_CHANNELS,
.mask = ADC_DATX_MASK, /* 12 bit ADC resolution */
.init_hw = exynos_adc_v1_init_hw,
.exit_hw = exynos_adc_v1_exit_hw,
.start_conv = exynos_adc_s3c2416_start_conv,
};
static void exynos_adc_s3c2443_start_conv(struct exynos_adc *info,
unsigned long addr)
{
u32 con1;
/* Select channel for S3C2433 */
writel(addr, ADC_S3C2410_MUX(info->regs));
con1 = readl(ADC_V1_CON(info->regs));
writel(con1 | ADC_CON_EN_START, ADC_V1_CON(info->regs));
}
static struct exynos_adc_data const exynos_adc_s3c2443_data = {
.num_channels = MAX_ADC_V1_CHANNELS,
.mask = ADC_S3C2410_DATX_MASK, /* 10 bit ADC resolution */
.init_hw = exynos_adc_v1_init_hw,
.exit_hw = exynos_adc_v1_exit_hw,
.start_conv = exynos_adc_s3c2443_start_conv,
};
static void exynos_adc_s3c64xx_start_conv(struct exynos_adc *info,
unsigned long addr)
{
u32 con1;
con1 = readl(ADC_V1_CON(info->regs));
con1 &= ~ADC_S3C2410_CON_SELMUX(0x7);
con1 |= ADC_S3C2410_CON_SELMUX(addr);
writel(con1 | ADC_CON_EN_START, ADC_V1_CON(info->regs));
}
static struct exynos_adc_data const exynos_adc_s3c24xx_data = {
.num_channels = MAX_ADC_V1_CHANNELS,
.mask = ADC_S3C2410_DATX_MASK, /* 10 bit ADC resolution */
.init_hw = exynos_adc_v1_init_hw,
.exit_hw = exynos_adc_v1_exit_hw,
.start_conv = exynos_adc_s3c64xx_start_conv,
};
static struct exynos_adc_data const exynos_adc_s3c64xx_data = {
.num_channels = MAX_ADC_V1_CHANNELS,
.mask = ADC_DATX_MASK, /* 12 bit ADC resolution */
.init_hw = exynos_adc_v1_init_hw,
.exit_hw = exynos_adc_v1_exit_hw,
.clear_irq = exynos_adc_v1_clear_irq,
.start_conv = exynos_adc_s3c64xx_start_conv,
};
static void exynos_adc_v2_init_hw(struct exynos_adc *info)
{
u32 con1, con2;
writel(1, info->enable_reg);
if (info->data->needs_adc_phy)
writel(1, info->enable_reg);
con1 = ADC_V2_CON1_SOFT_RESET;
writel(con1, ADC_V2_CON1(info->regs));
@ -238,7 +331,8 @@ static void exynos_adc_v2_exit_hw(struct exynos_adc *info)
{
u32 con;
writel(0, info->enable_reg);
if (info->data->needs_adc_phy)
writel(0, info->enable_reg);
con = readl(ADC_V2_CON1(info->regs));
con &= ~ADC_CON_EN_START;
@ -266,6 +360,8 @@ static void exynos_adc_v2_start_conv(struct exynos_adc *info,
static const struct exynos_adc_data exynos_adc_v2_data = {
.num_channels = MAX_ADC_V2_CHANNELS,
.mask = ADC_DATX_MASK, /* 12 bit ADC resolution */
.needs_adc_phy = true,
.init_hw = exynos_adc_v2_init_hw,
.exit_hw = exynos_adc_v2_exit_hw,
@ -275,7 +371,9 @@ static const struct exynos_adc_data exynos_adc_v2_data = {
static const struct exynos_adc_data exynos3250_adc_data = {
.num_channels = MAX_EXYNOS3250_ADC_CHANNELS,
.mask = ADC_DATX_MASK, /* 12 bit ADC resolution */
.needs_sclk = true,
.needs_adc_phy = true,
.init_hw = exynos_adc_v2_init_hw,
.exit_hw = exynos_adc_v2_exit_hw,
@ -285,6 +383,21 @@ static const struct exynos_adc_data exynos3250_adc_data = {
static const struct of_device_id exynos_adc_match[] = {
{
.compatible = "samsung,s3c2410-adc",
.data = &exynos_adc_s3c24xx_data,
}, {
.compatible = "samsung,s3c2416-adc",
.data = &exynos_adc_s3c2416_data,
}, {
.compatible = "samsung,s3c2440-adc",
.data = &exynos_adc_s3c24xx_data,
}, {
.compatible = "samsung,s3c2443-adc",
.data = &exynos_adc_s3c2443_data,
}, {
.compatible = "samsung,s3c6410-adc",
.data = &exynos_adc_s3c64xx_data,
}, {
.compatible = "samsung,exynos-adc-v1",
.data = &exynos_adc_v1_data,
}, {
@ -347,9 +460,10 @@ static int exynos_read_raw(struct iio_dev *indio_dev,
static irqreturn_t exynos_adc_isr(int irq, void *dev_id)
{
struct exynos_adc *info = (struct exynos_adc *)dev_id;
u32 mask = info->data->mask;
/* Read value */
info->value = readl(ADC_V1_DATX(info->regs)) & ADC_DATX_MASK;
info->value = readl(ADC_V1_DATX(info->regs)) & mask;
/* clear irq */
if (info->data->clear_irq)
@ -442,10 +556,13 @@ static int exynos_adc_probe(struct platform_device *pdev)
if (IS_ERR(info->regs))
return PTR_ERR(info->regs);
mem = platform_get_resource(pdev, IORESOURCE_MEM, 1);
info->enable_reg = devm_ioremap_resource(&pdev->dev, mem);
if (IS_ERR(info->enable_reg))
return PTR_ERR(info->enable_reg);
if (info->data->needs_adc_phy) {
mem = platform_get_resource(pdev, IORESOURCE_MEM, 1);
info->enable_reg = devm_ioremap_resource(&pdev->dev, mem);
if (IS_ERR(info->enable_reg))
return PTR_ERR(info->enable_reg);
}
irq = platform_get_irq(pdev, 0);
if (irq < 0) {
@ -606,7 +723,6 @@ static struct platform_driver exynos_adc_driver = {
.remove = exynos_adc_remove,
.driver = {
.name = "exynos-adc",
.owner = THIS_MODULE,
.of_match_table = exynos_adc_match,
.pm = &exynos_adc_pm_ops,
},

1
drivers/iio/adc/lp8788_adc.c
View File

@ -244,7 +244,6 @@ static struct platform_driver lp8788_adc_driver = {
.remove = lp8788_adc_remove,
.driver = {
.name = LP8788_DEV_ADC,
.owner = THIS_MODULE,
},
};
module_platform_driver(lp8788_adc_driver);

316
drivers/iio/adc/rockchip_saradc.c Normal file
View File

@ -0,0 +1,316 @@
/*
* Rockchip Successive Approximation Register (SAR) A/D Converter
* Copyright (C) 2014 ROCKCHIP, Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include <linux/module.h>
#include <linux/platform_device.h>
#include <linux/interrupt.h>
#include <linux/io.h>
#include <linux/of.h>
#include <linux/clk.h>
#include <linux/completion.h>
#include <linux/regulator/consumer.h>
#include <linux/iio/iio.h>
#define SARADC_DATA 0x00
#define SARADC_DATA_MASK 0x3ff
#define SARADC_STAS 0x04
#define SARADC_STAS_BUSY BIT(0)
#define SARADC_CTRL 0x08
#define SARADC_CTRL_IRQ_STATUS BIT(6)
#define SARADC_CTRL_IRQ_ENABLE BIT(5)
#define SARADC_CTRL_POWER_CTRL BIT(3)
#define SARADC_CTRL_CHN_MASK 0x7
#define SARADC_DLY_PU_SOC 0x0c
#define SARADC_DLY_PU_SOC_MASK 0x3f
#define SARADC_BITS 10
#define SARADC_TIMEOUT msecs_to_jiffies(100)
struct rockchip_saradc {
void __iomem *regs;
struct clk *pclk;
struct clk *clk;
struct completion completion;
struct regulator *vref;
u16 last_val;
};
static int rockchip_saradc_read_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
int *val, int *val2, long mask)
{
struct rockchip_saradc *info = iio_priv(indio_dev);
int ret;
switch (mask) {
case IIO_CHAN_INFO_RAW:
mutex_lock(&indio_dev->mlock);
reinit_completion(&info->completion);
/* 8 clock periods as delay between power up and start cmd */
writel_relaxed(8, info->regs + SARADC_DLY_PU_SOC);
/* Select the channel to be used and trigger conversion */
writel(SARADC_CTRL_POWER_CTRL
| (chan->channel & SARADC_CTRL_CHN_MASK)
| SARADC_CTRL_IRQ_ENABLE,
info->regs + SARADC_CTRL);
if (!wait_for_completion_timeout(&info->completion,
SARADC_TIMEOUT)) {
writel_relaxed(0, info->regs + SARADC_CTRL);
mutex_unlock(&indio_dev->mlock);
return -ETIMEDOUT;
}
*val = info->last_val;
mutex_unlock(&indio_dev->mlock);
return IIO_VAL_INT;
case IIO_CHAN_INFO_SCALE:
ret = regulator_get_voltage(info->vref);
if (ret < 0) {
dev_err(&indio_dev->dev, "failed to get voltage\n");
return ret;
}
*val = ret / 1000;
*val2 = SARADC_BITS;
return IIO_VAL_FRACTIONAL_LOG2;
default:
return -EINVAL;
}
}
static irqreturn_t rockchip_saradc_isr(int irq, void *dev_id)
{
struct rockchip_saradc *info = (struct rockchip_saradc *)dev_id;
/* Read value */
info->last_val = readl_relaxed(info->regs + SARADC_DATA);
info->last_val &= SARADC_DATA_MASK;
/* Clear irq & power down adc */
writel_relaxed(0, info->regs + SARADC_CTRL);
complete(&info->completion);
return IRQ_HANDLED;
}
static const struct iio_info rockchip_saradc_iio_info = {
.read_raw = rockchip_saradc_read_raw,
.driver_module = THIS_MODULE,
};
#define ADC_CHANNEL(_index, _id) { \
.type = IIO_VOLTAGE, \
.indexed = 1, \
.channel = _index, \
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \
.datasheet_name = _id, \
}
static const struct iio_chan_spec rockchip_saradc_iio_channels[] = {
ADC_CHANNEL(0, "adc0"),
ADC_CHANNEL(1, "adc1"),
ADC_CHANNEL(2, "adc2"),
};
static int rockchip_saradc_probe(struct platform_device *pdev)
{
struct rockchip_saradc *info = NULL;
struct device_node *np = pdev->dev.of_node;
struct iio_dev *indio_dev = NULL;
struct resource *mem;
int ret;
int irq;
if (!np)
return -ENODEV;
indio_dev = devm_iio_device_alloc(&pdev->dev, sizeof(*info));
if (!indio_dev) {
dev_err(&pdev->dev, "failed allocating iio device\n");
return -ENOMEM;
}
info = iio_priv(indio_dev);
mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
info->regs = devm_ioremap_resource(&pdev->dev, mem);
if (IS_ERR(info->regs))
return PTR_ERR(info->regs);
init_completion(&info->completion);
irq = platform_get_irq(pdev, 0);
if (irq < 0) {
dev_err(&pdev->dev, "no irq resource?\n");
return irq;
}
ret = devm_request_irq(&pdev->dev, irq, rockchip_saradc_isr,
0, dev_name(&pdev->dev), info);
if (ret < 0) {
dev_err(&pdev->dev, "failed requesting irq %d\n", irq);
return ret;
}
info->pclk = devm_clk_get(&pdev->dev, "apb_pclk");
if (IS_ERR(info->pclk)) {
dev_err(&pdev->dev, "failed to get pclk\n");
return PTR_ERR(info->pclk);
}
info->clk = devm_clk_get(&pdev->dev, "saradc");
if (IS_ERR(info->clk)) {
dev_err(&pdev->dev, "failed to get adc clock\n");
return PTR_ERR(info->clk);
}
info->vref = devm_regulator_get(&pdev->dev, "vref");
if (IS_ERR(info->vref)) {
dev_err(&pdev->dev, "failed to get regulator, %ld\n",
PTR_ERR(info->vref));
return PTR_ERR(info->vref);
}
/*
* Use a default of 1MHz for the converter clock.
* This may become user-configurable in the future.
*/
ret = clk_set_rate(info->clk, 1000000);
if (ret < 0) {
dev_err(&pdev->dev, "failed to set adc clk rate, %d\n", ret);
return ret;
}
ret = regulator_enable(info->vref);
if (ret < 0) {
dev_err(&pdev->dev, "failed to enable vref regulator\n");
return ret;
}
ret = clk_prepare_enable(info->pclk);
if (ret < 0) {
dev_err(&pdev->dev, "failed to enable pclk\n");
goto err_reg_voltage;
}
ret = clk_prepare_enable(info->clk);
if (ret < 0) {
dev_err(&pdev->dev, "failed to enable converter clock\n");
goto err_pclk;
}
platform_set_drvdata(pdev, indio_dev);
indio_dev->name = dev_name(&pdev->dev);
indio_dev->dev.parent = &pdev->dev;
indio_dev->dev.of_node = pdev->dev.of_node;
indio_dev->info = &rockchip_saradc_iio_info;
indio_dev->modes = INDIO_DIRECT_MODE;
indio_dev->channels = rockchip_saradc_iio_channels;
indio_dev->num_channels = ARRAY_SIZE(rockchip_saradc_iio_channels);
ret = iio_device_register(indio_dev);
if (ret)
goto err_clk;
return 0;
err_clk:
clk_disable_unprepare(info->clk);
err_pclk:
clk_disable_unprepare(info->pclk);
err_reg_voltage:
regulator_disable(info->vref);
return ret;
}
static int rockchip_saradc_remove(struct platform_device *pdev)
{
struct iio_dev *indio_dev = platform_get_drvdata(pdev);
struct rockchip_saradc *info = iio_priv(indio_dev);
iio_device_unregister(indio_dev);
clk_disable_unprepare(info->clk);
clk_disable_unprepare(info->pclk);
regulator_disable(info->vref);
return 0;
}
#ifdef CONFIG_PM_SLEEP
static int rockchip_saradc_suspend(struct device *dev)
{
struct iio_dev *indio_dev = dev_get_drvdata(dev);
struct rockchip_saradc *info = iio_priv(indio_dev);
clk_disable_unprepare(info->clk);
clk_disable_unprepare(info->pclk);
regulator_disable(info->vref);
return 0;
}
static int rockchip_saradc_resume(struct device *dev)
{
struct iio_dev *indio_dev = dev_get_drvdata(dev);
struct rockchip_saradc *info = iio_priv(indio_dev);
int ret;
ret = regulator_enable(info->vref);
if (ret)
return ret;
ret = clk_prepare_enable(info->pclk);
if (ret)
return ret;
ret = clk_prepare_enable(info->clk);
if (ret)
return ret;
return ret;
}
#endif
static SIMPLE_DEV_PM_OPS(rockchip_saradc_pm_ops,
rockchip_saradc_suspend, rockchip_saradc_resume);
static const struct of_device_id rockchip_saradc_match[] = {
{ .compatible = "rockchip,saradc" },
{},
};
MODULE_DEVICE_TABLE(of, rockchip_saradc_match);
static struct platform_driver rockchip_saradc_driver = {
.probe = rockchip_saradc_probe,
.remove = rockchip_saradc_remove,
.driver = {
.name = "rockchip-saradc",
.owner = THIS_MODULE,
.of_match_table = rockchip_saradc_match,
.pm = &rockchip_saradc_pm_ops,
},
};
module_platform_driver(rockchip_saradc_driver);

179
drivers/iio/adc/ti-adc128s052.c Normal file
View File

@ -0,0 +1,179 @@
/*
* Copyright (C) 2014 Angelo Compagnucci <angelo.compagnucci@gmail.com>
*
* Driver for Texas Instruments' ADC128S052 ADC chip.
* Datasheet can be found here:
* http://www.ti.com/lit/ds/symlink/adc128s052.pdf
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#include <linux/err.h>
#include <linux/spi/spi.h>
#include <linux/module.h>
#include <linux/iio/iio.h>
#include <linux/regulator/consumer.h>
struct adc128 {
struct spi_device *spi;
struct regulator *reg;
struct mutex lock;
u8 buffer[2] ____cacheline_aligned;
};
static int adc128_adc_conversion(struct adc128 *adc, u8 channel)
{
int ret;
mutex_lock(&adc->lock);
adc->buffer[0] = channel << 3;
adc->buffer[1] = 0;
ret = spi_write(adc->spi, &adc->buffer, 2);
if (ret < 0) {
mutex_unlock(&adc->lock);
return ret;
}
ret = spi_read(adc->spi, &adc->buffer, 2);
mutex_unlock(&adc->lock);
if (ret < 0)
return ret;
return ((adc->buffer[0] << 8 | adc->buffer[1]) & 0xFFF);
}
static int adc128_read_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *channel, int *val,
int *val2, long mask)
{
struct adc128 *adc = iio_priv(indio_dev);
int ret;
switch (mask) {
case IIO_CHAN_INFO_RAW:
ret = adc128_adc_conversion(adc, channel->channel);
if (ret < 0)
return ret;
*val = ret;
return IIO_VAL_INT;
case IIO_CHAN_INFO_SCALE:
ret = regulator_get_voltage(adc->reg);
if (ret < 0)
return ret;
*val = ret / 1000;
*val2 = 12;
return IIO_VAL_FRACTIONAL_LOG2;
default:
return -EINVAL;
}
}
#define ADC128_VOLTAGE_CHANNEL(num) \
{ \
.type = IIO_VOLTAGE, \
.indexed = 1, \
.channel = (num), \
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) \
}
static const struct iio_chan_spec adc128_channels[] = {
ADC128_VOLTAGE_CHANNEL(0),
ADC128_VOLTAGE_CHANNEL(1),
ADC128_VOLTAGE_CHANNEL(2),
ADC128_VOLTAGE_CHANNEL(3),
ADC128_VOLTAGE_CHANNEL(4),
ADC128_VOLTAGE_CHANNEL(5),
ADC128_VOLTAGE_CHANNEL(6),
ADC128_VOLTAGE_CHANNEL(7),
};
static const struct iio_info adc128_info = {
.read_raw = adc128_read_raw,
.driver_module = THIS_MODULE,
};
static int adc128_probe(struct spi_device *spi)
{
struct iio_dev *indio_dev;
struct adc128 *adc;
int ret;
indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*adc));
if (!indio_dev)
return -ENOMEM;
adc = iio_priv(indio_dev);
adc->spi = spi;
spi_set_drvdata(spi, indio_dev);
indio_dev->dev.parent = &spi->dev;
indio_dev->name = spi_get_device_id(spi)->name;
indio_dev->modes = INDIO_DIRECT_MODE;
indio_dev->info = &adc128_info;
indio_dev->channels = adc128_channels;
indio_dev->num_channels = ARRAY_SIZE(adc128_channels);
adc->reg = devm_regulator_get(&spi->dev, "vref");
if (IS_ERR(adc->reg))
return PTR_ERR(adc->reg);
ret = regulator_enable(adc->reg);
if (ret < 0)
return ret;
mutex_init(&adc->lock);
ret = iio_device_register(indio_dev);
return ret;
}
static int adc128_remove(struct spi_device *spi)
{
struct iio_dev *indio_dev = spi_get_drvdata(spi);
struct adc128 *adc = iio_priv(indio_dev);
iio_device_unregister(indio_dev);
regulator_disable(adc->reg);
return 0;
}
static const struct spi_device_id adc128_id[] = {
{ "adc128s052", 0},
{ }
};
MODULE_DEVICE_TABLE(spi, adc128_id);
static struct spi_driver adc128_driver = {
.driver = {
.name = "adc128s052",
.owner = THIS_MODULE,
},
.probe = adc128_probe,
.remove = adc128_remove,
.id_table = adc128_id,
};
module_spi_driver(adc128_driver);
MODULE_AUTHOR("Angelo Compagnucci <angelo.compagnucci@gmail.com>");
MODULE_DESCRIPTION("Texas Instruments ADC128S052");
MODULE_LICENSE("GPL v2");

1
drivers/iio/adc/ti_am335x_adc.c
View File

@ -545,7 +545,6 @@ MODULE_DEVICE_TABLE(of, ti_adc_dt_ids);
static struct platform_driver tiadc_driver = {
.driver = {
.name = "TI-am335x-adc",
.owner = THIS_MODULE,
.pm = TIADC_PM_OPS,
.of_match_table = ti_adc_dt_ids,
},

1
drivers/iio/adc/twl4030-madc.c
View File

@ -883,7 +883,6 @@ static struct platform_driver twl4030_madc_driver = {
.remove = twl4030_madc_remove,
.driver = {
.name = "twl4030_madc",
.owner = THIS_MODULE,
.of_match_table = of_match_ptr(twl_madc_of_match),
},
};

1
drivers/iio/adc/twl6030-gpadc.c
View File

@ -994,7 +994,6 @@ static struct platform_driver twl6030_gpadc_driver = {
.remove = twl6030_gpadc_remove,
.driver = {
.name = DRIVER_NAME,
.owner = THIS_MODULE,
.pm = &twl6030_gpadc_pm_ops,
.of_match_table = of_twl6030_match_tbl,
},

1
drivers/iio/adc/vf610_adc.c
View File

@ -698,7 +698,6 @@ static struct platform_driver vf610_adc_driver = {
.remove = vf610_adc_remove,
.driver = {
.name = DRIVER_NAME,
.owner = THIS_MODULE,
.of_match_table = vf610_adc_match,
.pm = &vf610_adc_pm_ops,
},

1
drivers/iio/adc/viperboard_adc.c
View File

@ -145,7 +145,6 @@ static int vprbrd_adc_probe(struct platform_device *pdev)
static struct platform_driver vprbrd_adc_driver = {
.driver = {
.name = "viperboard-adc",
.owner = THIS_MODULE,
},
.probe = vprbrd_adc_probe,
};

9
drivers/iio/adc/xilinx-xadc-core.c
View File

@ -1201,12 +1201,16 @@ static int xadc_probe(struct platform_device *pdev)
goto err_device_free;
xadc->convst_trigger = xadc_alloc_trigger(indio_dev, "convst");
if (IS_ERR(xadc->convst_trigger))
if (IS_ERR(xadc->convst_trigger)) {
ret = PTR_ERR(xadc->convst_trigger);
goto err_triggered_buffer_cleanup;
}
xadc->samplerate_trigger = xadc_alloc_trigger(indio_dev,
"samplerate");
if (IS_ERR(xadc->samplerate_trigger))
if (IS_ERR(xadc->samplerate_trigger)) {
ret = PTR_ERR(xadc->samplerate_trigger);
goto err_free_convst_trigger;
}
}
xadc->clk = devm_clk_get(&pdev->dev, NULL);
@ -1322,7 +1326,6 @@ static struct platform_driver xadc_driver = {
.remove = xadc_remove,
.driver = {
.name = "xadc",
.owner = THIS_MODULE,
.of_match_table = xadc_of_match_table,
},
};

5
drivers/iio/common/st_sensors/st_sensors_core.c
View File

@ -306,8 +306,11 @@ int st_sensors_init_sensor(struct iio_dev *indio_dev,
if (of_pdata)
pdata = of_pdata;
if (pdata)
if (pdata) {
err = st_sensors_set_drdy_int_pin(indio_dev, pdata);
if (err < 0)
return err;
}
err = st_sensors_set_enable(indio_dev, false);
if (err < 0)

8
drivers/iio/dac/Kconfig
View File

@ -152,6 +152,14 @@ config MAX517
This driver can also be built as a module. If so, the module
will be called max517.
config MAX5821
tristate "Maxim MAX5821 DAC driver"
depends on I2C
depends on OF
help
Say yes here to build support for Maxim MAX5821
10 bits DAC.
config MCP4725
tristate "MCP4725 DAC driver"
depends on I2C

1
drivers/iio/dac/Makefile
View File

@ -17,5 +17,6 @@ obj-$(CONFIG_AD5791) += ad5791.o
obj-$(CONFIG_AD5686) += ad5686.o
obj-$(CONFIG_AD7303) += ad7303.o
obj-$(CONFIG_MAX517) += max517.o
obj-$(CONFIG_MAX5821) += max5821.o
obj-$(CONFIG_MCP4725) += mcp4725.o
obj-$(CONFIG_MCP4922) += mcp4922.o

405
drivers/iio/dac/max5821.c Normal file
View File

@ -0,0 +1,405 @@
/*
* iio/dac/max5821.c
* Copyright (C) 2014 Philippe Reynes
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/i2c.h>
#include <linux/iio/iio.h>
#include <linux/regulator/consumer.h>
#define MAX5821_MAX_DAC_CHANNELS 2
/* command bytes */
#define MAX5821_LOAD_DAC_A_IN_REG_B 0x00
#define MAX5821_LOAD_DAC_B_IN_REG_A 0x10
#define MAX5821_EXTENDED_COMMAND_MODE 0xf0
#define MAX5821_READ_DAC_A_COMMAND 0xf1
#define MAX5821_READ_DAC_B_COMMAND 0xf2
#define MAX5821_EXTENDED_POWER_UP 0x00
#define MAX5821_EXTENDED_POWER_DOWN_MODE0 0x01
#define MAX5821_EXTENDED_POWER_DOWN_MODE1 0x02
#define MAX5821_EXTENDED_POWER_DOWN_MODE2 0x03
#define MAX5821_EXTENDED_DAC_A 0x04
#define MAX5821_EXTENDED_DAC_B 0x08
enum max5821_device_ids {
ID_MAX5821,
};
struct max5821_data {
struct i2c_client *client;
struct regulator *vref_reg;
unsigned short vref_mv;
bool powerdown[MAX5821_MAX_DAC_CHANNELS];
u8 powerdown_mode[MAX5821_MAX_DAC_CHANNELS];
struct mutex lock;
};
static const char * const max5821_powerdown_modes[] = {
"three_state",
"1kohm_to_gnd",
"100kohm_to_gnd",
};
enum {
MAX5821_THREE_STATE,
MAX5821_1KOHM_TO_GND,
MAX5821_100KOHM_TO_GND
};
static int max5821_get_powerdown_mode(struct iio_dev *indio_dev,
const struct iio_chan_spec *chan)
{
struct max5821_data *st = iio_priv(indio_dev);
return st->powerdown_mode[chan->channel];
}
static int max5821_set_powerdown_mode(struct iio_dev *indio_dev,
const struct iio_chan_spec *chan,
unsigned int mode)
{
struct max5821_data *st = iio_priv(indio_dev);
st->powerdown_mode[chan->channel] = mode;
return 0;
}
static const struct iio_enum max5821_powerdown_mode_enum = {
.items = max5821_powerdown_modes,
.num_items = ARRAY_SIZE(max5821_powerdown_modes),
.get = max5821_get_powerdown_mode,
.set = max5821_set_powerdown_mode,
};
static ssize_t max5821_read_dac_powerdown(struct iio_dev *indio_dev,
uintptr_t private,
const struct iio_chan_spec *chan,
char *buf)
{
struct max5821_data *st = iio_priv(indio_dev);
return sprintf(buf, "%d\n", st->powerdown[chan->channel]);
}
static int max5821_sync_powerdown_mode(struct max5821_data *data,
const struct iio_chan_spec *chan)
{
u8 outbuf[2];
outbuf[0] = MAX5821_EXTENDED_COMMAND_MODE;
if (chan->channel == 0)
outbuf[1] = MAX5821_EXTENDED_DAC_A;
else
outbuf[1] = MAX5821_EXTENDED_DAC_B;
if (data->powerdown[chan->channel])
outbuf[1] |= data->powerdown_mode[chan->channel] + 1;
else
outbuf[1] |= MAX5821_EXTENDED_POWER_UP;
return i2c_master_send(data->client, outbuf, 2);
}
static ssize_t max5821_write_dac_powerdown(struct iio_dev *indio_dev,
uintptr_t private,
const struct iio_chan_spec *chan,
const char *buf, size_t len)
{
struct max5821_data *data = iio_priv(indio_dev);
bool powerdown;
int ret;
ret = strtobool(buf, &powerdown);
if (ret)
return ret;
data->powerdown[chan->channel] = powerdown;
ret = max5821_sync_powerdown_mode(data, chan);
if (ret < 0)
return ret;
return len;
}
static const struct iio_chan_spec_ext_info max5821_ext_info[] = {
{
.name = "powerdown",
.read = max5821_read_dac_powerdown,
.write = max5821_write_dac_powerdown,
.shared = IIO_SEPARATE,
},
IIO_ENUM("powerdown_mode", IIO_SEPARATE, &max5821_powerdown_mode_enum),
IIO_ENUM_AVAILABLE("powerdown_mode", &max5821_powerdown_mode_enum),
{ },
};
#define MAX5821_CHANNEL(chan) { \
.type = IIO_VOLTAGE, \
.indexed = 1, \
.output = 1, \
.channel = (chan), \
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
.info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SCALE), \
.ext_info = max5821_ext_info, \
}
static const struct iio_chan_spec max5821_channels[] = {
MAX5821_CHANNEL(0),
MAX5821_CHANNEL(1)
};
static const u8 max5821_read_dac_command[] = {
MAX5821_READ_DAC_A_COMMAND,
MAX5821_READ_DAC_B_COMMAND
};
static const u8 max5821_load_dac_command[] = {
MAX5821_LOAD_DAC_A_IN_REG_B,
MAX5821_LOAD_DAC_B_IN_REG_A
};
static int max5821_get_value(struct iio_dev *indio_dev,
int *val, int channel)
{
struct max5821_data *data = iio_priv(indio_dev);
struct i2c_client *client = data->client;
u8 outbuf[1];
u8 inbuf[2];
int ret;
if ((channel != 0) && (channel != 1))
return -EINVAL;
outbuf[0] = max5821_read_dac_command[channel];
mutex_lock(&data->lock);
ret = i2c_master_send(client, outbuf, 1);
if (ret < 0) {
mutex_unlock(&data->lock);
return ret;
} else if (ret != 1) {
mutex_unlock(&data->lock);
return -EIO;
}
ret = i2c_master_recv(client, inbuf, 2);
if (ret < 0) {
mutex_unlock(&data->lock);
return ret;
} else if (ret != 2) {
mutex_unlock(&data->lock);
return -EIO;
}
mutex_unlock(&data->lock);
*val = ((inbuf[0] & 0x0f) << 6) | (inbuf[1] >> 2);
return IIO_VAL_INT;
}
static int max5821_set_value(struct iio_dev *indio_dev,
int val, int channel)
{
struct max5821_data *data = iio_priv(indio_dev);
struct i2c_client *client = data->client;
u8 outbuf[2];
int ret;
if ((val < 0) || (val > 1023))
return -EINVAL;
if ((channel != 0) && (channel != 1))
return -EINVAL;
outbuf[0] = max5821_load_dac_command[channel];
outbuf[0] |= val >> 6;
outbuf[1] = (val & 0x3f) << 2;
ret = i2c_master_send(client, outbuf, 2);
if (ret < 0)
return ret;
else if (ret != 2)
return -EIO;
else
return 0;
}
static int max5821_read_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
int *val, int *val2, long mask)
{
struct max5821_data *data = iio_priv(indio_dev);
switch (mask) {
case IIO_CHAN_INFO_RAW:
return max5821_get_value(indio_dev, val, chan->channel);
case IIO_CHAN_INFO_SCALE:
*val = data->vref_mv;
*val2 = 10;
return IIO_VAL_FRACTIONAL_LOG2;
default:
return -EINVAL;
}
}
static int max5821_write_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
int val, int val2, long mask)
{
if (val2 != 0)
return -EINVAL;
switch (mask) {
case IIO_CHAN_INFO_RAW:
return max5821_set_value(indio_dev, val, chan->channel);
default:
return -EINVAL;
}
}
#ifdef CONFIG_PM_SLEEP
static int max5821_suspend(struct device *dev)
{
u8 outbuf[2] = { MAX5821_EXTENDED_COMMAND_MODE,
MAX5821_EXTENDED_DAC_A |
MAX5821_EXTENDED_DAC_B |
MAX5821_EXTENDED_POWER_DOWN_MODE2 };
return i2c_master_send(to_i2c_client(dev), outbuf, 2);
}
static int max5821_resume(struct device *dev)
{
u8 outbuf[2] = { MAX5821_EXTENDED_COMMAND_MODE,
MAX5821_EXTENDED_DAC_A |
MAX5821_EXTENDED_DAC_B |
MAX5821_EXTENDED_POWER_UP };
return i2c_master_send(to_i2c_client(dev), outbuf, 2);
}
static SIMPLE_DEV_PM_OPS(max5821_pm_ops, max5821_suspend, max5821_resume);
#define MAX5821_PM_OPS (&max5821_pm_ops)
#else
#define MAX5821_PM_OPS NULL
#endif /* CONFIG_PM_SLEEP */
static const struct iio_info max5821_info = {
.read_raw = max5821_read_raw,
.write_raw = max5821_write_raw,
.driver_module = THIS_MODULE,
};
static int max5821_probe(struct i2c_client *client,
const struct i2c_device_id *id)
{
struct max5821_data *data;
struct iio_dev *indio_dev;
u32 tmp;
int ret;
indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data));
if (!indio_dev)
return -ENOMEM;
data = iio_priv(indio_dev);
i2c_set_clientdata(client, indio_dev);
data->client = client;
mutex_init(&data->lock);
/* max5821 start in powerdown mode 100Kohm to ground */
for (tmp = 0; tmp < MAX5821_MAX_DAC_CHANNELS; tmp++) {
data->powerdown[tmp] = true;
data->powerdown_mode[tmp] = MAX5821_100KOHM_TO_GND;
}
data->vref_reg = devm_regulator_get(&client->dev, "vref");
if (IS_ERR(data->vref_reg)) {
ret = PTR_ERR(data->vref_reg);
dev_err(&client->dev,
"Failed to get vref regulator: %d\n", ret);
goto error_free_reg;
}
ret = regulator_enable(data->vref_reg);
if (ret) {
dev_err(&client->dev,
"Failed to enable vref regulator: %d\n", ret);
goto error_free_reg;
}
ret = regulator_get_voltage(data->vref_reg);
if (ret < 0) {
dev_err(&client->dev,
"Failed to get voltage on regulator: %d\n", ret);
goto error_disable_reg;
}
data->vref_mv = ret / 1000;
indio_dev->name = id->name;
indio_dev->dev.parent = &client->dev;
indio_dev->num_channels = ARRAY_SIZE(max5821_channels);
indio_dev->channels = max5821_channels;
indio_dev->modes = INDIO_DIRECT_MODE;
indio_dev->info = &max5821_info;
return iio_device_register(indio_dev);
error_disable_reg:
regulator_disable(data->vref_reg);
error_free_reg:
return ret;
}
static int max5821_remove(struct i2c_client *client)
{
struct iio_dev *indio_dev = i2c_get_clientdata(client);
struct max5821_data *data = iio_priv(indio_dev);
iio_device_unregister(indio_dev);
regulator_disable(data->vref_reg);
return 0;
}
static const struct i2c_device_id max5821_id[] = {
{ "max5821", ID_MAX5821 },
{ }
};
MODULE_DEVICE_TABLE(i2c, max5821_id);
static const struct of_device_id max5821_of_match[] = {
{ .compatible = "maxim,max5821" },
{ }
};
static struct i2c_driver max5821_driver = {
.driver = {
.name = "max5821",
.pm = MAX5821_PM_OPS,
.owner = THIS_MODULE,
},
.probe = max5821_probe,
.remove = max5821_remove,
.id_table = max5821_id,
};
module_i2c_driver(max5821_driver);
MODULE_AUTHOR("Philippe Reynes <tremyfr@yahoo.fr>");
MODULE_DESCRIPTION("MAX5821 DAC");
MODULE_LICENSE("GPL v2");

11
drivers/iio/gyro/Kconfig
View File

@ -50,6 +50,17 @@ config ADXRS450
This driver can also be built as a module. If so, the module
will be called adxrs450.
config BMG160
tristate "BOSCH BMG160 Gyro Sensor"
depends on I2C
select IIO_TRIGGERED_BUFFER if IIO_BUFFER
help
Say yes here to build support for Bosch BMG160 Tri-axis Gyro Sensor
driver. This driver also supports BMI055 gyroscope.
This driver can also be built as a module. If so, the module
will be called bmg160.
config HID_SENSOR_GYRO_3D
depends on HID_SENSOR_HUB
select IIO_BUFFER

1
drivers/iio/gyro/Makefile
View File

@ -8,6 +8,7 @@ obj-$(CONFIG_ADIS16130) += adis16130.o
obj-$(CONFIG_ADIS16136) += adis16136.o
obj-$(CONFIG_ADIS16260) += adis16260.o
obj-$(CONFIG_ADXRS450) += adxrs450.o
obj-$(CONFIG_BMG160) += bmg160.o
obj-$(CONFIG_HID_SENSOR_GYRO_3D) += hid-sensor-gyro-3d.o

1228
drivers/iio/gyro/bmg160.c Normal file
View File

File diff suppressed because it is too large Load Diff

1
drivers/iio/gyro/hid-sensor-gyro-3d.c
View File

@ -416,7 +416,6 @@ static struct platform_driver hid_gyro_3d_platform_driver = {
.id_table = hid_gyro_3d_ids,
.driver = {
.name = KBUILD_MODNAME,
.owner = THIS_MODULE,
},
.probe = hid_gyro_3d_probe,
.remove = hid_gyro_3d_remove,

1
drivers/iio/humidity/dht11.c
View File

@ -281,7 +281,6 @@ static int dht11_probe(struct platform_device *pdev)
static struct platform_driver dht11_driver = {
.driver = {
.name = DRIVER_NAME,
.owner = THIS_MODULE,
.of_match_table = dht11_dt_ids,
},
.probe = dht11_probe,

3
drivers/iio/imu/inv_mpu6050/inv_mpu_core.c
View File

@ -673,8 +673,7 @@ static int inv_mpu_probe(struct i2c_client *client,
st = iio_priv(indio_dev);
st->client = client;
pdata = (struct inv_mpu6050_platform_data
*)dev_get_platdata(&client->dev);
pdata = dev_get_platdata(&client->dev);
if (pdata)
st->plat_data = *pdata;
/* power is turned on inside check chip type*/

63
drivers/iio/industrialio-buffer.c
View File

@ -942,13 +942,34 @@ int iio_push_to_buffers(struct iio_dev *indio_dev, const void *data)
}
EXPORT_SYMBOL_GPL(iio_push_to_buffers);
static int iio_buffer_add_demux(struct iio_buffer *buffer,
struct iio_demux_table **p, unsigned int in_loc, unsigned int out_loc,
unsigned int length)
{
if (*p && (*p)->from + (*p)->length == in_loc &&
(*p)->to + (*p)->length == out_loc) {
(*p)->length += length;
} else {
*p = kmalloc(sizeof(**p), GFP_KERNEL);
if (*p == NULL)
return -ENOMEM;
(*p)->from = in_loc;
(*p)->to = out_loc;
(*p)->length = length;
list_add_tail(&(*p)->l, &buffer->demux_list);
}
return 0;
}
static int iio_buffer_update_demux(struct iio_dev *indio_dev,
struct iio_buffer *buffer)
{
const struct iio_chan_spec *ch;
int ret, in_ind = -1, out_ind, length;
unsigned in_loc = 0, out_loc = 0;
struct iio_demux_table *p;
struct iio_demux_table *p = NULL;
/* Clear out any old demux */
iio_buffer_demux_free(buffer);
@ -979,14 +1000,7 @@ static int iio_buffer_update_demux(struct iio_dev *indio_dev,
else
length = ch->scan_type.storagebits / 8;
/* Make sure we are aligned */
in_loc += length;
if (in_loc % length)
in_loc += length - in_loc % length;
}
p = kmalloc(sizeof(*p), GFP_KERNEL);
if (p == NULL) {
ret = -ENOMEM;
goto error_clear_mux_table;
in_loc = roundup(in_loc, length) + length;
}
ch = iio_find_channel_from_si(indio_dev, in_ind);
if (ch->scan_type.repeat > 1)
@ -994,24 +1008,16 @@ static int iio_buffer_update_demux(struct iio_dev *indio_dev,
ch->scan_type.repeat;
else
length = ch->scan_type.storagebits / 8;
if (out_loc % length)
out_loc += length - out_loc % length;
if (in_loc % length)
in_loc += length - in_loc % length;
p->from = in_loc;
p->to = out_loc;
p->length = length;
list_add_tail(&p->l, &buffer->demux_list);
out_loc = roundup(out_loc, length);
in_loc = roundup(in_loc, length);
ret = iio_buffer_add_demux(buffer, &p, in_loc, out_loc, length);
if (ret)
goto error_clear_mux_table;
out_loc += length;
in_loc += length;
}
/* Relies on scan_timestamp being last */
if (buffer->scan_timestamp) {
p = kmalloc(sizeof(*p), GFP_KERNEL);
if (p == NULL) {
ret = -ENOMEM;
goto error_clear_mux_table;
}
ch = iio_find_channel_from_si(indio_dev,
indio_dev->scan_index_timestamp);
if (ch->scan_type.repeat > 1)
@ -1019,14 +1025,11 @@ static int iio_buffer_update_demux(struct iio_dev *indio_dev,
ch->scan_type.repeat;
else
length = ch->scan_type.storagebits / 8;
if (out_loc % length)
out_loc += length - out_loc % length;
if (in_loc % length)
in_loc += length - in_loc % length;
p->from = in_loc;
p->to = out_loc;
p->length = length;
list_add_tail(&p->l, &buffer->demux_list);
out_loc = roundup(out_loc, length);
in_loc = roundup(in_loc, length);
ret = iio_buffer_add_demux(buffer, &p, in_loc, out_loc, length);
if (ret)
goto error_clear_mux_table;
out_loc += length;
in_loc += length;
}

10
drivers/iio/light/Kconfig
View File

@ -17,6 +17,16 @@ config ADJD_S311
This driver can also be built as a module. If so, the module
will be called adjd_s311.
config AL3320A
tristate "AL3320A ambient light sensor"
depends on I2C
help
Say Y here if you want to build a driver for the Dyna Image AL3320A
ambient light sensor.
To compile this driver as a module, choose M here: the
module will be called al3320a.
config APDS9300
tristate "APDS9300 ambient light sensor"
depends on I2C

1
drivers/iio/light/Makefile
View File

@ -4,6 +4,7 @@
# When adding new entries keep the list in alphabetical order
obj-$(CONFIG_ADJD_S311) += adjd_s311.o
obj-$(CONFIG_AL3320A) += al3320a.o
obj-$(CONFIG_APDS9300) += apds9300.o
obj-$(CONFIG_CM32181) += cm32181.o
obj-$(CONFIG_CM36651) += cm36651.o

232
drivers/iio/light/al3320a.c Normal file
View File

@ -0,0 +1,232 @@
/*
* AL3320A - Dyna Image Ambient Light Sensor
*
* Copyright (c) 2014, Intel Corporation.
*
* This file is subject to the terms and conditions of version 2 of
* the GNU General Public License. See the file COPYING in the main
* directory of this archive for more details.
*
* IIO driver for AL3320A (7-bit I2C slave address 0x1C).
*
* TODO: interrupt support, thresholds
*
*/
#include <linux/module.h>
#include <linux/init.h>
#include <linux/i2c.h>
#include <linux/iio/iio.h>
#include <linux/iio/sysfs.h>
#define AL3320A_DRV_NAME "al3320a"
#define AL3320A_REG_CONFIG 0x00
#define AL3320A_REG_STATUS 0x01
#define AL3320A_REG_INT 0x02
#define AL3320A_REG_WAIT 0x06
#define AL3320A_REG_CONFIG_RANGE 0x07
#define AL3320A_REG_PERSIST 0x08
#define AL3320A_REG_MEAN_TIME 0x09
#define AL3320A_REG_ADUMMY 0x0A
#define AL3320A_REG_DATA_LOW 0x22
#define AL3320A_REG_LOW_THRESH_LOW 0x30
#define AL3320A_REG_LOW_THRESH_HIGH 0x31
#define AL3320A_REG_HIGH_THRESH_LOW 0x32
#define AL3320A_REG_HIGH_THRESH_HIGH 0x33
#define AL3320A_CONFIG_DISABLE 0x00
#define AL3320A_CONFIG_ENABLE 0x01
#define AL3320A_GAIN_SHIFT 1
#define AL3320A_GAIN_MASK (BIT(2) | BIT(1))
/* chip params default values */
#define AL3320A_DEFAULT_MEAN_TIME 4
#define AL3320A_DEFAULT_WAIT_TIME 0 /* no waiting */
#define AL3320A_SCALE_AVAILABLE "0.512 0.128 0.032 0.01"
enum al3320a_range {
AL3320A_RANGE_1, /* 33.28 Klx */
AL3320A_RANGE_2, /* 8.32 Klx */
AL3320A_RANGE_3, /* 2.08 Klx */
AL3320A_RANGE_4 /* 0.65 Klx */
};
static const int al3320a_scales[][2] = {
{0, 512000}, {0, 128000}, {0, 32000}, {0, 10000}
};
struct al3320a_data {
struct i2c_client *client;
};
static const struct iio_chan_spec al3320a_channels[] = {
{
.type = IIO_LIGHT,
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
BIT(IIO_CHAN_INFO_SCALE),
}
};
static IIO_CONST_ATTR(in_illuminance_scale_available, AL3320A_SCALE_AVAILABLE);
static struct attribute *al3320a_attributes[] = {
&iio_const_attr_in_illuminance_scale_available.dev_attr.attr,
NULL,
};
static const struct attribute_group al3320a_attribute_group = {
.attrs = al3320a_attributes,
};
static int al3320a_init(struct al3320a_data *data)
{
int ret;
/* power on */
ret = i2c_smbus_write_byte_data(data->client, AL3320A_REG_CONFIG,
AL3320A_CONFIG_ENABLE);
if (ret < 0)
return ret;
ret = i2c_smbus_write_byte_data(data->client, AL3320A_REG_CONFIG_RANGE,
AL3320A_RANGE_3 << AL3320A_GAIN_SHIFT);
if (ret < 0)
return ret;
ret = i2c_smbus_write_byte_data(data->client, AL3320A_REG_MEAN_TIME,
AL3320A_DEFAULT_MEAN_TIME);
if (ret < 0)
return ret;
ret = i2c_smbus_write_byte_data(data->client, AL3320A_REG_WAIT,
AL3320A_DEFAULT_WAIT_TIME);
if (ret < 0)
return ret;
return 0;
}
static int al3320a_read_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan, int *val,
int *val2, long mask)
{
struct al3320a_data *data = iio_priv(indio_dev);
int ret;
switch (mask) {
case IIO_CHAN_INFO_RAW:
/*
* ALS ADC value is stored in two adjacent registers:
* - low byte of output is stored at AL3320A_REG_DATA_LOW
* - high byte of output is stored at AL3320A_REG_DATA_LOW + 1
*/
ret = i2c_smbus_read_word_data(data->client,
AL3320A_REG_DATA_LOW);
if (ret < 0)
return ret;
*val = ret;
return IIO_VAL_INT;
case IIO_CHAN_INFO_SCALE:
ret = i2c_smbus_read_byte_data(data->client,
AL3320A_REG_CONFIG_RANGE);
if (ret < 0)
return ret;
ret = (ret & AL3320A_GAIN_MASK) >> AL3320A_GAIN_SHIFT;
*val = al3320a_scales[ret][0];
*val2 = al3320a_scales[ret][1];
return IIO_VAL_INT_PLUS_MICRO;
}
return -EINVAL;
}
static int al3320a_write_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan, int val,
int val2, long mask)
{
struct al3320a_data *data = iio_priv(indio_dev);
int i;
switch (mask) {
case IIO_CHAN_INFO_SCALE:
for (i = 0; i < ARRAY_SIZE(al3320a_scales); i++) {
if (val == al3320a_scales[i][0] &&
val2 == al3320a_scales[i][1])
return i2c_smbus_write_byte_data(data->client,
AL3320A_REG_CONFIG_RANGE,
i << AL3320A_GAIN_SHIFT);
}
break;
}
return -EINVAL;
}
static const struct iio_info al3320a_info = {
.driver_module = THIS_MODULE,
.read_raw = al3320a_read_raw,
.write_raw = al3320a_write_raw,
.attrs = &al3320a_attribute_group,
};
static int al3320a_probe(struct i2c_client *client,
const struct i2c_device_id *id)
{
struct al3320a_data *data;
struct iio_dev *indio_dev;
int ret;
indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data));
if (!indio_dev)
return -ENOMEM;
data = iio_priv(indio_dev);
i2c_set_clientdata(client, indio_dev);
data->client = client;
indio_dev->dev.parent = &client->dev;
indio_dev->info = &al3320a_info;
indio_dev->name = AL3320A_DRV_NAME;
indio_dev->channels = al3320a_channels;
indio_dev->num_channels = ARRAY_SIZE(al3320a_channels);
indio_dev->modes = INDIO_DIRECT_MODE;
ret = al3320a_init(data);
if (ret < 0) {
dev_err(&client->dev, "al3320a chip init failed\n");
return ret;
}
return devm_iio_device_register(&client->dev, indio_dev);
}
static int al3320a_remove(struct i2c_client *client)
{
return i2c_smbus_write_byte_data(client, AL3320A_REG_CONFIG,
AL3320A_CONFIG_DISABLE);
}
static const struct i2c_device_id al3320a_id[] = {
{"al3320a", 0},
{}
};
MODULE_DEVICE_TABLE(i2c, al3320a_id);
static struct i2c_driver al3320a_driver = {
.driver = {
.name = AL3320A_DRV_NAME,
},
.probe = al3320a_probe,
.remove = al3320a_remove,
.id_table = al3320a_id,
};
module_i2c_driver(al3320a_driver);
MODULE_AUTHOR("Daniel Baluta <daniel.baluta@intel.com>");
MODULE_DESCRIPTION("AL3320A Ambient Light Sensor driver");
MODULE_LICENSE("GPL v2");

1
drivers/iio/light/hid-sensor-als.c
View File

@ -381,7 +381,6 @@ static struct platform_driver hid_als_platform_driver = {
.id_table = hid_als_ids,
.driver = {
.name = KBUILD_MODNAME,
.owner = THIS_MODULE,
},
.probe = hid_als_probe,
.remove = hid_als_remove,

1
drivers/iio/light/hid-sensor-prox.c
View File

@ -373,7 +373,6 @@ static struct platform_driver hid_prox_platform_driver = {
.id_table = hid_prox_ids,
.driver = {
.name = KBUILD_MODNAME,
.owner = THIS_MODULE,
},
.probe = hid_prox_probe,
.remove = hid_prox_remove,

1
drivers/iio/light/lm3533-als.c
View File

@ -915,7 +915,6 @@ static int lm3533_als_remove(struct platform_device *pdev)
static struct platform_driver lm3533_als_driver = {
.driver = {
.name = "lm3533-als",
.owner = THIS_MODULE,
},
.probe = lm3533_als_probe,
.remove = lm3533_als_remove,

10
drivers/iio/magnetometer/ak8975.c
View File

@ -477,8 +477,8 @@ static const struct acpi_device_id ak_acpi_match[] = {
};
MODULE_DEVICE_TABLE(acpi, ak_acpi_match);
static char *ak8975_match_acpi_device(struct device *dev,
enum asahi_compass_chipset *chipset)
static const char *ak8975_match_acpi_device(struct device *dev,
enum asahi_compass_chipset *chipset)
{
const struct acpi_device_id *id;
@ -487,7 +487,7 @@ static char *ak8975_match_acpi_device(struct device *dev,
return NULL;
*chipset = (int)id->driver_data;
return (char *)dev_name(dev);
return dev_name(dev);
}
static int ak8975_probe(struct i2c_client *client,
@ -497,7 +497,7 @@ static int ak8975_probe(struct i2c_client *client,
struct iio_dev *indio_dev;
int eoc_gpio;
int err;
char *name = NULL;
const char *name = NULL;
/* Grab and set up the supplied GPIO. */
if (client->dev.platform_data)
@ -539,7 +539,7 @@ static int ak8975_probe(struct i2c_client *client,
if (id) {
data->chipset =
(enum asahi_compass_chipset)(id->driver_data);
name = (char *) id->name;
name = id->name;
} else if (ACPI_HANDLE(&client->dev))
name = ak8975_match_acpi_device(&client->dev, &data->chipset);
else

8
drivers/iio/magnetometer/hid-sensor-magn-3d.c
View File

@ -246,8 +246,7 @@ static const struct iio_info magn_3d_info = {
};
/* Function to push data to buffer */
static void hid_sensor_push_data(struct iio_dev *indio_dev, const void *data,
int len)
static void hid_sensor_push_data(struct iio_dev *indio_dev, const void *data)
{
dev_dbg(&indio_dev->dev, "hid_sensor_push_data\n");
iio_push_to_buffers(indio_dev, data);
@ -263,9 +262,7 @@ static int magn_3d_proc_event(struct hid_sensor_hub_device *hsdev,
dev_dbg(&indio_dev->dev, "magn_3d_proc_event\n");
if (atomic_read(&magn_state->common_attributes.data_ready))
hid_sensor_push_data(indio_dev,
magn_state->iio_vals,
sizeof(magn_state->iio_vals));
hid_sensor_push_data(indio_dev, magn_state->iio_vals);
return 0;
}
@ -533,7 +530,6 @@ static struct platform_driver hid_magn_3d_platform_driver = {
.id_table = hid_magn_3d_ids,
.driver = {
.name = KBUILD_MODNAME,
.owner = THIS_MODULE,
},
.probe = hid_magn_3d_probe,
.remove = hid_magn_3d_remove,

1
drivers/iio/orientation/hid-sensor-incl-3d.c
View File

@ -437,7 +437,6 @@ static struct platform_driver hid_incl_3d_platform_driver = {
.id_table = hid_incl_3d_ids,
.driver = {
.name = KBUILD_MODNAME,
.owner = THIS_MODULE,
},
.probe = hid_incl_3d_probe,
.remove = hid_incl_3d_remove,

1
drivers/iio/orientation/hid-sensor-rotation.c
View File

@ -334,7 +334,6 @@ static struct platform_driver hid_dev_rot_platform_driver = {
.id_table = hid_dev_rot_ids,
.driver = {
.name = KBUILD_MODNAME,
.owner = THIS_MODULE,
},
.probe = hid_dev_rot_probe,
.remove = hid_dev_rot_remove,

1
drivers/iio/pressure/hid-sensor-press.c
View File

@ -382,7 +382,6 @@ static struct platform_driver hid_press_platform_driver = {
.id_table = hid_press_ids,
.driver = {
.name = KBUILD_MODNAME,
.owner = THIS_MODULE,
},
.probe = hid_press_probe,
.remove = hid_press_remove,

1
drivers/iio/trigger/iio-trig-interrupt.c
View File

@ -109,7 +109,6 @@ static struct platform_driver iio_interrupt_trigger_driver = {
.remove = iio_interrupt_trigger_remove,
.driver = {
.name = "iio_interrupt_trigger",
.owner = THIS_MODULE,
},
};

10
drivers/staging/Kconfig
View File

@ -24,8 +24,6 @@ menuconfig STAGING
if STAGING
source "drivers/staging/et131x/Kconfig"
source "drivers/staging/slicoss/Kconfig"
source "drivers/staging/wlan-ng/Kconfig"
@ -44,12 +42,8 @@ source "drivers/staging/rtl8712/Kconfig"
source "drivers/staging/rtl8188eu/Kconfig"
source "drivers/staging/rtl8192ee/Kconfig"
source "drivers/staging/rtl8723au/Kconfig"
source "drivers/staging/rtl8821ae/Kconfig"
source "drivers/staging/rts5208/Kconfig"
source "drivers/staging/line6/Kconfig"
@ -104,16 +98,12 @@ source "drivers/staging/mt29f_spinand/Kconfig"
source "drivers/staging/lustre/Kconfig"
source "drivers/staging/xillybus/Kconfig"
source "drivers/staging/dgnc/Kconfig"
source "drivers/staging/dgap/Kconfig"
source "drivers/staging/gs_fpgaboot/Kconfig"
source "drivers/staging/nokia_h4p/Kconfig"
source "drivers/staging/skein/Kconfig"
source "drivers/staging/unisys/Kconfig"

5
drivers/staging/Makefile
View File

@ -4,7 +4,6 @@
obj-$(CONFIG_STAGING) += staging.o
obj-y += media/
obj-$(CONFIG_ET131X) += et131x/
obj-$(CONFIG_SLICOSS) += slicoss/
obj-$(CONFIG_PRISM2_USB) += wlan-ng/
obj-$(CONFIG_COMEDI) += comedi/
@ -14,9 +13,7 @@ obj-$(CONFIG_RTL8192U) += rtl8192u/
obj-$(CONFIG_RTL8192E) += rtl8192e/
obj-$(CONFIG_R8712U) += rtl8712/
obj-$(CONFIG_R8188EU) += rtl8188eu/
obj-$(CONFIG_R8192EE) += rtl8192ee/
obj-$(CONFIG_R8723AU) += rtl8723au/
obj-$(CONFIG_R8821AE) += rtl8821ae/
obj-$(CONFIG_RTS5208) += rts5208/
obj-$(CONFIG_LINE6_USB) += line6/
obj-$(CONFIG_NETLOGIC_XLR_NET) += netlogic/
@ -43,11 +40,9 @@ obj-$(CONFIG_DRM_IMX) += imx-drm/
obj-$(CONFIG_FIREWIRE_SERIAL) += fwserial/
obj-$(CONFIG_GOLDFISH) += goldfish/
obj-$(CONFIG_LUSTRE_FS) += lustre/
obj-$(CONFIG_XILLYBUS) += xillybus/
obj-$(CONFIG_DGNC) += dgnc/
obj-$(CONFIG_DGAP) += dgap/
obj-$(CONFIG_MTD_SPINAND_MT29F) += mt29f_spinand/
obj-$(CONFIG_GS_FPGABOOT) += gs_fpgaboot/
obj-$(CONFIG_BT_NOKIA_H4P) += nokia_h4p/
obj-$(CONFIG_CRYPTO_SKEIN) += skein/
obj-$(CONFIG_UNISYSSPAR) += unisys/

19
drivers/staging/android/binder.c
View File

@ -1198,7 +1198,8 @@ static void binder_send_failed_reply(struct binder_transaction *t,
if (target_thread->return_error == BR_OK) {
binder_debug(BINDER_DEBUG_FAILED_TRANSACTION,
"send failed reply for transaction %d to %d:%d\n",
t->debug_id, target_thread->proc->pid,
t->debug_id,
target_thread->proc->pid,
target_thread->pid);
binder_pop_transaction(target_thread, t);
@ -2198,12 +2199,16 @@ retry:
struct binder_work *w;
struct binder_transaction *t = NULL;
if (!list_empty(&thread->todo))
w = list_first_entry(&thread->todo, struct binder_work, entry);
else if (!list_empty(&proc->todo) && wait_for_proc_work)
w = list_first_entry(&proc->todo, struct binder_work, entry);
else {
if (ptr - buffer == 4 && !(thread->looper & BINDER_LOOPER_STATE_NEED_RETURN)) /* no data added */
if (!list_empty(&thread->todo)) {
w = list_first_entry(&thread->todo, struct binder_work,
entry);
} else if (!list_empty(&proc->todo) && wait_for_proc_work) {
w = list_first_entry(&proc->todo, struct binder_work,
entry);
} else {
/* no data added */
if (ptr - buffer == 4 &&
!(thread->looper & BINDER_LOOPER_STATE_NEED_RETURN))
goto retry;
break;
}

2
drivers/staging/android/ion/ion.c
View File

@ -805,6 +805,7 @@ struct ion_client *ion_client_create(struct ion_device *dev,
client, &debug_client_fops);
if (!client->debug_root) {
char buf[256], *path;
path = dentry_path(dev->clients_debug_root, buf, 256);
pr_err("Failed to create client debugfs at %s/%s\n",
path, client->display_name);
@ -1056,7 +1057,6 @@ static void *ion_dma_buf_kmap(struct dma_buf *dmabuf, unsigned long offset)
static void ion_dma_buf_kunmap(struct dma_buf *dmabuf, unsigned long offset,
void *ptr)
{
return;
}
static int ion_dma_buf_begin_cpu_access(struct dma_buf *dmabuf, size_t start,

1
drivers/staging/android/ion/ion_carveout_heap.c
View File

@ -133,7 +133,6 @@ static struct sg_table *ion_carveout_heap_map_dma(struct ion_heap *heap,
static void ion_carveout_heap_unmap_dma(struct ion_heap *heap,
struct ion_buffer *buffer)
{
return;
}
static struct ion_heap_ops carveout_heap_ops = {

1
drivers/staging/android/ion/ion_chunk_heap.c
View File

@ -126,7 +126,6 @@ static struct sg_table *ion_chunk_heap_map_dma(struct ion_heap *heap,
static void ion_chunk_heap_unmap_dma(struct ion_heap *heap,
struct ion_buffer *buffer)
{
return;
}
static struct ion_heap_ops chunk_heap_ops = {

4
drivers/staging/android/ion/ion_dummy_driver.c
View File

@ -68,7 +68,7 @@ static int __init ion_dummy_init(void)
int i, err;
idev = ion_device_create(NULL);
heaps = kzalloc(sizeof(struct ion_heap *) * dummy_ion_pdata.nr,
heaps = kcalloc(dummy_ion_pdata.nr, sizeof(struct ion_heap *),
GFP_KERNEL);
if (!heaps)
return -ENOMEM;
@ -152,7 +152,5 @@ static void __exit ion_dummy_exit(void)
dummy_heaps[ION_HEAP_TYPE_CHUNK].size);
chunk_ptr = NULL;
}
return;
}
__exitcall(ion_dummy_exit);

1
drivers/staging/android/ion/ion_system_heap.c
View File

@ -205,7 +205,6 @@ static struct sg_table *ion_system_heap_map_dma(struct ion_heap *heap,
static void ion_system_heap_unmap_dma(struct ion_heap *heap,
struct ion_buffer *buffer)
{
return;
}
static int ion_system_heap_shrink(struct ion_heap *heap, gfp_t gfp_mask,

9
drivers/staging/android/sw_sync.c
View File

@ -48,11 +48,11 @@ EXPORT_SYMBOL(sw_sync_pt_create);
static struct sync_pt *sw_sync_pt_dup(struct sync_pt *sync_pt)
{
struct sw_sync_pt *pt = (struct sw_sync_pt *) sync_pt;
struct sw_sync_pt *pt = (struct sw_sync_pt *)sync_pt;
struct sw_sync_timeline *obj =
(struct sw_sync_timeline *)sync_pt_parent(sync_pt);
return (struct sync_pt *) sw_sync_pt_create(obj, pt->value);
return (struct sync_pt *)sw_sync_pt_create(obj, pt->value);
}
static int sw_sync_pt_has_signaled(struct sync_pt *sync_pt)
@ -94,9 +94,10 @@ static void sw_sync_timeline_value_str(struct sync_timeline *sync_timeline,
}
static void sw_sync_pt_value_str(struct sync_pt *sync_pt,
char *str, int size)
char *str, int size)
{
struct sw_sync_pt *pt = (struct sw_sync_pt *)sync_pt;
snprintf(str, size, "%d", pt->value);
}
@ -110,7 +111,6 @@ static struct sync_timeline_ops sw_sync_timeline_ops = {
.pt_value_str = sw_sync_pt_value_str,
};
struct sw_sync_timeline *sw_sync_timeline_create(const char *name)
{
struct sw_sync_timeline *obj = (struct sw_sync_timeline *)
@ -156,6 +156,7 @@ static int sw_sync_open(struct inode *inode, struct file *file)
static int sw_sync_release(struct inode *inode, struct file *file)
{
struct sw_sync_timeline *obj = file->private_data;
sync_timeline_destroy(&obj->obj);
return 0;
}

2
drivers/staging/android/sw_sync.h
View File

@ -50,7 +50,7 @@ static inline void sw_sync_timeline_inc(struct sw_sync_timeline *obj, u32 inc)
}
static inline struct sync_pt *sw_sync_pt_create(struct sw_sync_timeline *obj,
u32 value)
u32 value)
{
return NULL;
}

5
drivers/staging/android/sync.c
View File

@ -386,9 +386,9 @@ int sync_fence_wait(struct sync_fence *fence, long timeout)
timeout);
trace_sync_wait(fence, 0);
if (ret < 0)
if (ret < 0) {
return ret;
else if (ret == 0) {
} else if (ret == 0) {
if (timeout) {
pr_info("fence timeout on [%p] after %dms\n", fence,
jiffies_to_msecs(timeout));
@ -704,6 +704,7 @@ static long sync_fence_ioctl(struct file *file, unsigned int cmd,
unsigned long arg)
{
struct sync_fence *fence = file->private_data;
switch (cmd) {
case SYNC_IOC_WAIT:
return sync_fence_ioctl_wait(fence, arg);

3
drivers/staging/android/sync.h
View File

@ -293,7 +293,8 @@ void sync_fence_put(struct sync_fence *fence);
* @fence: fence to install
* @fd: file descriptor in which to install the fence
*
* Installs @fence into @fd. @fd's should be acquired through get_unused_fd().
* Installs @fence into @fd. @fd's should be acquired through
* get_unused_fd_flags(O_CLOEXEC).
*/
void sync_fence_install(struct sync_fence *fence, int fd);

2
drivers/staging/android/uapi/binder.h
View File

@ -169,7 +169,7 @@ struct binder_ptr_cookie {
struct binder_handle_cookie {
__u32 handle;
binder_uintptr_t cookie;
} __attribute__((packed));
} __packed;
struct binder_pri_desc {
__s32 priority;

47
drivers/staging/bcm/Adapter.h
View File

@ -43,8 +43,10 @@ union u_ip_address {
ULONG ulIpv4Mask[MAX_IP_RANGE_LENGTH];
};
struct {
ULONG ulIpv6Addr[MAX_IP_RANGE_LENGTH * 4]; /* Source Ip Address Range */
ULONG ulIpv6Mask[MAX_IP_RANGE_LENGTH * 4]; /* Source Ip Mask Address Range */
/* Source Ip Address Range */
ULONG ulIpv6Addr[MAX_IP_RANGE_LENGTH * 4];
/* Source Ip Mask Address Range */
ULONG ulIpv6Mask[MAX_IP_RANGE_LENGTH * 4];
};
struct {
UCHAR ucIpv4Address[MAX_IP_RANGE_LENGTH * IP_LENGTH_OF_ADDRESS];
@ -57,8 +59,10 @@ union u_ip_address {
};
struct bcm_hdr_suppression_contextinfo {
UCHAR ucaHdrSuppressionInBuf[MAX_PHS_LENGTHS]; /* Intermediate buffer to accumulate pkt Header for PHS */
UCHAR ucaHdrSuppressionOutBuf[MAX_PHS_LENGTHS + PHSI_LEN]; /* Intermediate buffer containing pkt Header after PHS */
/* Intermediate buffer to accumulate pkt Header for PHS */
UCHAR ucaHdrSuppressionInBuf[MAX_PHS_LENGTHS];
/* Intermediate buffer containing pkt Header after PHS */
UCHAR ucaHdrSuppressionOutBuf[MAX_PHS_LENGTHS + PHSI_LEN];
};
struct bcm_classifier_rule {
@ -67,12 +71,14 @@ struct bcm_classifier_rule {
B_UINT16 uiClassifierRuleIndex;
bool bUsed;
USHORT usVCID_Value;
B_UINT8 u8ClassifierRulePriority; /* This field detemines the Classifier Priority */
/* This field detemines the Classifier Priority */
B_UINT8 u8ClassifierRulePriority;
union u_ip_address stSrcIpAddress;
UCHAR ucIPSourceAddressLength; /* Ip Source Address Length */
union u_ip_address stDestIpAddress;
UCHAR ucIPDestinationAddressLength; /* Ip Destination Address Length */
/* Ip Destination Address Length */
UCHAR ucIPDestinationAddressLength;
UCHAR ucIPTypeOfServiceLength; /* Type of service Length */
UCHAR ucTosLow; /* Tos Low */
UCHAR ucTosHigh; /* Tos High */
@ -136,7 +142,8 @@ struct bcm_packet_info {
B_UINT8 u8QueueType; /* BE or rtPS */
UINT uiMaxBucketSize; /* maximum size of the bucket for the queue */
/* maximum size of the bucket for the queue */
UINT uiMaxBucketSize;
UINT uiCurrentQueueDepthOnTarget;
UINT uiCurrentBytesOnHost;
UINT uiCurrentPacketsOnHost;
@ -344,7 +351,8 @@ struct bcm_mini_adapter {
bool bDPLLConfig;
UINT32 aTxPktSizeHist[MIBS_MAX_HIST_ENTRIES];
UINT32 aRxPktSizeHist[MIBS_MAX_HIST_ENTRIES];
struct bcm_fragmented_packet_info astFragmentedPktClassifierTable[MAX_FRAGMENTEDIP_CLASSIFICATION_ENTRIES];
struct bcm_fragmented_packet_info
astFragmentedPktClassifierTable[MAX_FRAGMENTEDIP_CLASSIFICATION_ENTRIES];
atomic_t uiMBupdate;
UINT32 PmuMode;
enum bcm_nvm_type eNVMType;
@ -355,7 +363,8 @@ struct bcm_mini_adapter {
UINT uiNVMDSDSize;
UINT uiVendorExtnFlag;
/* it will always represent chosen DSD at any point of time.
* Generally it is Active DSD but in case of NVM RD/WR it might be different.
* Generally it is Active DSD but in case of NVM RD/WR it
* might be different.
*/
UINT ulFlashCalStart;
ULONG ulFlashControlSectionStart;
@ -372,25 +381,33 @@ struct bcm_mini_adapter {
struct bcm_flash_cs_info *psFlashCSInfo;
struct bcm_flash2x_vendor_info *psFlash2xVendorInfo;
UINT uiFlashBaseAdd; /* Flash start address */
UINT uiActiveISOOffset; /* Active ISO offset chosen before f/w download */
/* Active ISO offset chosen before f/w download */
UINT uiActiveISOOffset;
enum bcm_flash2x_section_val eActiveISO; /* Active ISO section val */
enum bcm_flash2x_section_val eActiveDSD; /* Active DSD val chosen before f/w download */
UINT uiActiveDSDOffsetAtFwDld; /* For accessing Active DSD chosen before f/w download */
/* Active DSD val chosen before f/w download */
enum bcm_flash2x_section_val eActiveDSD;
/* For accessing Active DSD chosen before f/w download */
UINT uiActiveDSDOffsetAtFwDld;
UINT uiFlashLayoutMajorVersion;
UINT uiFlashLayoutMinorVersion;
bool bAllDSDWriteAllow;
bool bSigCorrupted;
/* this should be set who so ever want to change the Headers. after Write it should be reset immediately. */
/* this should be set who so ever want to change the Headers.
* after Write it should be reset immediately.
*/
bool bHeaderChangeAllowed;
int SelectedChip;
bool bEndPointHalted;
/* while bFlashRawRead will be true, Driver ignore map lay out and consider flash as of without any map. */
/* while bFlashRawRead will be true, Driver
* ignore map lay out and consider flash as of without any map.
*/
bool bFlashRawRead;
bool bPreparingForLowPowerMode;
bool bDoSuspend;
UINT syscfgBefFwDld;
bool StopAllXaction;
UINT32 liTimeSinceLastNetEntry; /* Used to Support extended CAPI requirements from */
/* Used to Support extended CAPI requirements from */
UINT32 liTimeSinceLastNetEntry;
struct semaphore LowPowerModeSync;
ULONG liDrainCalculated;
UINT gpioBitMap;

2428
drivers/staging/bcm/Bcmchar.c
View File

File diff suppressed because it is too large Load Diff

101
drivers/staging/bcm/Bcmnet.c
View File

@ -4,23 +4,23 @@ struct net_device *gblpnetdev;
static INT bcm_open(struct net_device *dev)
{
struct bcm_mini_adapter *Adapter = GET_BCM_ADAPTER(dev);
struct bcm_mini_adapter *ad = GET_BCM_ADAPTER(dev);
if (Adapter->fw_download_done == false) {
if (ad->fw_download_done == false) {
pr_notice(PFX "%s: link up failed (download in progress)\n",
dev->name);
return -EBUSY;
}
if (netif_msg_ifup(Adapter))
if (netif_msg_ifup(ad))
pr_info(PFX "%s: enabling interface\n", dev->name);
if (Adapter->LinkUpStatus) {
if (netif_msg_link(Adapter))
if (ad->LinkUpStatus) {
if (netif_msg_link(ad))
pr_info(PFX "%s: link up\n", dev->name);
netif_carrier_on(Adapter->dev);
netif_start_queue(Adapter->dev);
netif_carrier_on(ad->dev);
netif_start_queue(ad->dev);
}
return 0;
@ -28,9 +28,9 @@ static INT bcm_open(struct net_device *dev)
static INT bcm_close(struct net_device *dev)
{
struct bcm_mini_adapter *Adapter = GET_BCM_ADAPTER(dev);
struct bcm_mini_adapter *ad = GET_BCM_ADAPTER(dev);
if (netif_msg_ifdown(Adapter))
if (netif_msg_ifdown(ad))
pr_info(PFX "%s: disabling interface\n", dev->name);
netif_carrier_off(dev);
@ -60,42 +60,42 @@ static u16 bcm_select_queue(struct net_device *dev, struct sk_buff *skb,
static netdev_tx_t bcm_transmit(struct sk_buff *skb, struct net_device *dev)
{
struct bcm_mini_adapter *Adapter = GET_BCM_ADAPTER(dev);
struct bcm_mini_adapter *ad = GET_BCM_ADAPTER(dev);
u16 qindex = skb_get_queue_mapping(skb);
if (Adapter->device_removed || !Adapter->LinkUpStatus)
if (ad->device_removed || !ad->LinkUpStatus)
goto drop;
if (Adapter->TransferMode != IP_PACKET_ONLY_MODE)
if (ad->TransferMode != IP_PACKET_ONLY_MODE)
goto drop;
if (INVALID_QUEUE_INDEX == qindex)
goto drop;
if (Adapter->PackInfo[qindex].uiCurrentPacketsOnHost >=
if (ad->PackInfo[qindex].uiCurrentPacketsOnHost >=
SF_MAX_ALLOWED_PACKETS_TO_BACKUP)
return NETDEV_TX_BUSY;
/* Now Enqueue the packet */
if (netif_msg_tx_queued(Adapter))
if (netif_msg_tx_queued(ad))
pr_info(PFX "%s: enqueueing packet to queue %d\n",
dev->name, qindex);
spin_lock(&Adapter->PackInfo[qindex].SFQueueLock);
Adapter->PackInfo[qindex].uiCurrentBytesOnHost += skb->len;
Adapter->PackInfo[qindex].uiCurrentPacketsOnHost++;
spin_lock(&ad->PackInfo[qindex].SFQueueLock);
ad->PackInfo[qindex].uiCurrentBytesOnHost += skb->len;
ad->PackInfo[qindex].uiCurrentPacketsOnHost++;
*((B_UINT32 *) skb->cb + SKB_CB_LATENCY_OFFSET) = jiffies;
ENQUEUEPACKET(Adapter->PackInfo[qindex].FirstTxQueue,
Adapter->PackInfo[qindex].LastTxQueue, skb);
atomic_inc(&Adapter->TotalPacketCount);
spin_unlock(&Adapter->PackInfo[qindex].SFQueueLock);
ENQUEUEPACKET(ad->PackInfo[qindex].FirstTxQueue,
ad->PackInfo[qindex].LastTxQueue, skb);
atomic_inc(&ad->TotalPacketCount);
spin_unlock(&ad->PackInfo[qindex].SFQueueLock);
/* FIXME - this is racy and incorrect, replace with work queue */
if (!atomic_read(&Adapter->TxPktAvail)) {
atomic_set(&Adapter->TxPktAvail, 1);
wake_up(&Adapter->tx_packet_wait_queue);
if (!atomic_read(&ad->TxPktAvail)) {
atomic_set(&ad->TxPktAvail, 1);
wake_up(&ad->tx_packet_wait_queue);
}
return NETDEV_TX_OK;
@ -142,39 +142,38 @@ static int bcm_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
static void bcm_get_drvinfo(struct net_device *dev,
struct ethtool_drvinfo *info)
{
struct bcm_mini_adapter *Adapter = GET_BCM_ADAPTER(dev);
struct bcm_interface_adapter *psIntfAdapter =
Adapter->pvInterfaceAdapter;
struct usb_device *udev = interface_to_usbdev(psIntfAdapter->interface);
struct bcm_mini_adapter *ad = GET_BCM_ADAPTER(dev);
struct bcm_interface_adapter *intf_ad = ad->pvInterfaceAdapter;
struct usb_device *udev = interface_to_usbdev(intf_ad->interface);
strlcpy(info->driver, DRV_NAME, sizeof(info->driver));
strlcpy(info->version, DRV_VERSION, sizeof(info->version));
snprintf(info->fw_version, sizeof(info->fw_version), "%u.%u",
Adapter->uiFlashLayoutMajorVersion,
Adapter->uiFlashLayoutMinorVersion);
ad->uiFlashLayoutMajorVersion,
ad->uiFlashLayoutMinorVersion);
usb_make_path(udev, info->bus_info, sizeof(info->bus_info));
}
static u32 bcm_get_link(struct net_device *dev)
{
struct bcm_mini_adapter *Adapter = GET_BCM_ADAPTER(dev);
struct bcm_mini_adapter *ad = GET_BCM_ADAPTER(dev);
return Adapter->LinkUpStatus;
return ad->LinkUpStatus;
}
static u32 bcm_get_msglevel(struct net_device *dev)
{
struct bcm_mini_adapter *Adapter = GET_BCM_ADAPTER(dev);
struct bcm_mini_adapter *ad = GET_BCM_ADAPTER(dev);
return Adapter->msg_enable;
return ad->msg_enable;
}
static void bcm_set_msglevel(struct net_device *dev, u32 level)
{
struct bcm_mini_adapter *Adapter = GET_BCM_ADAPTER(dev);
struct bcm_mini_adapter *ad = GET_BCM_ADAPTER(dev);
Adapter->msg_enable = level;
ad->msg_enable = level;
}
static const struct ethtool_ops bcm_ethtool_ops = {
@ -185,12 +184,12 @@ static const struct ethtool_ops bcm_ethtool_ops = {
.set_msglevel = bcm_set_msglevel,
};
int register_networkdev(struct bcm_mini_adapter *Adapter)
int register_networkdev(struct bcm_mini_adapter *ad)
{
struct net_device *net = Adapter->dev;
struct bcm_interface_adapter *IntfAdapter = Adapter->pvInterfaceAdapter;
struct usb_interface *udev = IntfAdapter->interface;
struct usb_device *xdev = IntfAdapter->udev;
struct net_device *net = ad->dev;
struct bcm_interface_adapter *intf_ad = ad->pvInterfaceAdapter;
struct usb_interface *udev = intf_ad->interface;
struct usb_device *xdev = intf_ad->udev;
int result;
@ -205,7 +204,7 @@ int register_networkdev(struct bcm_mini_adapter *Adapter)
SET_NETDEV_DEVTYPE(net, &wimax_type);
/* Read the MAC Address from EEPROM */
result = ReadMacAddressFromNVM(Adapter);
result = ReadMacAddressFromNVM(ad);
if (result != STATUS_SUCCESS) {
dev_err(&udev->dev,
PFX "Error in Reading the mac Address: %d", result);
@ -216,9 +215,9 @@ int register_networkdev(struct bcm_mini_adapter *Adapter)
if (result)
return result;
gblpnetdev = Adapter->dev;
gblpnetdev = ad->dev;
if (netif_msg_probe(Adapter))
if (netif_msg_probe(ad))
dev_info(&udev->dev, PFX "%s: register usb-%s-%s %pM\n",
net->name, xdev->bus->bus_name, xdev->devpath,
net->dev_addr);
@ -226,16 +225,16 @@ int register_networkdev(struct bcm_mini_adapter *Adapter)
return 0;
}
void unregister_networkdev(struct bcm_mini_adapter *Adapter)
void unregister_networkdev(struct bcm_mini_adapter *ad)
{
struct net_device *net = Adapter->dev;
struct bcm_interface_adapter *IntfAdapter = Adapter->pvInterfaceAdapter;
struct usb_interface *udev = IntfAdapter->interface;
struct usb_device *xdev = IntfAdapter->udev;
struct net_device *net = ad->dev;
struct bcm_interface_adapter *intf_ad = ad->pvInterfaceAdapter;
struct usb_interface *udev = intf_ad->interface;
struct usb_device *xdev = intf_ad->udev;
if (netif_msg_probe(Adapter))
if (netif_msg_probe(ad))
dev_info(&udev->dev, PFX "%s: unregister usb-%s%s\n",
net->name, xdev->bus->bus_name, xdev->devpath);
unregister_netdev(Adapter->dev);
unregister_netdev(ad->dev);
}

4
drivers/staging/bcm/HandleControlPacket.c
View File

@ -157,7 +157,9 @@ static VOID handle_rx_control_packet(struct bcm_mini_adapter *Adapter,
* @ingroup ctrl_pkt_functions
* Thread to handle control pkt reception
*/
int control_packet_handler(struct bcm_mini_adapter *Adapter /* pointer to adapter object*/)
/* pointer to adapter object*/
int control_packet_handler(struct bcm_mini_adapter *Adapter)
{
struct sk_buff *ctrl_packet = NULL;
unsigned long flags = 0;

7
drivers/staging/bcm/InterfaceIdleMode.c
View File

@ -188,8 +188,8 @@ static int InterfaceAbortIdlemode(struct bcm_mini_adapter *Adapter,
5000);
if (status)
return status;
else
BCM_DEBUG_PRINT(Adapter, DBG_TYPE_OTHERS,
BCM_DEBUG_PRINT(Adapter, DBG_TYPE_OTHERS,
IDLE_MODE, DBG_LVL_ALL,
"NOB Sent down :%d", lenwritten);
@ -211,8 +211,7 @@ static int InterfaceAbortIdlemode(struct bcm_mini_adapter *Adapter,
else
BCM_DEBUG_PRINT(Adapter, DBG_TYPE_OTHERS,
IDLE_MODE, DBG_LVL_ALL,
"Number of completed iteration to"
"read chip-id :%lu", itr);
"Number of completed iteration to read chip-id :%lu", itr);
status = wrmalt(Adapter, SW_ABORT_IDLEMODE_LOC,
&Pattern, sizeof(status));

2
drivers/staging/bcm/InterfaceMacros.h
View File

@ -10,7 +10,7 @@
#define MAX_DATA_BUFFER_SIZE 2048
//Num of Asynchronous reads pending
/* Num of Asynchronous reads pending */
#define NUM_RX_DESC 64
#define SYS_CFG 0x0F000C00

2
drivers/staging/bcm/InterfaceMisc.h
View File

@ -39,4 +39,4 @@ VOID Bcm_kill_all_URBs(struct bcm_interface_adapter *psIntfAdapter);
#define DISABLE_USB_ZERO_LEN_INT 0x0F011878
#endif // __INTERFACE_MISC_H
#endif /* __INTERFACE_MISC_H */

26
drivers/staging/bcm/Ioctl.h
View File

@ -87,9 +87,9 @@ struct bcm_user_thread_req {
#define IOCTL_BCM_FLASH2X_SECTION_WRITE _IOW(BCM_IOCTL, 0x866, int)
#define IOCTL_BCM_GET_FLASH2X_SECTION_BITMAP _IOR(BCM_IOCTL, 0x867, int)
#define IOCTL_BCM_SET_ACTIVE_SECTION _IOW(BCM_IOCTL, 0x868, int)
#define IOCTL_BCM_IDENTIFY_ACTIVE_SECTION _IO(BCM_IOCTL, 0x869)
#define IOCTL_BCM_IDENTIFY_ACTIVE_SECTION _IO(BCM_IOCTL, 0x869)
#define IOCTL_BCM_COPY_SECTION _IOW(BCM_IOCTL, 0x870, int)
#define IOCTL_BCM_GET_FLASH_CS_INFO _IOR(BCM_IOCTL, 0x871, int)
#define IOCTL_BCM_GET_FLASH_CS_INFO _IOR(BCM_IOCTL, 0x871, int)
#define IOCTL_BCM_SELECT_DSD _IOW(BCM_IOCTL, 0x872, int)
#define IOCTL_BCM_NVM_RAW_READ _IOR(BCM_IOCTL, 0x875, int)
#define IOCTL_BCM_CNTRLMSG_MASK _IOW(BCM_IOCTL, 0x874, int)
@ -130,7 +130,7 @@ struct bcm_bulk_wrm_buffer {
};
enum bcm_flash2x_section_val {
NO_SECTION_VAL = 0, /* no section is chosen when absolute offset is given for RD/WR */
NO_SECTION_VAL = 0, /* no section chosen when absolute offset is given for RD/WR */
ISO_IMAGE1,
ISO_IMAGE2,
DSD0,
@ -152,11 +152,11 @@ enum bcm_flash2x_section_val {
* Structure used for READ/WRITE Flash Map2.x
*/
struct bcm_flash2x_readwrite {
enum bcm_flash2x_section_val Section; /* which section has to be read/written */
u32 offset; /* Offset within Section. */
u32 numOfBytes; /* NOB from the offset */
enum bcm_flash2x_section_val Section; /* section to be read/written */
u32 offset; /* offset within section. */
u32 numOfBytes; /* number of bytes from the offset */
u32 bVerify;
void __user *pDataBuff; /* Buffer for reading/writing */
void __user *pDataBuff; /* buffer for reading/writing */
};
/*
@ -207,20 +207,20 @@ struct bcm_time_elapsed {
};
enum {
WIMAX_IDX = 0, /* To access WiMAX chip GPIO's for GPIO_MULTI_INFO or GPIO_MULTI_MODE */
HOST_IDX, /* To access Host chip GPIO's for GPIO_MULTI_INFO or GPIO_MULTI_MODE */
WIMAX_IDX = 0, /* To access WiMAX chip GPIO's for GPIO_MULTI_INFO or GPIO_MULTI_MODE */
HOST_IDX, /* To access Host chip GPIO's for GPIO_MULTI_INFO or GPIO_MULTI_MODE */
MAX_IDX
};
struct bcm_gpio_multi_info {
unsigned int uiGPIOCommand; /* 1 for set and 0 for get */
unsigned int uiGPIOMask; /* set the correspondig bit to 1 to access GPIO */
unsigned int uiGPIOValue; /* 0 or 1; value to be set when command is 1. */
unsigned int uiGPIOMask; /* set the corresponding bit to 1 to access GPIO */
unsigned int uiGPIOValue; /* 0 or 1; value to be set when command is 1. */
} __packed;
struct bcm_gpio_multi_mode {
unsigned int uiGPIOMode; /* 1 for OUT mode, 0 for IN mode */
unsigned int uiGPIOMask; /* GPIO mask to set mode */
unsigned int uiGPIOMode; /* 1 for OUT mode, 0 for IN mode */
unsigned int uiGPIOMask; /* GPIO mask to set mode */
} __packed;
#endif

81
drivers/staging/bcm/LeakyBucket.c
View File

@ -1,20 +1,16 @@
/**********************************************************************
* LEAKYBUCKET.C
* LEAKYBUCKET.C
* This file contains the routines related to Leaky Bucket Algorithm.
***********************************************************************/
#include "headers.h"
/*********************************************************************
* Function - UpdateTokenCount()
*
* Description - This function calculates the token count for each
* channel and updates the same in Adapter strucuture.
*
* Parameters - Adapter: Pointer to the Adapter structure.
*
* Returns - None
**********************************************************************/
/**
* UpdateTokenCount() - Calculates the token count for each channel
* and updates the same in Adapter structure
* @Adapter: Pointer to the Adapter structure.
*
* Return: None
*/
static VOID UpdateTokenCount(register struct bcm_mini_adapter *Adapter)
{
ULONG liCurrentTime;
@ -59,20 +55,16 @@ static VOID UpdateTokenCount(register struct bcm_mini_adapter *Adapter)
}
/*********************************************************************
* Function - IsPacketAllowedForFlow()
*
* Description - This function checks whether the given packet from the
* specified queue can be allowed for transmission by
* checking the token count.
*
* Parameters - Adapter : Pointer to the Adpater structure.
* - iQIndex : The queue Identifier.
* - ulPacketLength: Number of bytes to be transmitted.
*
* Returns - The number of bytes allowed for transmission.
*
***********************************************************************/
/**
* IsPacketAllowedForFlow() - This function checks whether the given
* packet from the specified queue can be allowed for transmission by
* checking the token count.
* @Adapter: Pointer to the Adpater structure.
* @iQIndex: The queue Identifier.
* @ulPacketLength: Number of bytes to be transmitted.
*
* Returns: The number of bytes allowed for transmission.
*/
static ULONG GetSFTokenCount(struct bcm_mini_adapter *Adapter, struct bcm_packet_info *psSF)
{
BCM_DEBUG_PRINT(Adapter, DBG_TYPE_TX, TOKEN_COUNTS, DBG_LVL_ALL,
@ -256,18 +248,14 @@ static void send_control_packet(struct bcm_mini_adapter *ad,
}
}
/************************************************************************
* Function - CheckAndSendPacketFromIndex()
*
* Description - This function dequeues the data/control packet from the
* specified queue for transmission.
*
* Parameters - Adapter : Pointer to the driver control structure.
* - iQIndex : The queue Identifier.
*
* Returns - None.
*
****************************************************************************/
/**
* CheckAndSendPacketFromIndex() - This function dequeues the
* data/control packet from the specified queue for transmission.
* @Adapter: Pointer to the driver control structure.
* @iQIndex: The queue Identifier.
*
* Returns: None.
*/
static VOID CheckAndSendPacketFromIndex(struct bcm_mini_adapter *Adapter,
struct bcm_packet_info *psSF)
{
@ -284,16 +272,13 @@ static VOID CheckAndSendPacketFromIndex(struct bcm_mini_adapter *Adapter,
}
/*******************************************************************
* Function - transmit_packets()
*
* Description - This function transmits the packets from different
* queues, if free descriptors are available on target.
*
* Parameters - Adapter: Pointer to the Adapter structure.
*
* Returns - None.
********************************************************************/
/**
* transmit_packets() - This function transmits the packets from
* different queues, if free descriptors are available on target.
* @Adapter: Pointer to the Adapter structure.
*
* Returns: None.
*/
VOID transmit_packets(struct bcm_mini_adapter *Adapter)
{
UINT uiPrevTotalCount = 0;

2
drivers/staging/bcm/headers.h
View File

@ -1,6 +1,6 @@
/*******************************************************************
* Headers.h
* Headers.h
*******************************************************************/
#ifndef __HEADERS_H__
#define __HEADERS_H__

4
drivers/staging/bcm/sort.c
View File

@ -28,7 +28,7 @@ VOID SortPackInfo(struct bcm_mini_adapter *Adapter)
DBG_LVL_ALL, "<=======");
sort(Adapter->PackInfo, NO_OF_QUEUES, sizeof(struct bcm_packet_info),
compare_packet_info, NULL);
compare_packet_info, NULL);
}
static int compare_classifiers(void const *a, void const *b)
@ -48,5 +48,5 @@ VOID SortClassifiers(struct bcm_mini_adapter *Adapter)
DBG_LVL_ALL, "<=======");
sort(Adapter->astClassifierTable, MAX_CLASSIFIERS,
sizeof(struct bcm_classifier_rule), compare_classifiers, NULL);
sizeof(struct bcm_classifier_rule), compare_classifiers, NULL);
}

19
drivers/staging/bcm/vendorspecificextn.c
View File

@ -11,7 +11,8 @@
* STATUS_SUCCESS/STATUS_FAILURE
*
*/
INT vendorextnGetSectionInfo(PVOID pContext, struct bcm_flash2x_vendor_info *pVendorInfo)
INT vendorextnGetSectionInfo(PVOID pContext,
struct bcm_flash2x_vendor_info *pVendorInfo)
{
return STATUS_FAILURE;
}
@ -61,7 +62,8 @@ INT vendorextnExit(struct bcm_mini_adapter *Adapter)
* arg -input parameter sent by vendor
*
* Returns:
* CONTINUE_COMMON_PATH in case it is not meant to be processed by vendor ioctls
* CONTINUE_COMMON_PATH in case it is not meant to be processed
* by vendor ioctls
* STATUS_SUCCESS/STATUS_FAILURE as per the IOCTL return value
*/
@ -88,8 +90,8 @@ INT vendorextnIoctl(struct bcm_mini_adapter *Adapter, UINT cmd, ULONG arg)
* STATUS_SUCCESS/STATUS_FAILURE
*/
INT vendorextnReadSection(PVOID pContext, PUCHAR pBuffer, enum bcm_flash2x_section_val SectionVal,
UINT offset, UINT numOfBytes)
INT vendorextnReadSection(PVOID pContext, PUCHAR pBuffer,
enum bcm_flash2x_section_val SectionVal, UINT offset, UINT numOfBytes)
{
return STATUS_FAILURE;
}
@ -112,8 +114,9 @@ INT vendorextnReadSection(PVOID pContext, PUCHAR pBuffer, enum bcm_flash2x_sect
* Returns:
* STATUS_SUCCESS/STATUS_FAILURE
*/
INT vendorextnWriteSection(PVOID pContext, PUCHAR pBuffer, enum bcm_flash2x_section_val SectionVal,
UINT offset, UINT numOfBytes, bool bVerify)
INT vendorextnWriteSection(PVOID pContext, PUCHAR pBuffer,
enum bcm_flash2x_section_val SectionVal, UINT offset,
UINT numOfBytes, bool bVerify)
{
return STATUS_FAILURE;
}
@ -135,8 +138,8 @@ INT vendorextnWriteSection(PVOID pContext, PUCHAR pBuffer, enum bcm_flash2x_sec
* Returns:
* STATUS_SUCCESS/STATUS_FAILURE
*/
INT vendorextnWriteSectionWithoutErase(PVOID pContext, PUCHAR pBuffer, enum bcm_flash2x_section_val SectionVal,
UINT offset, UINT numOfBytes)
INT vendorextnWriteSectionWithoutErase(PVOID pContext, PUCHAR pBuffer,
enum bcm_flash2x_section_val SectionVal, UINT offset, UINT numOfBytes)
{
return STATUS_FAILURE;
}

75
drivers/staging/comedi/Kconfig
View File

@ -42,24 +42,20 @@ menuconfig COMEDI_MISC_DRIVERS
if COMEDI_MISC_DRIVERS
config COMEDI_KCOMEDILIB
tristate "Comedi kcomedilib"
---help---
Build the kcomedilib
config COMEDI_BOND
tristate "Device bonding support"
depends on COMEDI_KCOMEDILIB
tristate "Comedi device bonding support"
select COMEDI_KCOMEDILIB
---help---
Enable support for a driver to 'bond' (merge) multiple subdevices
from multiple devices together as one.
Currently, it only handles digital I/O subdevices.
To compile this driver as a module, choose M here: the module will be
called comedi_bond.
config COMEDI_TEST
tristate "Fake waveform generator support"
select COMEDI_FC
---help---
Enable support for the fake waveform generator.
This driver is mainly for testing purposes, but can also be used to
@ -88,14 +84,6 @@ config COMEDI_SERIAL2002
To compile this driver as a module, choose M here: the module will be
called serial2002.
config COMEDI_SKEL
tristate "Comedi skeleton driver"
---help---
Build the Skeleton driver, an example for driver writers
To compile this driver as a module, choose M here: the module will be
called skel.
config COMEDI_SSV_DNP
tristate "SSV Embedded Systems DIL/Net-PC support"
depends on X86_32 || COMPILE_TEST
@ -181,7 +169,6 @@ config COMEDI_PCL730
config COMEDI_PCL812
tristate "Advantech PCL-812/813 and ADlink ACL-8112/8113/8113/8216"
depends on VIRT_TO_BUS && ISA_DMA_API
select COMEDI_FC
---help---
Enable support for Advantech PCL-812/PG, PCL-813/B, ADLink
ACL-8112DG/HG/PG, ACL-8113, ACL-8216, ICP DAS A-821PGH/PGL/PGL-NDA,
@ -193,7 +180,6 @@ config COMEDI_PCL812
config COMEDI_PCL816
tristate "Advantech PCL-814 and PCL-816 ISA card support"
depends on VIRT_TO_BUS && ISA_DMA_API
select COMEDI_FC
---help---
Enable support for Advantech PCL-814 and PCL-816 ISA cards
@ -203,7 +189,6 @@ config COMEDI_PCL816
config COMEDI_PCL818
tristate "Advantech PCL-718 and PCL-818 ISA card support"
depends on VIRT_TO_BUS && ISA_DMA_API
select COMEDI_FC
---help---
Enable support for Advantech PCL-818 ISA cards
PCL-818L, PCL-818H, PCL-818HD, PCL-818HG, PCL-818 and PCL-718
@ -275,7 +260,6 @@ config COMEDI_DAC02
config COMEDI_DAS16M1
tristate "MeasurementComputing CIO-DAS16/M1DAS-16 ISA card support"
select COMEDI_8255
select COMEDI_FC
---help---
Enable support for Measurement Computing CIO-DAS16/M1 ISA cards.
@ -299,7 +283,6 @@ config COMEDI_DAS16
tristate "DAS-16 compatible ISA and PC/104 card support"
depends on ISA_DMA_API
select COMEDI_8255
select COMEDI_FC
---help---
Enable support for Keithley Metrabyte/ComputerBoards DAS16
and compatible ISA and PC/104 cards:
@ -315,7 +298,6 @@ config COMEDI_DAS16
config COMEDI_DAS800
tristate "DAS800 and compatible ISA card support"
select COMEDI_FC
---help---
Enable support for Keithley Metrabyte DAS800 and compatible ISA cards
Keithley Metrabyte DAS-800, DAS-801, DAS-802
@ -328,7 +310,6 @@ config COMEDI_DAS800
config COMEDI_DAS1800
tristate "DAS1800 and compatible ISA card support"
depends on VIRT_TO_BUS && ISA_DMA_API
select COMEDI_FC
---help---
Enable support for DAS1800 and compatible ISA cards
Keithley Metrabyte DAS-1701ST, DAS-1701ST-DA, DAS-1701/AO,
@ -391,7 +372,6 @@ config COMEDI_DT2817
config COMEDI_DT282X
tristate "Data Translation DT2821 series and DT-EZ ISA card support"
select COMEDI_FC
depends on VIRT_TO_BUS && ISA_DMA_API
---help---
Enable support for Data Translation DT2821 series including DT-EZ
@ -480,7 +460,6 @@ config COMEDI_ADQ12B
config COMEDI_NI_AT_A2150
tristate "NI AT-A2150 ISA card support"
select COMEDI_FC
depends on VIRT_TO_BUS && ISA_DMA_API
---help---
Enable support for National Instruments AT-A2150 cards
@ -500,7 +479,6 @@ config COMEDI_NI_ATMIO
tristate "NI AT-MIO E series ISA-PNP card support"
select COMEDI_8255
select COMEDI_NI_TIO
select COMEDI_FC
---help---
Enable support for National Instruments AT-MIO E series cards
National Instruments AT-MIO-16E-1 (ni_atmio),
@ -688,8 +666,8 @@ config COMEDI_ADDI_APCI_2200
config COMEDI_ADDI_APCI_3120
tristate "ADDI-DATA APCI_3120/3001 support"
depends on HAS_DMA
depends on VIRT_TO_BUS
select COMEDI_FC
---help---
Enable support for ADDI-DATA APCI_3120/3001 cards
@ -741,7 +719,6 @@ config COMEDI_ADL_PCI8164
config COMEDI_ADL_PCI9111
tristate "ADLink PCI-9111HR support"
select COMEDI_FC
---help---
Enable support for ADlink PCI9111 cards
@ -750,7 +727,7 @@ config COMEDI_ADL_PCI9111
config COMEDI_ADL_PCI9118
tristate "ADLink PCI-9118DG, PCI-9118HG, PCI-9118HR support"
select COMEDI_FC
depends on HAS_DMA
depends on VIRT_TO_BUS
---help---
Enable support for ADlink PCI-9118DG, PCI-9118HG, PCI-9118HR cards
@ -760,7 +737,6 @@ config COMEDI_ADL_PCI9118
config COMEDI_ADV_PCI1710
tristate "Advantech PCI-171x, PCI-1720 and PCI-1731 support"
select COMEDI_FC
---help---
Enable support for Advantech PCI-1710, PCI-1710HG, PCI-1711,
PCI-1713, PCI-1720 and PCI-1731
@ -828,7 +804,6 @@ config COMEDI_AMPLC_PC263_PCI
config COMEDI_AMPLC_PCI224
tristate "Amplicon PCI224 and PCI234 support"
select COMEDI_FC
---help---
Enable support for Amplicon PCI224 and PCI234 AO boards
@ -864,7 +839,6 @@ config COMEDI_DAS08_PCI
config COMEDI_DT3000
tristate "Data Translation DT3000 series support"
select COMEDI_FC
---help---
Enable support for Data Translation DT3000 series
DT3001, DT3001-PGL, DT3002, DT3003, DT3003-PGL, DT3004, DT3005 and
@ -884,7 +858,6 @@ config COMEDI_DYNA_PCI10XX
config COMEDI_GSC_HPDI
tristate "General Standards PCI-HPDI32 / PMC-HPDI32 support"
select COMEDI_FC
---help---
Enable support for General Standards Corporation high speed parallel
digital interface rs485 boards PCI-HPDI32 and PMC-HPDI32.
@ -935,7 +908,6 @@ config COMEDI_KE_COUNTER
config COMEDI_CB_PCIDAS64
tristate "MeasurementComputing PCI-DAS 64xx, 60xx, and 4020 support"
select COMEDI_8255
select COMEDI_FC
---help---
Enable support for ComputerBoards/MeasurementComputing PCI-DAS 64xx,
60xx, and 4020 series with the PLX 9080 PCI controller
@ -946,7 +918,6 @@ config COMEDI_CB_PCIDAS64
config COMEDI_CB_PCIDAS
tristate "MeasurementComputing PCI-DAS support"
select COMEDI_8255
select COMEDI_FC
---help---
Enable support for ComputerBoards/MeasurementComputing PCI-DAS with
AMCC S5933 PCIcontroller: PCI-DAS1602/16, PCI-DAS1602/16jr,
@ -1069,7 +1040,6 @@ config COMEDI_NI_PCIMIO
depends on HAS_DMA
select COMEDI_NI_TIOCMD
select COMEDI_8255
select COMEDI_FC
---help---
Enable support for National Instruments PCI-MIO-E series and M series
(all boards): PCI-MIO-16XE-10, PXI-6030E, PCI-MIO-16E-1,
@ -1095,7 +1065,6 @@ config COMEDI_RTD520
config COMEDI_S626
tristate "Sensoray 626 support"
select COMEDI_FC
---help---
Enable support for Sensoray 626
@ -1104,7 +1073,6 @@ config COMEDI_S626
config COMEDI_MITE
depends on HAS_DMA
select COMEDI_FC
tristate
config COMEDI_NI_TIOCMD
@ -1172,7 +1140,6 @@ config COMEDI_NI_MIO_CS
tristate "NI DAQCard E series PCMCIA support"
select COMEDI_NI_TIO
select COMEDI_8255
select COMEDI_FC
---help---
Enable support for the National Instruments PCMCIA DAQCard E series
DAQCard-ai-16xe-50, DAQCard-ai-16e-4, DAQCard-6062E, DAQCard-6024E
@ -1183,7 +1150,6 @@ config COMEDI_NI_MIO_CS
config COMEDI_QUATECH_DAQP_CS
tristate "Quatech DAQP PCMCIA data capture card support"
select COMEDI_FC
---help---
Enable support for the Quatech DAQP PCMCIA data capture cards
DAQP-208 and DAQP-308
@ -1209,6 +1175,17 @@ config COMEDI_DT9812
To compile this driver as a module, choose M here: the module will be
called dt9812.
config COMEDI_NI_USB6501
tristate "NI USB-6501 support"
---help---
Enable support for the National Instruments USB-6501 module.
The NI USB-6501 is a Full-Speed USB 2.0 (12 Mbit/s) device that
provides 24 digital I/O lines channels and one 32-bit counter.
To compile this driver as a module, choose M here: the module will be
called ni_usb6501.
config COMEDI_USBDUX
tristate "ITL USB-DUX-D support"
---help---
@ -1219,7 +1196,6 @@ config COMEDI_USBDUX
config COMEDI_USBDUXFAST
tristate "ITL USB-DUXfast support"
select COMEDI_FC
---help---
Enable support for the Incite Technology Ltd USB-DUXfast Board
@ -1228,7 +1204,6 @@ config COMEDI_USBDUXFAST
config COMEDI_USBDUXSIGMA
tristate "ITL USB-DUXsigma support"
select COMEDI_FC
---help---
Enable support for the Incite Technology Ltd USB-DUXsigma Board
@ -1261,8 +1236,19 @@ config COMEDI_8255
To compile this driver as a module, choose M here: the module will be
called 8255.
config COMEDI_FC
tristate
config COMEDI_KCOMEDILIB
tristate "Comedi kcomedilib"
---help---
Build the kcomedilib.
This is a kernel module used to open and manipulate Comedi devices
from within kernel code. It is currently only used by the
comedi_bond driver, and its functionality has been stripped down to
the needs of that driver, so is currently not very useful for
anything else.
To compile kcomedilib as a module, choose M here: the module will be
called kcomedilib.
config COMEDI_AMPLC_DIO200
tristate
@ -1278,7 +1264,6 @@ config COMEDI_DAS08
config COMEDI_NI_LABPC
tristate
select COMEDI_8255
select COMEDI_FC
config COMEDI_NI_LABPC_ISADMA
tristate

32
drivers/staging/comedi/comedi.h
View File

@ -123,38 +123,48 @@
/* trigger flags */
/* These flags are used in comedi_trig structures */
#define TRIG_BOGUS 0x0001 /* do the motions */
#define TRIG_DITHER 0x0002 /* enable dithering */
#define TRIG_DEGLITCH 0x0004 /* enable deglitching */
/*#define TRIG_RT 0x0008 *//* perform op in real time */
#define TRIG_CONFIG 0x0010 /* perform configuration, not triggering */
#define TRIG_WAKE_EOS 0x0020 /* wake up on end-of-scan events */
/*#define TRIG_WRITE 0x0040*//* write to bidirectional devices */
/* command flags */
/* These flags are used in comedi_cmd structures */
#define CMDF_BOGUS 0x00000001 /* do the motions */
/* try to use a real-time interrupt while performing command */
#define CMDF_PRIORITY 0x00000008
#define TRIG_RT CMDF_PRIORITY /* compatibility definition */
/* wake up on end-of-scan events */
#define CMDF_WAKE_EOS 0x00000020
#define CMDF_WRITE 0x00000040
#define TRIG_WRITE CMDF_WRITE /* compatibility definition */
#define CMDF_RAWDATA 0x00000080
/* timer rounding definitions */
#define CMDF_ROUND_MASK 0x00030000
#define CMDF_ROUND_NEAREST 0x00000000
#define CMDF_ROUND_DOWN 0x00010000
#define CMDF_ROUND_UP 0x00020000
#define CMDF_ROUND_UP_NEXT 0x00030000
#define COMEDI_EV_START 0x00040000
#define COMEDI_EV_SCAN_BEGIN 0x00080000
#define COMEDI_EV_CONVERT 0x00100000
#define COMEDI_EV_SCAN_END 0x00200000
#define COMEDI_EV_STOP 0x00400000
#define TRIG_ROUND_MASK 0x00030000
#define TRIG_ROUND_NEAREST 0x00000000
#define TRIG_ROUND_DOWN 0x00010000
#define TRIG_ROUND_UP 0x00020000
#define TRIG_ROUND_UP_NEXT 0x00030000
/* compatibility definitions */
#define TRIG_BOGUS CMDF_BOGUS
#define TRIG_RT CMDF_PRIORITY
#define TRIG_WAKE_EOS CMDF_WAKE_EOS
#define TRIG_WRITE CMDF_WRITE
#define TRIG_ROUND_MASK CMDF_ROUND_MASK
#define TRIG_ROUND_NEAREST CMDF_ROUND_NEAREST
#define TRIG_ROUND_DOWN CMDF_ROUND_DOWN
#define TRIG_ROUND_UP CMDF_ROUND_UP
#define TRIG_ROUND_UP_NEXT CMDF_ROUND_UP_NEXT
/* trigger sources */

66
drivers/staging/comedi/comedi_buf.c
View File

@ -3,6 +3,7 @@
*
* COMEDI - Linux Control and Measurement Device Interface
* Copyright (C) 1997-2000 David A. Schleef <ds@schleef.org>
* Copyright (C) 2002 Frank Mori Hess <fmhess@users.sourceforge.net>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@ -509,3 +510,68 @@ void comedi_buf_memcpy_from(struct comedi_subdevice *s, unsigned int offset,
}
}
EXPORT_SYMBOL_GPL(comedi_buf_memcpy_from);
/**
* comedi_write_array_to_buffer - write data to comedi buffer
* @s: comedi_subdevice struct
* @data: destination
* @num_bytes: number of bytes to write
*
* Writes up to num_bytes bytes of data to the comedi buffer associated with
* the subdevice, marks it as written and updates the acquisition scan
* progress.
*
* Returns the amount of data written in bytes.
*/
unsigned int comedi_write_array_to_buffer(struct comedi_subdevice *s,
const void *data,
unsigned int num_bytes)
{
struct comedi_async *async = s->async;
unsigned int retval;
if (num_bytes == 0)
return 0;
retval = comedi_buf_write_alloc(s, num_bytes);
if (retval != num_bytes) {
dev_warn(s->device->class_dev, "buffer overrun\n");
async->events |= COMEDI_CB_OVERFLOW;
return 0;
}
comedi_buf_memcpy_to(s, 0, data, num_bytes);
comedi_buf_write_free(s, num_bytes);
comedi_inc_scan_progress(s, num_bytes);
async->events |= COMEDI_CB_BLOCK;
return num_bytes;
}
EXPORT_SYMBOL_GPL(comedi_write_array_to_buffer);
/**
* comedi_read_array_from_buffer - read data from comedi buffer
* @s: comedi_subdevice struct
* @data: destination
* @num_bytes: number of bytes to read
*
* Reads up to num_bytes bytes of data from the comedi buffer associated with
* the subdevice, marks it as read and updates the acquisition scan progress.
*
* Returns the amount of data read in bytes.
*/
unsigned int comedi_read_array_from_buffer(struct comedi_subdevice *s,
void *data, unsigned int num_bytes)
{
if (num_bytes == 0)
return 0;
num_bytes = comedi_buf_read_alloc(s, num_bytes);
comedi_buf_memcpy_from(s, 0, data, num_bytes);
comedi_buf_read_free(s, num_bytes);
comedi_inc_scan_progress(s, num_bytes);
s->async->events |= COMEDI_CB_BLOCK;
return num_bytes;
}
EXPORT_SYMBOL_GPL(comedi_read_array_from_buffer);

4
drivers/staging/comedi/comedi_fops.c
View File

@ -1532,7 +1532,7 @@ static int do_cmd_ioctl(struct comedi_device *dev,
ret = s->do_cmdtest(dev, s, &async->cmd);
if (async->cmd.flags & TRIG_BOGUS || ret) {
if (async->cmd.flags & CMDF_BOGUS || ret) {
dev_dbg(dev->class_dev, "test returned %d\n", ret);
cmd = async->cmd;
/* restore chanlist pointer before copying back */
@ -1558,7 +1558,7 @@ static int do_cmd_ioctl(struct comedi_device *dev,
async->cb_mask =
COMEDI_CB_EOA | COMEDI_CB_BLOCK | COMEDI_CB_ERROR |
COMEDI_CB_OVERFLOW;
if (async->cmd.flags & TRIG_WAKE_EOS)
if (async->cmd.flags & CMDF_WAKE_EOS)
async->cb_mask |= COMEDI_CB_EOS;
comedi_set_subdevice_runflags(s, SRF_ERROR | SRF_RUNNING, SRF_RUNNING);

24
drivers/staging/comedi/comedi_pci.c
View File

@ -17,6 +17,7 @@
*/
#include <linux/pci.h>
#include <linux/interrupt.h>
#include "comedidev.h"
@ -72,6 +73,29 @@ void comedi_pci_disable(struct comedi_device *dev)
}
EXPORT_SYMBOL_GPL(comedi_pci_disable);
/**
* comedi_pci_detach() - A generic (*detach) function for PCI drivers.
* @dev: comedi_device struct
*/
void comedi_pci_detach(struct comedi_device *dev)
{
struct pci_dev *pcidev = comedi_to_pci_dev(dev);
if (!pcidev || !dev->ioenabled)
return;
if (dev->irq) {
free_irq(dev->irq, dev);
dev->irq = 0;
}
if (dev->mmio) {
iounmap(dev->mmio);
dev->mmio = NULL;
}
comedi_pci_disable(dev);
}
EXPORT_SYMBOL_GPL(comedi_pci_detach);
/**
* comedi_pci_auto_config() - Configure/probe a comedi PCI driver.
* @pcidev: pci_dev struct

27
drivers/staging/comedi/comedidev.h
View File

@ -88,6 +88,8 @@ struct comedi_subdevice {
struct device *class_dev;
int minor;
unsigned int *readback;
};
struct comedi_buf_page {
@ -267,11 +269,6 @@ struct comedi_device {
void (*close)(struct comedi_device *dev);
};
static inline const void *comedi_board(const struct comedi_device *dev)
{
return dev->board_ptr;
}
/*
* function prototypes
*/
@ -429,6 +426,11 @@ void comedi_buf_memcpy_to(struct comedi_subdevice *s, unsigned int offset,
const void *source, unsigned int num_bytes);
void comedi_buf_memcpy_from(struct comedi_subdevice *s, unsigned int offset,
void *destination, unsigned int num_bytes);
unsigned int comedi_write_array_to_buffer(struct comedi_subdevice *s,
const void *data,
unsigned int num_bytes);
unsigned int comedi_read_array_from_buffer(struct comedi_subdevice *s,
void *data, unsigned int num_bytes);
/* drivers.c - general comedi driver functions */
@ -440,14 +442,24 @@ int comedi_timeout(struct comedi_device *, struct comedi_subdevice *,
struct comedi_insn *, unsigned long context),
unsigned long context);
unsigned int comedi_handle_events(struct comedi_device *dev,
struct comedi_subdevice *s);
int comedi_dio_insn_config(struct comedi_device *, struct comedi_subdevice *,
struct comedi_insn *, unsigned int *data,
unsigned int mask);
unsigned int comedi_dio_update_state(struct comedi_subdevice *,
unsigned int *data);
unsigned int comedi_bytes_per_scan(struct comedi_subdevice *s);
void comedi_inc_scan_progress(struct comedi_subdevice *s,
unsigned int num_bytes);
void *comedi_alloc_devpriv(struct comedi_device *, size_t);
int comedi_alloc_subdevices(struct comedi_device *, int);
int comedi_alloc_subdev_readback(struct comedi_subdevice *);
int comedi_readback_insn_read(struct comedi_device *, struct comedi_subdevice *,
struct comedi_insn *, unsigned int *data);
int comedi_load_firmware(struct comedi_device *, struct device *,
const char *name,
@ -503,6 +515,7 @@ struct pci_dev *comedi_to_pci_dev(struct comedi_device *);
int comedi_pci_enable(struct comedi_device *);
void comedi_pci_disable(struct comedi_device *);
void comedi_pci_detach(struct comedi_device *);
int comedi_pci_auto_config(struct pci_dev *, struct comedi_driver *,
unsigned long context);
@ -547,6 +560,10 @@ static inline void comedi_pci_disable(struct comedi_device *dev)
{
}
static inline void comedi_pci_detach(struct comedi_device *dev)
{
}
#endif /* CONFIG_COMEDI_PCI_DRIVERS */
#ifdef CONFIG_COMEDI_PCMCIA_DRIVERS

137
drivers/staging/comedi/drivers.c
View File

@ -4,6 +4,7 @@
COMEDI - Linux Control and Measurement Device Interface
Copyright (C) 1997-2000 David A. Schleef <ds@schleef.org>
Copyright (C) 2002 Frank Mori Hess <fmhess@users.sourceforge.net>
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
@ -96,6 +97,22 @@ int comedi_alloc_subdevices(struct comedi_device *dev, int num_subdevices)
}
EXPORT_SYMBOL_GPL(comedi_alloc_subdevices);
/**
* comedi_alloc_subdev_readback() - Allocate memory for the subdevice readback.
* @s: comedi_subdevice struct
*/
int comedi_alloc_subdev_readback(struct comedi_subdevice *s)
{
if (!s->n_chan)
return -EINVAL;
s->readback = kcalloc(s->n_chan, sizeof(*s->readback), GFP_KERNEL);
if (!s->readback)
return -ENOMEM;
return 0;
}
EXPORT_SYMBOL_GPL(comedi_alloc_subdev_readback);
static void comedi_device_detach_cleanup(struct comedi_device *dev)
{
int i;
@ -111,6 +128,7 @@ static void comedi_device_detach_cleanup(struct comedi_device *dev)
comedi_buf_alloc(dev, s, 0);
kfree(s->async);
}
kfree(s->readback);
}
kfree(dev->subdevices);
dev->subdevices = NULL;
@ -156,6 +174,31 @@ int insn_inval(struct comedi_device *dev, struct comedi_subdevice *s,
return -EINVAL;
}
/**
* comedi_readback_insn_read() - A generic (*insn_read) for subdevice readback.
* @dev: comedi_device struct
* @s: comedi_subdevice struct
* @insn: comedi_insn struct
* @data: pointer to return the readback data
*/
int comedi_readback_insn_read(struct comedi_device *dev,
struct comedi_subdevice *s,
struct comedi_insn *insn,
unsigned int *data)
{
unsigned int chan = CR_CHAN(insn->chanspec);
int i;
if (!s->readback)
return -EINVAL;
for (i = 0; i < insn->n; i++)
data[i] = s->readback[chan];
return insn->n;
}
EXPORT_SYMBOL_GPL(comedi_readback_insn_read);
/**
* comedi_timeout() - busy-wait for a driver condition to occur.
* @dev: comedi_device struct
@ -248,6 +291,100 @@ unsigned int comedi_dio_update_state(struct comedi_subdevice *s,
}
EXPORT_SYMBOL_GPL(comedi_dio_update_state);
/**
* comedi_bytes_per_scan - get length of asynchronous command "scan" in bytes
* @s: comedi_subdevice struct
*
* Determines the overall scan length according to the subdevice type and the
* number of channels in the scan.
*
* For digital input, output or input/output subdevices, samples for multiple
* channels are assumed to be packed into one or more unsigned short or
* unsigned int values according to the subdevice's SDF_LSAMPL flag. For other
* types of subdevice, samples are assumed to occupy a whole unsigned short or
* unsigned int according to the SDF_LSAMPL flag.
*
* Returns the overall scan length in bytes.
*/
unsigned int comedi_bytes_per_scan(struct comedi_subdevice *s)
{
struct comedi_cmd *cmd = &s->async->cmd;
unsigned int num_samples;
unsigned int bits_per_sample;
switch (s->type) {
case COMEDI_SUBD_DI:
case COMEDI_SUBD_DO:
case COMEDI_SUBD_DIO:
bits_per_sample = 8 * bytes_per_sample(s);
num_samples = (cmd->chanlist_len + bits_per_sample - 1) /
bits_per_sample;
break;
default:
num_samples = cmd->chanlist_len;
break;
}
return num_samples * bytes_per_sample(s);
}
EXPORT_SYMBOL_GPL(comedi_bytes_per_scan);
/**
* comedi_inc_scan_progress - update scan progress in asynchronous command
* @s: comedi_subdevice struct
* @num_bytes: amount of data in bytes to increment scan progress
*
* Increments the scan progress by the number of bytes specified by num_bytes.
* If the scan progress reaches or exceeds the scan length in bytes, reduce
* it modulo the scan length in bytes and set the "end of scan" asynchronous
* event flag to be processed later.
*/
void comedi_inc_scan_progress(struct comedi_subdevice *s,
unsigned int num_bytes)
{
struct comedi_async *async = s->async;
unsigned int scan_length = comedi_bytes_per_scan(s);
async->scan_progress += num_bytes;
if (async->scan_progress >= scan_length) {
async->scan_progress %= scan_length;
async->events |= COMEDI_CB_EOS;
}
}
EXPORT_SYMBOL_GPL(comedi_inc_scan_progress);
/**
* comedi_handle_events - handle events and possibly stop acquisition
* @dev: comedi_device struct
* @s: comedi_subdevice struct
*
* Handles outstanding asynchronous acquisition event flags associated
* with the subdevice. Call the subdevice's "->cancel()" handler if the
* "end of acquisition", "error" or "overflow" event flags are set in order
* to stop the acquisition at the driver level.
*
* Calls comedi_event() to further process the event flags, which may mark
* the asynchronous command as no longer running, possibly terminated with
* an error, and may wake up tasks.
*
* Return a bit-mask of the handled events.
*/
unsigned int comedi_handle_events(struct comedi_device *dev,
struct comedi_subdevice *s)
{
unsigned int events = s->async->events;
if (events == 0)
return events;
if (events & (COMEDI_CB_EOA | COMEDI_CB_ERROR | COMEDI_CB_OVERFLOW))
s->cancel(dev, s);
comedi_event(dev, s);
return events;
}
EXPORT_SYMBOL_GPL(comedi_handle_events);
static int insn_rw_emulate_bits(struct comedi_device *dev,
struct comedi_subdevice *s,
struct comedi_insn *insn, unsigned int *data)

8
drivers/staging/comedi/drivers/8253.h
View File

@ -90,8 +90,8 @@ static inline void i8253_cascade_ns_to_timer(int i8253_osc_base,
}
}
switch (flags & TRIG_ROUND_MASK) {
case TRIG_ROUND_NEAREST:
switch (flags & CMDF_ROUND_MASK) {
case CMDF_ROUND_NEAREST:
default:
ns_high = div1_lub * div2_lub * i8253_osc_base;
ns_low = div1_glb * div2_glb * i8253_osc_base;
@ -103,11 +103,11 @@ static inline void i8253_cascade_ns_to_timer(int i8253_osc_base,
div2 = div2_glb;
}
break;
case TRIG_ROUND_UP:
case CMDF_ROUND_UP:
div1 = div1_lub;
div2 = div2_lub;
break;
case TRIG_ROUND_DOWN:
case CMDF_ROUND_DOWN:
div1 = div1_glb;
div2 = div2_glb;
break;

198
drivers/staging/comedi/drivers/8255.c
View File

@ -79,49 +79,30 @@ I/O port base address can be found in the output of 'lspci -v'.
#include "comedi_fc.h"
#include "8255.h"
#define _8255_SIZE 4
#define _8255_DATA 0
#define _8255_CR 3
#define CR_C_LO_IO 0x01
#define CR_B_IO 0x02
#define CR_B_MODE 0x04
#define CR_C_HI_IO 0x08
#define CR_A_IO 0x10
#define CR_A_MODE(a) ((a)<<5)
#define CR_CW 0x80
struct subdev_8255_private {
unsigned long iobase;
int (*io)(int, int, int, unsigned long);
unsigned long regbase;
int (*io)(struct comedi_device *, int, int, int, unsigned long);
};
static int subdev_8255_io(int dir, int port, int data, unsigned long iobase)
static int subdev_8255_io(struct comedi_device *dev,
int dir, int port, int data, unsigned long regbase)
{
if (dir) {
outb(data, iobase + port);
outb(data, dev->iobase + regbase + port);
return 0;
}
return inb(iobase + port);
return inb(dev->iobase + regbase + port);
}
void subdev_8255_interrupt(struct comedi_device *dev,
struct comedi_subdevice *s)
static int subdev_8255_mmio(struct comedi_device *dev,
int dir, int port, int data, unsigned long regbase)
{
struct subdev_8255_private *spriv = s->private;
unsigned long iobase = spriv->iobase;
unsigned short d;
d = spriv->io(0, _8255_DATA, 0, iobase);
d |= (spriv->io(0, _8255_DATA + 1, 0, iobase) << 8);
comedi_buf_put(s, d);
s->async->events |= COMEDI_CB_EOS;
comedi_event(dev, s);
if (dir) {
writeb(data, dev->mmio + regbase + port);
return 0;
}
return readb(dev->mmio + regbase + port);
}
EXPORT_SYMBOL_GPL(subdev_8255_interrupt);
static int subdev_8255_insn(struct comedi_device *dev,
struct comedi_subdevice *s,
@ -129,25 +110,26 @@ static int subdev_8255_insn(struct comedi_device *dev,
unsigned int *data)
{
struct subdev_8255_private *spriv = s->private;
unsigned long iobase = spriv->iobase;
unsigned long regbase = spriv->regbase;
unsigned int mask;
unsigned int v;
mask = comedi_dio_update_state(s, data);
if (mask) {
if (mask & 0xff)
spriv->io(1, _8255_DATA, s->state & 0xff, iobase);
spriv->io(dev, 1, I8255_DATA_A_REG,
s->state & 0xff, regbase);
if (mask & 0xff00)
spriv->io(1, _8255_DATA + 1, (s->state >> 8) & 0xff,
iobase);
spriv->io(dev, 1, I8255_DATA_B_REG,
(s->state >> 8) & 0xff, regbase);
if (mask & 0xff0000)
spriv->io(1, _8255_DATA + 2, (s->state >> 16) & 0xff,
iobase);
spriv->io(dev, 1, I8255_DATA_C_REG,
(s->state >> 16) & 0xff, regbase);
}
v = spriv->io(0, _8255_DATA, 0, iobase);
v |= (spriv->io(0, _8255_DATA + 1, 0, iobase) << 8);
v |= (spriv->io(0, _8255_DATA + 2, 0, iobase) << 16);
v = spriv->io(dev, 0, I8255_DATA_A_REG, 0, regbase);
v |= (spriv->io(dev, 0, I8255_DATA_B_REG, 0, regbase) << 8);
v |= (spriv->io(dev, 0, I8255_DATA_C_REG, 0, regbase) << 16);
data[1] = v;
@ -158,21 +140,21 @@ static void subdev_8255_do_config(struct comedi_device *dev,
struct comedi_subdevice *s)
{
struct subdev_8255_private *spriv = s->private;
unsigned long iobase = spriv->iobase;
unsigned long regbase = spriv->regbase;
int config;
config = CR_CW;
config = I8255_CTRL_CW;
/* 1 in io_bits indicates output, 1 in config indicates input */
if (!(s->io_bits & 0x0000ff))
config |= CR_A_IO;
config |= I8255_CTRL_A_IO;
if (!(s->io_bits & 0x00ff00))
config |= CR_B_IO;
config |= I8255_CTRL_B_IO;
if (!(s->io_bits & 0x0f0000))
config |= CR_C_LO_IO;
config |= I8255_CTRL_C_LO_IO;
if (!(s->io_bits & 0xf00000))
config |= CR_C_HI_IO;
config |= I8255_CTRL_C_HI_IO;
spriv->io(1, _8255_CR, config, iobase);
spriv->io(dev, 1, I8255_CTRL_REG, config, regbase);
}
static int subdev_8255_insn_config(struct comedi_device *dev,
@ -202,67 +184,12 @@ static int subdev_8255_insn_config(struct comedi_device *dev,
return insn->n;
}
static int subdev_8255_cmdtest(struct comedi_device *dev,
struct comedi_subdevice *s,
struct comedi_cmd *cmd)
{
int err = 0;
/* Step 1 : check if triggers are trivially valid */
err |= cfc_check_trigger_src(&cmd->start_src, TRIG_NOW);
err |= cfc_check_trigger_src(&cmd->scan_begin_src, TRIG_EXT);
err |= cfc_check_trigger_src(&cmd->convert_src, TRIG_FOLLOW);
err |= cfc_check_trigger_src(&cmd->scan_end_src, TRIG_COUNT);
err |= cfc_check_trigger_src(&cmd->stop_src, TRIG_NONE);
if (err)
return 1;
/* Step 2a : make sure trigger sources are unique */
/* Step 2b : and mutually compatible */
if (err)
return 2;
/* Step 3: check if arguments are trivially valid */
err |= cfc_check_trigger_arg_is(&cmd->start_arg, 0);
err |= cfc_check_trigger_arg_is(&cmd->scan_begin_arg, 0);
err |= cfc_check_trigger_arg_is(&cmd->convert_arg, 0);
err |= cfc_check_trigger_arg_is(&cmd->scan_end_arg, cmd->chanlist_len);
err |= cfc_check_trigger_arg_is(&cmd->stop_arg, 0);
if (err)
return 3;
/* step 4 */
if (err)
return 4;
return 0;
}
static int subdev_8255_cmd(struct comedi_device *dev,
struct comedi_subdevice *s)
{
/* FIXME */
return 0;
}
static int subdev_8255_cancel(struct comedi_device *dev,
struct comedi_subdevice *s)
{
/* FIXME */
return 0;
}
int subdev_8255_init(struct comedi_device *dev, struct comedi_subdevice *s,
int (*io)(int, int, int, unsigned long),
unsigned long iobase)
static int __subdev_8255_init(struct comedi_device *dev,
struct comedi_subdevice *s,
int (*io)(struct comedi_device *,
int, int, int, unsigned long),
unsigned long regbase,
bool is_mmio)
{
struct subdev_8255_private *spriv;
@ -270,8 +197,13 @@ int subdev_8255_init(struct comedi_device *dev, struct comedi_subdevice *s,
if (!spriv)
return -ENOMEM;
spriv->iobase = iobase;
spriv->io = io ? io : subdev_8255_io;
if (io)
spriv->io = io;
else if (is_mmio)
spriv->io = subdev_8255_mmio;
else
spriv->io = subdev_8255_io;
spriv->regbase = regbase;
s->type = COMEDI_SUBD_DIO;
s->subdev_flags = SDF_READABLE | SDF_WRITABLE;
@ -285,27 +217,24 @@ int subdev_8255_init(struct comedi_device *dev, struct comedi_subdevice *s,
return 0;
}
int subdev_8255_init(struct comedi_device *dev, struct comedi_subdevice *s,
int (*io)(struct comedi_device *,
int, int, int, unsigned long),
unsigned long regbase)
{
return __subdev_8255_init(dev, s, io, regbase, false);
}
EXPORT_SYMBOL_GPL(subdev_8255_init);
int subdev_8255_init_irq(struct comedi_device *dev, struct comedi_subdevice *s,
int (*io)(int, int, int, unsigned long),
unsigned long iobase)
int subdev_8255_mm_init(struct comedi_device *dev, struct comedi_subdevice *s,
int (*io)(struct comedi_device *,
int, int, int, unsigned long),
unsigned long regbase)
{
int ret;
ret = subdev_8255_init(dev, s, io, iobase);
if (ret)
return ret;
s->len_chanlist = 1;
s->do_cmdtest = subdev_8255_cmdtest;
s->do_cmd = subdev_8255_cmd;
s->cancel = subdev_8255_cancel;
return 0;
return __subdev_8255_init(dev, s, io, regbase, true);
}
EXPORT_SYMBOL_GPL(subdev_8255_init_irq);
EXPORT_SYMBOL_GPL(subdev_8255_mm_init);
/*
Start of the 8255 standalone device
@ -316,8 +245,8 @@ static int dev_8255_attach(struct comedi_device *dev,
struct comedi_devconfig *it)
{
struct comedi_subdevice *s;
int ret;
unsigned long iobase;
int ret;
int i;
for (i = 0; i < COMEDI_NDEVCONFOPTS; i++) {
@ -338,7 +267,14 @@ static int dev_8255_attach(struct comedi_device *dev,
s = &dev->subdevices[i];
iobase = it->options[i];
ret = __comedi_request_region(dev, iobase, _8255_SIZE);
/*
* __comedi_request_region() does not set dev->iobase.
*
* For 8255 devices that are manually attached using
* comedi_config, the 'iobase' is the actual I/O port
* base address of the chip.
*/
ret = __comedi_request_region(dev, iobase, I8255_SIZE);
if (ret) {
s->type = COMEDI_SUBD_UNUSED;
} else {
@ -361,7 +297,7 @@ static void dev_8255_detach(struct comedi_device *dev)
s = &dev->subdevices[i];
if (s->type != COMEDI_SUBD_UNUSED) {
spriv = s->private;
release_region(spriv->iobase, _8255_SIZE);
release_region(spriv->regbase, I8255_SIZE);
}
}
}

31
drivers/staging/comedi/drivers/8255.h
View File

@ -21,13 +21,28 @@
#include "../comedidev.h"
int subdev_8255_init(struct comedi_device *dev, struct comedi_subdevice *s,
int (*io)(int, int, int, unsigned long),
unsigned long iobase);
int subdev_8255_init_irq(struct comedi_device *dev, struct comedi_subdevice *s,
int (*io)(int, int, int, unsigned long),
unsigned long iobase);
void subdev_8255_interrupt(struct comedi_device *dev,
struct comedi_subdevice *s);
#define I8255_SIZE 0x04
#define I8255_DATA_A_REG 0x00
#define I8255_DATA_B_REG 0x01
#define I8255_DATA_C_REG 0x02
#define I8255_CTRL_REG 0x03
#define I8255_CTRL_C_LO_IO (1 << 0)
#define I8255_CTRL_B_IO (1 << 1)
#define I8255_CTRL_B_MODE (1 << 2)
#define I8255_CTRL_C_HI_IO (1 << 3)
#define I8255_CTRL_A_IO (1 << 4)
#define I8255_CTRL_A_MODE(x) ((x) << 5)
#define I8255_CTRL_CW (1 << 7)
int subdev_8255_init(struct comedi_device *, struct comedi_subdevice *,
int (*io)(struct comedi_device *,
int, int, int, unsigned long),
unsigned long regbase);
int subdev_8255_mm_init(struct comedi_device *, struct comedi_subdevice *,
int (*io)(struct comedi_device *,
int, int, int, unsigned long),
unsigned long regbase);
#endif

38
drivers/staging/comedi/drivers/8255_pci.c
View File

@ -190,24 +190,12 @@ static int pci_8255_mite_init(struct pci_dev *pcidev)
return 0;
}
static int pci_8255_mmio(int dir, int port, int data, unsigned long iobase)
{
void __iomem *mmio_base = (void __iomem *)iobase;
if (dir) {
writeb(data, mmio_base + port);
return 0;
}
return readb(mmio_base + port);
}
static int pci_8255_auto_attach(struct comedi_device *dev,
unsigned long context)
{
struct pci_dev *pcidev = comedi_to_pci_dev(dev);
const struct pci_8255_boardinfo *board = NULL;
struct comedi_subdevice *s;
bool is_mmio;
int ret;
int i;
@ -228,9 +216,7 @@ static int pci_8255_auto_attach(struct comedi_device *dev,
return ret;
}
is_mmio = (pci_resource_flags(pcidev, board->dio_badr) &
IORESOURCE_MEM) != 0;
if (is_mmio) {
if ((pci_resource_flags(pcidev, board->dio_badr) & IORESOURCE_MEM)) {
dev->mmio = pci_ioremap_bar(pcidev, board->dio_badr);
if (!dev->mmio)
return -ENOMEM;
@ -248,16 +234,11 @@ static int pci_8255_auto_attach(struct comedi_device *dev,
return ret;
for (i = 0; i < board->n_8255; i++) {
unsigned long iobase;
s = &dev->subdevices[i];
if (is_mmio) {
iobase = (unsigned long)(dev->mmio + (i * 4));
ret = subdev_8255_init(dev, s, pci_8255_mmio, iobase);
} else {
iobase = dev->iobase + (i * 4);
ret = subdev_8255_init(dev, s, NULL, iobase);
}
if (dev->mmio)
ret = subdev_8255_mm_init(dev, s, NULL, i * I8255_SIZE);
else
ret = subdev_8255_init(dev, s, NULL, i * I8255_SIZE);
if (ret)
return ret;
}
@ -265,18 +246,11 @@ static int pci_8255_auto_attach(struct comedi_device *dev,
return 0;
}
static void pci_8255_detach(struct comedi_device *dev)
{
if (dev->mmio)
iounmap(dev->mmio);
comedi_pci_disable(dev);
}
static struct comedi_driver pci_8255_driver = {
.driver_name = "8255_pci",
.module = THIS_MODULE,
.auto_attach = pci_8255_auto_attach,
.detach = pci_8255_detach,
.detach = comedi_pci_detach,
};
static int pci_8255_pci_probe(struct pci_dev *dev,

6
drivers/staging/comedi/drivers/Makefile
View File

@ -9,7 +9,6 @@ obj-$(CONFIG_COMEDI_BOND) += comedi_bond.o
obj-$(CONFIG_COMEDI_TEST) += comedi_test.o
obj-$(CONFIG_COMEDI_PARPORT) += comedi_parport.o
obj-$(CONFIG_COMEDI_SERIAL2002) += serial2002.o
obj-$(CONFIG_COMEDI_SKEL) += skel.o
# Comedi ISA drivers
obj-$(CONFIG_COMEDI_AMPLC_DIO200_ISA) += amplc_dio200.o
@ -50,6 +49,7 @@ obj-$(CONFIG_COMEDI_NI_AT_A2150) += ni_at_a2150.o
obj-$(CONFIG_COMEDI_NI_AT_AO) += ni_at_ao.o
obj-$(CONFIG_COMEDI_NI_ATMIO) += ni_atmio.o
obj-$(CONFIG_COMEDI_NI_ATMIO16D) += ni_atmio16d.o
obj-$(CONFIG_COMEDI_NI_LABPC_ISA) += ni_labpc.o
obj-$(CONFIG_COMEDI_PCMAD) += pcmad.o
obj-$(CONFIG_COMEDI_PCMDA12) += pcmda12.o
obj-$(CONFIG_COMEDI_PCMMIO) += pcmmio.o
@ -125,6 +125,7 @@ obj-$(CONFIG_COMEDI_QUATECH_DAQP_CS) += quatech_daqp_cs.o
# Comedi USB drivers
obj-$(CONFIG_COMEDI_DT9812) += dt9812.o
obj-$(CONFIG_COMEDI_NI_USB6501) += ni_usb6501.o
obj-$(CONFIG_COMEDI_USBDUX) += usbdux.o
obj-$(CONFIG_COMEDI_USBDUXFAST) += usbduxfast.o
obj-$(CONFIG_COMEDI_USBDUXSIGMA) += usbduxsigma.o
@ -134,11 +135,10 @@ obj-$(CONFIG_COMEDI_VMK80XX) += vmk80xx.o
obj-$(CONFIG_COMEDI_MITE) += mite.o
obj-$(CONFIG_COMEDI_NI_TIO) += ni_tio.o
obj-$(CONFIG_COMEDI_NI_TIOCMD) += ni_tiocmd.o
obj-$(CONFIG_COMEDI_NI_LABPC) += ni_labpc.o
obj-$(CONFIG_COMEDI_NI_LABPC) += ni_labpc_common.o
obj-$(CONFIG_COMEDI_NI_LABPC_ISADMA) += ni_labpc_isadma.o
obj-$(CONFIG_COMEDI_8255) += 8255.o
obj-$(CONFIG_COMEDI_AMPLC_DIO200) += amplc_dio200_common.o
obj-$(CONFIG_COMEDI_AMPLC_PC236) += amplc_pc236_common.o
obj-$(CONFIG_COMEDI_DAS08) += das08.o
obj-$(CONFIG_COMEDI_FC) += comedi_fc.o

20
drivers/staging/comedi/drivers/addi-data/addi_common.c
View File

@ -44,7 +44,7 @@ static int i_ADDIDATA_InsnReadEeprom(struct comedi_device *dev,
struct comedi_insn *insn,
unsigned int *data)
{
const struct addi_board *this_board = comedi_board(dev);
const struct addi_board *this_board = dev->board_ptr;
struct addi_private *devpriv = dev->private;
unsigned short w_Address = CR_CHAN(insn->chanspec);
unsigned short w_Data;
@ -59,7 +59,7 @@ static int i_ADDIDATA_InsnReadEeprom(struct comedi_device *dev,
static irqreturn_t v_ADDI_Interrupt(int irq, void *d)
{
struct comedi_device *dev = d;
const struct addi_board *this_board = comedi_board(dev);
const struct addi_board *this_board = dev->board_ptr;
this_board->interrupt(irq, d);
return IRQ_RETVAL(1);
@ -67,7 +67,7 @@ static irqreturn_t v_ADDI_Interrupt(int irq, void *d)
static int i_ADDI_Reset(struct comedi_device *dev)
{
const struct addi_board *this_board = comedi_board(dev);
const struct addi_board *this_board = dev->board_ptr;
this_board->reset(dev);
return 0;
@ -77,7 +77,7 @@ static int addi_auto_attach(struct comedi_device *dev,
unsigned long context_unused)
{
struct pci_dev *pcidev = comedi_to_pci_dev(dev);
const struct addi_board *this_board = comedi_board(dev);
const struct addi_board *this_board = dev->board_ptr;
struct addi_private *devpriv;
struct comedi_subdevice *s;
int ret, n_subdevices;
@ -268,13 +268,7 @@ static int addi_auto_attach(struct comedi_device *dev,
static void i_ADDI_Detach(struct comedi_device *dev)
{
struct addi_private *devpriv = dev->private;
if (devpriv) {
if (dev->iobase)
i_ADDI_Reset(dev);
if (dev->irq)
free_irq(dev->irq, dev);
}
comedi_pci_disable(dev);
if (dev->iobase)
i_ADDI_Reset(dev);
comedi_pci_detach(dev);
}

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