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tools/power/turbostat: Enable TCC Offset on more models
All Models that duplicate INTEL_FAM6_CANNONLAKE_L support TCC Offset. Enable this feature on all these models. Delete obsolete model_orig. Signed-off-by: Zhang Rui <rui.zhang@intel.com> Reviewed-by: Len Brown <len.brown@intel.com>
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@ -211,9 +211,6 @@ int *fd_instr_count_percpu;
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struct timeval interval_tv = { 5, 0 };
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struct timespec interval_ts = { 5, 0 };
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/* Save original CPU model */
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unsigned int model_orig;
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unsigned int num_iterations;
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unsigned int header_iterations;
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unsigned int debug;
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@ -4046,14 +4043,7 @@ void check_tcc_offset(int model)
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switch (model) {
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case INTEL_FAM6_SKYLAKE_L:
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case INTEL_FAM6_SKYLAKE:
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case INTEL_FAM6_KABYLAKE_L:
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case INTEL_FAM6_KABYLAKE:
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case INTEL_FAM6_ICELAKE_L:
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case INTEL_FAM6_ICELAKE:
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case INTEL_FAM6_TIGERLAKE_L:
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case INTEL_FAM6_TIGERLAKE:
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case INTEL_FAM6_COMETLAKE:
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case INTEL_FAM6_CANNONLAKE_L:
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if (!get_msr(base_cpu, MSR_PLATFORM_INFO, &msr)) {
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msr = (msr >> 30) & 1;
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if (msr)
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@ -5573,10 +5563,9 @@ void process_cpuid()
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edx_flags & (1 << 22) ? "ACPI-TM" : "-",
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edx_flags & (1 << 28) ? "HT" : "-", edx_flags & (1 << 29) ? "TM" : "-");
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}
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if (genuine_intel) {
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model_orig = model;
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if (genuine_intel)
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model = intel_model_duplicates(model);
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}
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if (!(edx_flags & (1 << 5)))
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errx(1, "CPUID: no MSR");
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@ -5796,7 +5785,7 @@ void process_cpuid()
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automatic_cstate_conversion_probe(family, model);
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prewake_cstate_probe(family, model);
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check_tcc_offset(model_orig);
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check_tcc_offset(model);
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if (!quiet)
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dump_cstate_pstate_config_info(family, model);
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