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drm/i915: argument to control retiring behavior
Sometimes it may be the case when we idle the gpu or wait on something we don't actually want to process the retiring list. This patch allows callers to choose the behavior. Reviewed-by: Keith Packard <keithp@keithp.com> Reviewed-by: Eugeni Dodonov <eugeni.dodonov@intel.com> Signed-off-by: Ben Widawsky <ben@bwidawsk.net> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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@ -2131,7 +2131,7 @@ int i915_driver_unload(struct drm_device *dev)
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unregister_shrinker(&dev_priv->mm.inactive_shrinker);
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mutex_lock(&dev->struct_mutex);
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ret = i915_gpu_idle(dev);
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ret = i915_gpu_idle(dev, true);
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if (ret)
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DRM_ERROR("failed to idle hardware: %d\n", ret);
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mutex_unlock(&dev->struct_mutex);
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@ -1179,13 +1179,14 @@ void i915_gem_do_init(struct drm_device *dev,
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unsigned long start,
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unsigned long mappable_end,
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unsigned long end);
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int __must_check i915_gpu_idle(struct drm_device *dev);
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int __must_check i915_gpu_idle(struct drm_device *dev, bool do_retire);
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int __must_check i915_gem_idle(struct drm_device *dev);
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int __must_check i915_add_request(struct intel_ring_buffer *ring,
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struct drm_file *file,
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struct drm_i915_gem_request *request);
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int __must_check i915_wait_request(struct intel_ring_buffer *ring,
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uint32_t seqno);
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uint32_t seqno,
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bool do_retire);
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int i915_gem_fault(struct vm_area_struct *vma, struct vm_fault *vmf);
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int __must_check
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i915_gem_object_set_to_gtt_domain(struct drm_i915_gem_object *obj,
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@ -1943,7 +1943,8 @@ i915_gem_retire_work_handler(struct work_struct *work)
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*/
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int
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i915_wait_request(struct intel_ring_buffer *ring,
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uint32_t seqno)
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uint32_t seqno,
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bool do_retire)
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{
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drm_i915_private_t *dev_priv = ring->dev->dev_private;
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u32 ier;
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@ -2027,7 +2028,7 @@ i915_wait_request(struct intel_ring_buffer *ring,
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* buffer to have made it to the inactive list, and we would need
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* a separate wait queue to handle that.
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*/
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if (ret == 0)
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if (ret == 0 && do_retire)
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i915_gem_retire_requests_ring(ring);
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return ret;
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@ -2051,7 +2052,8 @@ i915_gem_object_wait_rendering(struct drm_i915_gem_object *obj)
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* it.
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*/
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if (obj->active) {
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ret = i915_wait_request(obj->ring, obj->last_rendering_seqno);
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ret = i915_wait_request(obj->ring, obj->last_rendering_seqno,
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true);
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if (ret)
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return ret;
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}
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@ -2172,7 +2174,7 @@ i915_gem_flush_ring(struct intel_ring_buffer *ring,
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return 0;
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}
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static int i915_ring_idle(struct intel_ring_buffer *ring)
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static int i915_ring_idle(struct intel_ring_buffer *ring, bool do_retire)
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{
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int ret;
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@ -2186,18 +2188,18 @@ static int i915_ring_idle(struct intel_ring_buffer *ring)
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return ret;
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}
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return i915_wait_request(ring, i915_gem_next_request_seqno(ring));
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return i915_wait_request(ring, i915_gem_next_request_seqno(ring),
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do_retire);
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}
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int
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i915_gpu_idle(struct drm_device *dev)
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int i915_gpu_idle(struct drm_device *dev, bool do_retire)
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{
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drm_i915_private_t *dev_priv = dev->dev_private;
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int ret, i;
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/* Flush everything onto the inactive list. */
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for (i = 0; i < I915_NUM_RINGS; i++) {
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ret = i915_ring_idle(&dev_priv->ring[i]);
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ret = i915_ring_idle(&dev_priv->ring[i], do_retire);
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if (ret)
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return ret;
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}
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@ -2400,7 +2402,8 @@ i915_gem_object_flush_fence(struct drm_i915_gem_object *obj,
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if (!ring_passed_seqno(obj->last_fenced_ring,
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obj->last_fenced_seqno)) {
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ret = i915_wait_request(obj->last_fenced_ring,
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obj->last_fenced_seqno);
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obj->last_fenced_seqno,
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true);
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if (ret)
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return ret;
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}
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@ -2541,7 +2544,8 @@ i915_gem_object_get_fence(struct drm_i915_gem_object *obj,
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if (!ring_passed_seqno(obj->last_fenced_ring,
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reg->setup_seqno)) {
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ret = i915_wait_request(obj->last_fenced_ring,
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reg->setup_seqno);
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reg->setup_seqno,
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true);
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if (ret)
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return ret;
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}
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@ -3710,7 +3714,7 @@ i915_gem_idle(struct drm_device *dev)
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return 0;
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}
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ret = i915_gpu_idle(dev);
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ret = i915_gpu_idle(dev, true);
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if (ret) {
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mutex_unlock(&dev->struct_mutex);
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return ret;
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@ -4201,7 +4205,7 @@ rescan:
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* This has a dramatic impact to reduce the number of
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* OOM-killer events whilst running the GPU aggressively.
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*/
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if (i915_gpu_idle(dev) == 0)
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if (i915_gpu_idle(dev, true) == 0)
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goto rescan;
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}
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mutex_unlock(&dev->struct_mutex);
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@ -195,7 +195,7 @@ i915_gem_evict_everything(struct drm_device *dev, bool purgeable_only)
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trace_i915_gem_evict_everything(dev, purgeable_only);
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/* Flush everything (on to the inactive lists) and evict */
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ret = i915_gpu_idle(dev);
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ret = i915_gpu_idle(dev, true);
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if (ret)
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return ret;
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@ -1186,7 +1186,7 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data,
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* so every billion or so execbuffers, we need to stall
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* the GPU in order to reset the counters.
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*/
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ret = i915_gpu_idle(dev);
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ret = i915_gpu_idle(dev, true);
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if (ret)
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goto err;
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@ -55,7 +55,7 @@ static bool do_idling(struct drm_i915_private *dev_priv)
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if (unlikely(dev_priv->mm.gtt->do_idle_maps)) {
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dev_priv->mm.interruptible = false;
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if (i915_gpu_idle(dev_priv->dev)) {
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if (i915_gpu_idle(dev_priv->dev, true)) {
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DRM_ERROR("Couldn't idle GPU\n");
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/* Wait a bit, in hopes it avoids the hang */
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udelay(10);
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@ -227,7 +227,8 @@ static int intel_overlay_do_wait_request(struct intel_overlay *overlay,
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}
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overlay->last_flip_req = request->seqno;
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overlay->flip_tail = tail;
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ret = i915_wait_request(LP_RING(dev_priv), overlay->last_flip_req);
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ret = i915_wait_request(LP_RING(dev_priv), overlay->last_flip_req,
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true);
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if (ret)
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return ret;
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@ -448,7 +449,8 @@ static int intel_overlay_recover_from_interrupt(struct intel_overlay *overlay)
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if (overlay->last_flip_req == 0)
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return 0;
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ret = i915_wait_request(LP_RING(dev_priv), overlay->last_flip_req);
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ret = i915_wait_request(LP_RING(dev_priv), overlay->last_flip_req,
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true);
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if (ret)
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return ret;
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