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drm/amdgpu/sriov:Correct pfvf exchange logic
The pfvf exchange need be in exclusive mode. And add pfvf exchange in gpu reset. Signed-off-by: Emily Deng <Emily.Deng@amd.com> Reviewed-By: Xiangliang Yu <Xiangliang.Yu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -1701,8 +1701,10 @@ static int amdgpu_device_ip_init(struct amdgpu_device *adev)
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amdgpu_xgmi_add_device(adev);
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amdgpu_amdkfd_device_init(adev);
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if (amdgpu_sriov_vf(adev))
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if (amdgpu_sriov_vf(adev)) {
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amdgpu_virt_init_data_exchange(adev);
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amdgpu_virt_release_full_gpu(adev, true);
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}
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return 0;
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}
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@ -2632,9 +2634,6 @@ fence_driver_init:
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goto failed;
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}
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if (amdgpu_sriov_vf(adev))
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amdgpu_virt_init_data_exchange(adev);
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amdgpu_fbdev_init(adev);
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r = amdgpu_pm_sysfs_init(adev);
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@ -3226,6 +3225,7 @@ static int amdgpu_device_reset_sriov(struct amdgpu_device *adev,
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r = amdgpu_ib_ring_tests(adev);
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error:
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amdgpu_virt_init_data_exchange(adev);
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amdgpu_virt_release_full_gpu(adev, true);
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if (!r && adev->virt.gim_feature & AMDGIM_FEATURE_GIM_FLR_VRAMLOST) {
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atomic_inc(&adev->vram_lost_counter);
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@ -174,7 +174,7 @@ static int xgpu_ai_send_access_requests(struct amdgpu_device *adev,
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return r;
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}
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/* Retrieve checksum from mailbox2 */
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if (req == IDH_REQ_GPU_INIT_ACCESS) {
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if (req == IDH_REQ_GPU_INIT_ACCESS || req == IDH_REQ_GPU_RESET_ACCESS) {
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adev->virt.fw_reserve.checksum_key =
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RREG32_NO_KIQ(SOC15_REG_OFFSET(NBIO, 0,
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mmBIF_BX_PF0_MAILBOX_MSGBUF_RCV_DW2));
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