MIPS: Loongson: Remove set_irq_trigger_mode()

set_irq_trigger_mode() is not needed on all platforms so remove it
and move the related source code to mach_init_irq().

This will allow gdium to share the common irq.c without adding an empty
set_irq_trigger_mode().

Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/1493/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This commit is contained in:
Wu Zhangjin 2010-07-24 09:22:13 +08:00 committed by Ralf Baechle
parent 4c076fb41a
commit b8c7428af0
4 changed files with 8 additions and 18 deletions

View File

@ -45,7 +45,6 @@ static inline void prom_init_uart_base(void)
/* irq operation functions */
extern void bonito_irqdispatch(void);
extern void __init bonito_irq_init(void);
extern void __init set_irq_trigger_mode(void);
extern void __init mach_init_irq(void);
extern void mach_irq_dispatch(unsigned int pending);
extern int mach_i8259_irq(void);

View File

@ -53,9 +53,6 @@ void __init arch_init_irq(void)
*/
clear_c0_status(ST0_IM | ST0_BEV);
/* setting irq trigger mode */
set_irq_trigger_mode();
/* no steer */
LOONGSON_INTSTEER = 0;

View File

@ -44,13 +44,6 @@ static struct irqaction cascade_irqaction = {
.name = "cascade",
};
void __init set_irq_trigger_mode(void)
{
/* most bonito irq should be level triggered */
LOONGSON_INTEDGE = LOONGSON_ICU_SYSTEMERR | LOONGSON_ICU_MASTERERR |
LOONGSON_ICU_RETRYERR | LOONGSON_ICU_MBOXES;
}
void __init mach_init_irq(void)
{
/* init all controller
@ -59,6 +52,10 @@ void __init mach_init_irq(void)
* 32-63 ------> bonito irq
*/
/* most bonito irq should be level triggered */
LOONGSON_INTEDGE = LOONGSON_ICU_SYSTEMERR | LOONGSON_ICU_MASTERERR |
LOONGSON_ICU_RETRYERR | LOONGSON_ICU_MBOXES;
/* Sets the first-level interrupt dispatcher. */
mips_cpu_irq_init();
init_i8259_irqs();

View File

@ -91,13 +91,6 @@ void mach_irq_dispatch(unsigned int pending)
spurious_interrupt();
}
void __init set_irq_trigger_mode(void)
{
/* setup cs5536 as high level trigger */
LOONGSON_INTPOL = LOONGSON_INT_BIT_INT0 | LOONGSON_INT_BIT_INT1;
LOONGSON_INTEDGE &= ~(LOONGSON_INT_BIT_INT0 | LOONGSON_INT_BIT_INT1);
}
static irqreturn_t ip6_action(int cpl, void *dev_id)
{
return IRQ_HANDLED;
@ -122,6 +115,10 @@ void __init mach_init_irq(void)
* 32-63 ------> bonito irq
*/
/* setup cs5536 as high level trigger */
LOONGSON_INTPOL = LOONGSON_INT_BIT_INT0 | LOONGSON_INT_BIT_INT1;
LOONGSON_INTEDGE &= ~(LOONGSON_INT_BIT_INT0 | LOONGSON_INT_BIT_INT1);
/* Sets the first-level interrupt dispatcher. */
mips_cpu_irq_init();
init_i8259_irqs();