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DMA: PL330: Merge PL330 driver into drivers/dma/
Currently there were two part of DMAC PL330 driver for support old styled s3c-pl330 which has been merged into drivers/dma/pl330.c driver. Actually, there is no reason to separate them now. Basically this patch merges arch/arm/common/pl330.c into drivers/dma/pl330.c driver and removes useless exported symbol, externed function and so on. The newer pl330 driver tested on SMDKV310 and SMDK4212 boards Cc: Jassi Brar <jassisinghbrar@gmail.com> Cc: Russell King <rmk+kernel@arm.linux.org.uk> Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Boojin Kim <boojin.kim@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com> Acked-by: Jassi Brar <jassisinghbrar@gmail.com> Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
This commit is contained in:
Boojin Kim
Vinod Koul
parent
6d0d7e2d55
commit
b7d861d939
@ -24,9 +24,6 @@ config ARM_VIC_NR
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config ICST
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bool
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config PL330
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bool
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config SA1111
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bool
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select DMABOUNCE if !ARCH_PXA
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@ -5,7 +5,6 @@
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obj-$(CONFIG_ARM_GIC) += gic.o
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obj-$(CONFIG_ARM_VIC) += vic.o
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obj-$(CONFIG_ICST) += icst.o
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obj-$(CONFIG_PL330) += pl330.o
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obj-$(CONFIG_SA1111) += sa1111.o
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obj-$(CONFIG_PCI_HOST_VIA82C505) += via82c505.o
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obj-$(CONFIG_DMABOUNCE) += dmabounce.o
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File diff suppressed because it is too large
Load Diff
@ -1,217 +0,0 @@
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/* linux/include/asm/hardware/pl330.h
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*
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* Copyright (C) 2010 Samsung Electronics Co. Ltd.
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* Jaswinder Singh <jassi.brar@samsung.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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*/
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#ifndef __PL330_CORE_H
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#define __PL330_CORE_H
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#define PL330_MAX_CHAN 8
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#define PL330_MAX_IRQS 32
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#define PL330_MAX_PERI 32
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enum pl330_srccachectrl {
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SCCTRL0 = 0, /* Noncacheable and nonbufferable */
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SCCTRL1, /* Bufferable only */
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SCCTRL2, /* Cacheable, but do not allocate */
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SCCTRL3, /* Cacheable and bufferable, but do not allocate */
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SINVALID1,
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SINVALID2,
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SCCTRL6, /* Cacheable write-through, allocate on reads only */
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SCCTRL7, /* Cacheable write-back, allocate on reads only */
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};
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enum pl330_dstcachectrl {
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DCCTRL0 = 0, /* Noncacheable and nonbufferable */
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DCCTRL1, /* Bufferable only */
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DCCTRL2, /* Cacheable, but do not allocate */
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DCCTRL3, /* Cacheable and bufferable, but do not allocate */
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DINVALID1 = 8,
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DINVALID2,
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DCCTRL6, /* Cacheable write-through, allocate on writes only */
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DCCTRL7, /* Cacheable write-back, allocate on writes only */
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};
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/* Populated by the PL330 core driver for DMA API driver's info */
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struct pl330_config {
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u32 periph_id;
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u32 pcell_id;
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#define DMAC_MODE_NS (1 << 0)
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unsigned int mode;
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unsigned int data_bus_width:10; /* In number of bits */
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unsigned int data_buf_dep:10;
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unsigned int num_chan:4;
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unsigned int num_peri:6;
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u32 peri_ns;
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unsigned int num_events:6;
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u32 irq_ns;
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};
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/* Handle to the DMAC provided to the PL330 core */
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struct pl330_info {
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/* Owning device */
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struct device *dev;
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/* Size of MicroCode buffers for each channel. */
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unsigned mcbufsz;
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/* ioremap'ed address of PL330 registers. */
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void __iomem *base;
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/* Client can freely use it. */
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void *client_data;
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/* PL330 core data, Client must not touch it. */
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void *pl330_data;
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/* Populated by the PL330 core driver during pl330_add */
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struct pl330_config pcfg;
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/*
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* If the DMAC has some reset mechanism, then the
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* client may want to provide pointer to the method.
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*/
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void (*dmac_reset)(struct pl330_info *pi);
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};
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enum pl330_byteswap {
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SWAP_NO = 0,
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SWAP_2,
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SWAP_4,
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SWAP_8,
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SWAP_16,
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};
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/**
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* Request Configuration.
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* The PL330 core does not modify this and uses the last
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* working configuration if the request doesn't provide any.
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*
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* The Client may want to provide this info only for the
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* first request and a request with new settings.
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*/
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struct pl330_reqcfg {
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/* Address Incrementing */
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unsigned dst_inc:1;
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unsigned src_inc:1;
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/*
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* For now, the SRC & DST protection levels
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* and burst size/length are assumed same.
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*/
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bool nonsecure;
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bool privileged;
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bool insnaccess;
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unsigned brst_len:5;
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unsigned brst_size:3; /* in power of 2 */
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enum pl330_dstcachectrl dcctl;
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enum pl330_srccachectrl scctl;
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enum pl330_byteswap swap;
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};
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/*
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* One cycle of DMAC operation.
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* There may be more than one xfer in a request.
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*/
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struct pl330_xfer {
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u32 src_addr;
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u32 dst_addr;
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/* Size to xfer */
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u32 bytes;
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/*
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* Pointer to next xfer in the list.
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* The last xfer in the req must point to NULL.
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*/
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struct pl330_xfer *next;
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};
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/* The xfer callbacks are made with one of these arguments. */
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enum pl330_op_err {
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/* The all xfers in the request were success. */
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PL330_ERR_NONE,
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/* If req aborted due to global error. */
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PL330_ERR_ABORT,
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/* If req failed due to problem with Channel. */
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PL330_ERR_FAIL,
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};
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enum pl330_reqtype {
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MEMTOMEM,
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MEMTODEV,
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DEVTOMEM,
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DEVTODEV,
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};
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/* A request defining Scatter-Gather List ending with NULL xfer. */
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struct pl330_req {
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enum pl330_reqtype rqtype;
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/* Index of peripheral for the xfer. */
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unsigned peri:5;
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/* Unique token for this xfer, set by the client. */
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void *token;
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/* Callback to be called after xfer. */
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void (*xfer_cb)(void *token, enum pl330_op_err err);
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/* If NULL, req will be done at last set parameters. */
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struct pl330_reqcfg *cfg;
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/* Pointer to first xfer in the request. */
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struct pl330_xfer *x;
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};
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/*
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* To know the status of the channel and DMAC, the client
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* provides a pointer to this structure. The PL330 core
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* fills it with current information.
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*/
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struct pl330_chanstatus {
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/*
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* If the DMAC engine halted due to some error,
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* the client should remove-add DMAC.
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*/
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bool dmac_halted;
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/*
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* If channel is halted due to some error,
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* the client should ABORT/FLUSH and START the channel.
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*/
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bool faulting;
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/* Location of last load */
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u32 src_addr;
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/* Location of last store */
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u32 dst_addr;
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/*
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* Pointer to the currently active req, NULL if channel is
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* inactive, even though the requests may be present.
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*/
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struct pl330_req *top_req;
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/* Pointer to req waiting second in the queue if any. */
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struct pl330_req *wait_req;
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};
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enum pl330_chan_op {
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/* Start the channel */
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PL330_OP_START,
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/* Abort the active xfer */
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PL330_OP_ABORT,
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/* Stop xfer and flush queue */
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PL330_OP_FLUSH,
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};
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extern int pl330_add(struct pl330_info *);
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extern void pl330_del(struct pl330_info *pi);
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extern int pl330_update(const struct pl330_info *pi);
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extern void pl330_release_channel(void *ch_id);
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extern void *pl330_request_channel(const struct pl330_info *pi);
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extern int pl330_chan_status(void *ch_id, struct pl330_chanstatus *pstatus);
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extern int pl330_chan_ctrl(void *ch_id, enum pl330_chan_op op);
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extern int pl330_submit_req(void *ch_id, struct pl330_req *r);
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#endif /* __PL330_CORE_H */
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@ -201,7 +201,6 @@ config PL330_DMA
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tristate "DMA API Driver for PL330"
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select DMA_ENGINE
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depends on ARM_AMBA
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select PL330
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help
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Select if your platform has one or more PL330 DMACs.
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You need to provide platform specific settings via
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2114
drivers/dma/pl330.c
2114
drivers/dma/pl330.c
File diff suppressed because it is too large
Load Diff
@ -13,7 +13,6 @@
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#define __AMBA_PL330_H_
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#include <linux/dmaengine.h>
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#include <asm/hardware/pl330.h>
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struct dma_pl330_platdata {
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/*
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