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ARM: dts: omap4-sdp: Use OMAP4_IOPAD pinmux macro
Use the pinmux IOPAD macros to define the register as an offset from the padconf physical address instead of the offset from padconf base. This makes the DTS easier to read since matches the addresses listed in the Technical Reference Manual. Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
This commit is contained in:
Javier Martinez Canillas
Tony Lindgren
parent
67832f5277
commit
b6bf441ea4
@ -212,143 +212,143 @@
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uart2_pins: pinmux_uart2_pins {
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uart2_pins: pinmux_uart2_pins {
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pinctrl-single,pins = <
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pinctrl-single,pins = <
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0xd8 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart2_cts.uart2_cts */
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OMAP4_IOPAD(0x118, PIN_INPUT_PULLUP | MUX_MODE0) /* uart2_cts.uart2_cts */
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0xda (PIN_OUTPUT | MUX_MODE0) /* uart2_rts.uart2_rts */
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OMAP4_IOPAD(0x11a, PIN_OUTPUT | MUX_MODE0) /* uart2_rts.uart2_rts */
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0xdc (PIN_INPUT_PULLUP | MUX_MODE0) /* uart2_rx.uart2_rx */
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OMAP4_IOPAD(0x11c, PIN_INPUT_PULLUP | MUX_MODE0) /* uart2_rx.uart2_rx */
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0xde (PIN_OUTPUT | MUX_MODE0) /* uart2_tx.uart2_tx */
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OMAP4_IOPAD(0x11e, PIN_OUTPUT | MUX_MODE0) /* uart2_tx.uart2_tx */
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>;
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>;
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};
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};
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uart3_pins: pinmux_uart3_pins {
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uart3_pins: pinmux_uart3_pins {
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pinctrl-single,pins = <
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pinctrl-single,pins = <
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0x100 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart3_cts_rctx.uart3_cts_rctx */
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OMAP4_IOPAD(0x140, PIN_INPUT_PULLUP | MUX_MODE0) /* uart3_cts_rctx.uart3_cts_rctx */
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0x102 (PIN_OUTPUT | MUX_MODE0) /* uart3_rts_sd.uart3_rts_sd */
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OMAP4_IOPAD(0x142, PIN_OUTPUT | MUX_MODE0) /* uart3_rts_sd.uart3_rts_sd */
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0x104 (PIN_INPUT | MUX_MODE0) /* uart3_rx_irrx.uart3_rx_irrx */
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OMAP4_IOPAD(0x144, PIN_INPUT | MUX_MODE0) /* uart3_rx_irrx.uart3_rx_irrx */
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0x106 (PIN_OUTPUT | MUX_MODE0) /* uart3_tx_irtx.uart3_tx_irtx */
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OMAP4_IOPAD(0x146, PIN_OUTPUT | MUX_MODE0) /* uart3_tx_irtx.uart3_tx_irtx */
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>;
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>;
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};
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};
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uart4_pins: pinmux_uart4_pins {
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uart4_pins: pinmux_uart4_pins {
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pinctrl-single,pins = <
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pinctrl-single,pins = <
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0x11c (PIN_INPUT | MUX_MODE0) /* uart4_rx.uart4_rx */
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OMAP4_IOPAD(0x15c, PIN_INPUT | MUX_MODE0) /* uart4_rx.uart4_rx */
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0x11e (PIN_OUTPUT | MUX_MODE0) /* uart4_tx.uart4_tx */
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OMAP4_IOPAD(0x15e, PIN_OUTPUT | MUX_MODE0) /* uart4_tx.uart4_tx */
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>;
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>;
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};
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};
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twl6040_pins: pinmux_twl6040_pins {
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twl6040_pins: pinmux_twl6040_pins {
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pinctrl-single,pins = <
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pinctrl-single,pins = <
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0xe0 (PIN_OUTPUT | MUX_MODE3) /* hdq_sio.gpio_127 */
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OMAP4_IOPAD(0x120, PIN_OUTPUT | MUX_MODE3) /* hdq_sio.gpio_127 */
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0x160 (PIN_INPUT | MUX_MODE0) /* sys_nirq2.sys_nirq2 */
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OMAP4_IOPAD(0x1a0, PIN_INPUT | MUX_MODE0) /* sys_nirq2.sys_nirq2 */
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>;
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>;
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};
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};
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mcpdm_pins: pinmux_mcpdm_pins {
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mcpdm_pins: pinmux_mcpdm_pins {
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pinctrl-single,pins = <
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pinctrl-single,pins = <
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0xc6 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* abe_pdm_ul_data.abe_pdm_ul_data */
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OMAP4_IOPAD(0x106, PIN_INPUT_PULLDOWN | MUX_MODE0) /* abe_pdm_ul_data.abe_pdm_ul_data */
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0xc8 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* abe_pdm_dl_data.abe_pdm_dl_data */
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OMAP4_IOPAD(0x108, PIN_INPUT_PULLDOWN | MUX_MODE0) /* abe_pdm_dl_data.abe_pdm_dl_data */
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0xca (PIN_INPUT_PULLUP | MUX_MODE0) /* abe_pdm_frame.abe_pdm_frame */
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OMAP4_IOPAD(0x10a, PIN_INPUT_PULLUP | MUX_MODE0) /* abe_pdm_frame.abe_pdm_frame */
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0xcc (PIN_INPUT_PULLDOWN | MUX_MODE0) /* abe_pdm_lb_clk.abe_pdm_lb_clk */
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OMAP4_IOPAD(0x10c, PIN_INPUT_PULLDOWN | MUX_MODE0) /* abe_pdm_lb_clk.abe_pdm_lb_clk */
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0xce (PIN_INPUT_PULLDOWN | MUX_MODE0) /* abe_clks.abe_clks */
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OMAP4_IOPAD(0x10e, PIN_INPUT_PULLDOWN | MUX_MODE0) /* abe_clks.abe_clks */
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>;
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>;
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};
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};
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dmic_pins: pinmux_dmic_pins {
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dmic_pins: pinmux_dmic_pins {
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pinctrl-single,pins = <
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pinctrl-single,pins = <
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0xd0 (PIN_OUTPUT | MUX_MODE0) /* abe_dmic_clk1.abe_dmic_clk1 */
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OMAP4_IOPAD(0x110, PIN_OUTPUT | MUX_MODE0) /* abe_dmic_clk1.abe_dmic_clk1 */
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0xd2 (PIN_INPUT | MUX_MODE0) /* abe_dmic_din1.abe_dmic_din1 */
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OMAP4_IOPAD(0x112, PIN_INPUT | MUX_MODE0) /* abe_dmic_din1.abe_dmic_din1 */
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0xd4 (PIN_INPUT | MUX_MODE0) /* abe_dmic_din2.abe_dmic_din2 */
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OMAP4_IOPAD(0x114, PIN_INPUT | MUX_MODE0) /* abe_dmic_din2.abe_dmic_din2 */
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0xd6 (PIN_INPUT | MUX_MODE0) /* abe_dmic_din3.abe_dmic_din3 */
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OMAP4_IOPAD(0x116, PIN_INPUT | MUX_MODE0) /* abe_dmic_din3.abe_dmic_din3 */
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>;
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>;
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};
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};
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mcbsp1_pins: pinmux_mcbsp1_pins {
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mcbsp1_pins: pinmux_mcbsp1_pins {
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pinctrl-single,pins = <
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pinctrl-single,pins = <
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0xbe (PIN_INPUT | MUX_MODE0) /* abe_mcbsp1_clkx.abe_mcbsp1_clkx */
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OMAP4_IOPAD(0x0fe, PIN_INPUT | MUX_MODE0) /* abe_mcbsp1_clkx.abe_mcbsp1_clkx */
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0xc0 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* abe_mcbsp1_dr.abe_mcbsp1_dr */
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OMAP4_IOPAD(0x100, PIN_INPUT_PULLDOWN | MUX_MODE0) /* abe_mcbsp1_dr.abe_mcbsp1_dr */
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0xc2 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* abe_mcbsp1_dx.abe_mcbsp1_dx */
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OMAP4_IOPAD(0x102, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* abe_mcbsp1_dx.abe_mcbsp1_dx */
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0xc4 (PIN_INPUT | MUX_MODE0) /* abe_mcbsp1_fsx.abe_mcbsp1_fsx */
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OMAP4_IOPAD(0x104, PIN_INPUT | MUX_MODE0) /* abe_mcbsp1_fsx.abe_mcbsp1_fsx */
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>;
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>;
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};
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};
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mcbsp2_pins: pinmux_mcbsp2_pins {
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mcbsp2_pins: pinmux_mcbsp2_pins {
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pinctrl-single,pins = <
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pinctrl-single,pins = <
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0xb6 (PIN_INPUT | MUX_MODE0) /* abe_mcbsp2_clkx.abe_mcbsp2_clkx */
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OMAP4_IOPAD(0x0f6, PIN_INPUT | MUX_MODE0) /* abe_mcbsp2_clkx.abe_mcbsp2_clkx */
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0xb8 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* abe_mcbsp2_dr.abe_mcbsp2_dr */
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OMAP4_IOPAD(0x0f8, PIN_INPUT_PULLDOWN | MUX_MODE0) /* abe_mcbsp2_dr.abe_mcbsp2_dr */
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0xba (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* abe_mcbsp2_dx.abe_mcbsp2_dx */
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OMAP4_IOPAD(0x0fa, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* abe_mcbsp2_dx.abe_mcbsp2_dx */
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0xbc (PIN_INPUT | MUX_MODE0) /* abe_mcbsp2_fsx.abe_mcbsp2_fsx */
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OMAP4_IOPAD(0x0fc, PIN_INPUT | MUX_MODE0) /* abe_mcbsp2_fsx.abe_mcbsp2_fsx */
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>;
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>;
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};
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};
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mcspi1_pins: pinmux_mcspi1_pins {
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mcspi1_pins: pinmux_mcspi1_pins {
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pinctrl-single,pins = <
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pinctrl-single,pins = <
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0xf2 (PIN_INPUT | MUX_MODE0) /* mcspi1_clk.mcspi1_clk */
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OMAP4_IOPAD(0x132, PIN_INPUT | MUX_MODE0) /* mcspi1_clk.mcspi1_clk */
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0xf4 (PIN_INPUT | MUX_MODE0) /* mcspi1_somi.mcspi1_somi */
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OMAP4_IOPAD(0x134, PIN_INPUT | MUX_MODE0) /* mcspi1_somi.mcspi1_somi */
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0xf6 (PIN_INPUT | MUX_MODE0) /* mcspi1_simo.mcspi1_simo */
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OMAP4_IOPAD(0x136, PIN_INPUT | MUX_MODE0) /* mcspi1_simo.mcspi1_simo */
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0xf8 (PIN_INPUT | MUX_MODE0) /* mcspi1_cs0.mcspi1_cs0 */
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OMAP4_IOPAD(0x138, PIN_INPUT | MUX_MODE0) /* mcspi1_cs0.mcspi1_cs0 */
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>;
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>;
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};
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};
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dss_hdmi_pins: pinmux_dss_hdmi_pins {
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dss_hdmi_pins: pinmux_dss_hdmi_pins {
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pinctrl-single,pins = <
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pinctrl-single,pins = <
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0x5a (PIN_INPUT_PULLUP | MUX_MODE0) /* hdmi_cec.hdmi_cec */
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OMAP4_IOPAD(0x09a, PIN_INPUT_PULLUP | MUX_MODE0) /* hdmi_cec.hdmi_cec */
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0x5c (PIN_INPUT_PULLUP | MUX_MODE0) /* hdmi_scl.hdmi_scl */
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OMAP4_IOPAD(0x09c, PIN_INPUT_PULLUP | MUX_MODE0) /* hdmi_scl.hdmi_scl */
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0x5e (PIN_INPUT_PULLUP | MUX_MODE0) /* hdmi_sda.hdmi_sda */
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OMAP4_IOPAD(0x09e, PIN_INPUT_PULLUP | MUX_MODE0) /* hdmi_sda.hdmi_sda */
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>;
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>;
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};
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};
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tpd12s015_pins: pinmux_tpd12s015_pins {
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tpd12s015_pins: pinmux_tpd12s015_pins {
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pinctrl-single,pins = <
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pinctrl-single,pins = <
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0x22 (PIN_OUTPUT | MUX_MODE3) /* gpmc_a17.gpio_41 */
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OMAP4_IOPAD(0x062, PIN_OUTPUT | MUX_MODE3) /* gpmc_a17.gpio_41 */
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0x48 (PIN_OUTPUT | MUX_MODE3) /* gpmc_nbe1.gpio_60 */
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OMAP4_IOPAD(0x088, PIN_OUTPUT | MUX_MODE3) /* gpmc_nbe1.gpio_60 */
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0x58 (PIN_INPUT_PULLDOWN | MUX_MODE3) /* hdmi_hpd.gpio_63 */
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OMAP4_IOPAD(0x098, PIN_INPUT_PULLDOWN | MUX_MODE3) /* hdmi_hpd.gpio_63 */
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>;
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>;
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};
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};
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i2c1_pins: pinmux_i2c1_pins {
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i2c1_pins: pinmux_i2c1_pins {
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pinctrl-single,pins = <
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pinctrl-single,pins = <
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0xe2 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_scl */
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OMAP4_IOPAD(0x122, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_scl */
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0xe4 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_sda */
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OMAP4_IOPAD(0x124, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_sda */
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>;
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>;
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};
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};
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i2c2_pins: pinmux_i2c2_pins {
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i2c2_pins: pinmux_i2c2_pins {
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pinctrl-single,pins = <
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pinctrl-single,pins = <
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0xe6 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c2_scl */
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OMAP4_IOPAD(0x126, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c2_scl */
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0xe8 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c2_sda */
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OMAP4_IOPAD(0x128, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c2_sda */
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>;
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>;
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};
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};
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i2c3_pins: pinmux_i2c3_pins {
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i2c3_pins: pinmux_i2c3_pins {
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pinctrl-single,pins = <
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pinctrl-single,pins = <
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0xea (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c3_scl */
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OMAP4_IOPAD(0x12a, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c3_scl */
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0xec (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c3_sda */
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OMAP4_IOPAD(0x12c, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c3_sda */
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>;
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>;
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};
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};
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i2c4_pins: pinmux_i2c4_pins {
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i2c4_pins: pinmux_i2c4_pins {
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pinctrl-single,pins = <
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pinctrl-single,pins = <
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0xee (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c4_scl */
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OMAP4_IOPAD(0x12e, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c4_scl */
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0xf0 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c4_sda */
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OMAP4_IOPAD(0x130, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c4_sda */
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>;
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>;
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};
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};
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/* wl12xx GPIO output for WLAN_EN */
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/* wl12xx GPIO output for WLAN_EN */
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wl12xx_gpio: pinmux_wl12xx_gpio {
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wl12xx_gpio: pinmux_wl12xx_gpio {
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pinctrl-single,pins = <
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pinctrl-single,pins = <
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0x3c (PIN_OUTPUT | MUX_MODE3) /* gpmc_nwp.gpio_54 */
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OMAP4_IOPAD(0x07c, PIN_OUTPUT | MUX_MODE3) /* gpmc_nwp.gpio_54 */
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>;
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>;
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};
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};
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/* wl12xx GPIO inputs and SDIO pins */
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/* wl12xx GPIO inputs and SDIO pins */
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wl12xx_pins: pinmux_wl12xx_pins {
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wl12xx_pins: pinmux_wl12xx_pins {
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pinctrl-single,pins = <
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pinctrl-single,pins = <
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0x3a (PIN_INPUT | MUX_MODE3) /* gpmc_ncs3.gpio_53 */
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OMAP4_IOPAD(0x07a, PIN_INPUT | MUX_MODE3) /* gpmc_ncs3.gpio_53 */
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0x108 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc5_clk.sdmmc5_clk */
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OMAP4_IOPAD(0x148, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc5_clk.sdmmc5_clk */
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0x10a (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc5_cmd.sdmmc5_cmd */
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OMAP4_IOPAD(0x14a, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc5_cmd.sdmmc5_cmd */
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0x10c (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc5_dat0.sdmmc5_dat0 */
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OMAP4_IOPAD(0x14c, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc5_dat0.sdmmc5_dat0 */
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0x10e (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc5_dat1.sdmmc5_dat1 */
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OMAP4_IOPAD(0x14e, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc5_dat1.sdmmc5_dat1 */
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0x110 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc5_dat2.sdmmc5_dat2 */
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OMAP4_IOPAD(0x150, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc5_dat2.sdmmc5_dat2 */
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0x112 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc5_dat3.sdmmc5_dat3 */
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OMAP4_IOPAD(0x152, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc5_dat3.sdmmc5_dat3 */
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>;
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>;
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};
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};
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};
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};
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