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staging: rtl8188eu: Fix spelling
rtl8188eu contains some spelling errors in comment lines as well as in constants. Harmless as they are, they still make the code feel a bit unclean, which is not something we want in the kernel. Improve this by fixing typos so they won't catch eyes of future driver developers anymore. Signed-off-by: Wolfgang Hartmann <wolfgang.hartmann@siemens.com> Signed-off-by: Manish Shrestha <manishshrestha2006@gmail.com> Signed-off-by: Valentine Sinitsyn <valentine.sinitsyn@gmail.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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@ -48,7 +48,7 @@ void Efuse_PowerSwitch(
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if (PwrState) {
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usb_write8(pAdapter, REG_EFUSE_ACCESS, EFUSE_ACCESS_ON);
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/* 1.2V Power: From VDDON with Power Cut(0x0000h[15]), defualt valid */
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/* 1.2V Power: From VDDON with Power Cut(0x0000h[15]), default valid */
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tmpV16 = usb_read16(pAdapter, REG_SYS_ISO_CTRL);
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if (!(tmpV16 & PWC_EV12V)) {
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tmpV16 |= PWC_EV12V;
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@ -1329,7 +1329,7 @@ void rtw_cpwm_event_callback(struct adapter *padapter, u8 *pbuf)
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}
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/*
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* _rtw_join_timeout_handler - Timeout/faliure handler for CMD JoinBss
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* _rtw_join_timeout_handler - Timeout/failure handler for CMD JoinBss
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* @adapter: pointer to struct adapter structure
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*/
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void _rtw_join_timeout_handler (unsigned long data)
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@ -109,7 +109,7 @@ static void odm_RxPhyStatus92CSeries_Parsing(struct odm_dm_struct *dm_odm,
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dm_odm->PhyDbgInfo.NumQryPhyStatusCCK++;
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/* (1)Hardware does not provide RSSI for CCK */
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/* (2)PWDB, Average PWDB cacluated by hardware (for rate adaptive) */
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/* (2)PWDB, Average PWDB calculated by hardware (for rate adaptive) */
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cck_highpwr = dm_odm->bCckHighPower;
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@ -223,7 +223,7 @@ static void odm_RxPhyStatus92CSeries_Parsing(struct odm_dm_struct *dm_odm,
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pPhyInfo->RxSNR[i] = (s32)(pPhyStaRpt->path_rxsnr[i]/2);
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dm_odm->PhyDbgInfo.RxSNRdB[i] = (s32)(pPhyStaRpt->path_rxsnr[i]/2);
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}
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/* (2)PWDB, Average PWDB cacluated by hardware (for rate adaptive) */
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/* (2)PWDB, Average PWDB calculated by hardware (for rate adaptive) */
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rx_pwr_all = (((pPhyStaRpt->cck_sig_qual_ofdm_pwdb_all) >> 1) & 0x7f) - 110;
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PWDB_ALL = odm_QueryRxPwrPercentage(rx_pwr_all);
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@ -478,7 +478,7 @@ enum odm_operation_mode {
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/* ODM_CMNINFO_WM_MODE */
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enum odm_wireless_mode {
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ODM_WM_UNKNOW = 0x0,
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ODM_WM_UNKNOWN = 0x0,
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ODM_WM_B = BIT(0),
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ODM_WM_G = BIT(1),
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ODM_WM_A = BIT(2),
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@ -15,7 +15,7 @@
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#ifndef __RTL8188E_SPEC_H__
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#define __RTL8188E_SPEC_H__
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/* 8192C Regsiter offset definition */
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/* 8192C Register offset definition */
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#define HAL_PS_TIMER_INT_DELAY 50 /* 50 microseconds */
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#define HAL_92C_NAV_UPPER_UNIT 128 /* micro-second */
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@ -701,7 +701,7 @@ Current IOREG MAP
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#define REG_USB_HRPWM 0xFE58
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#define REG_USB_HCPWM 0xFE57
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/* 8192C Regsiter Bit and Content definition */
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/* 8192C Register Bit and Content definition */
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/* 0x0000h ~ 0x00FFh System Configuration */
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/* 2 SYS_ISO_CTRL */
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