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[ARM] 4391/1: make at91 debug unit support optional

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The AT91x40 family doesn't have the debug unit like its bigger brothers.
But it does have the ID and extension registers (with the bit meanings
the same). Reorganize at91_dbgu.h to cater for this.

This also affects the load uncompressor, since it outputs to the
debug port.

Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Acked-by: Andrew Victor <andrew@sanpeople.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This commit is contained in:
Greg Ungerer 2007-05-18 06:28:01 +01:00 committed by Russell King
parent d0f9b55ece
commit b54942f820
2 changed files with 14 additions and 3 deletions
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13
include/asm-arm/arch-at91/at91_dbgu.h
View File

@ -16,6 +16,7 @@
#ifndef AT91_DBGU_H
#define AT91_DBGU_H
#ifdef AT91_DBGU
#define AT91_DBGU_CR (AT91_DBGU + 0x00) /* Control Register */
#define AT91_DBGU_MR (AT91_DBGU + 0x04) /* Mode Register */
#define AT91_DBGU_IER (AT91_DBGU + 0x08) /* Interrupt Enable Register */
@ -30,6 +31,15 @@
#define AT91_DBGU_CIDR (AT91_DBGU + 0x40) /* Chip ID Register */
#define AT91_DBGU_EXID (AT91_DBGU + 0x44) /* Chip ID Extension Register */
#define AT91_DBGU_FNR (AT91_DBGU + 0x48) /* Force NTRST Register [SAM9 only] */
#define AT91_DBGU_FNTRST (1 << 0) /* Force NTRST */
#endif /* AT91_DBGU */
/*
* Some AT91 parts that don't have full DEBUG units still support the ID
* and extensions register.
*/
#define AT91_CIDR_VERSION (0x1f << 0) /* Version of the Device */
#define AT91_CIDR_EPROC (7 << 5) /* Embedded Processor */
#define AT91_CIDR_NVPSIZ (0xf << 8) /* Nonvolatile Program Memory Size */
@ -53,7 +63,4 @@
#define AT91_CIDR_NVPTYP (7 << 28) /* Nonvolatile Program Memory Type */
#define AT91_CIDR_EXT (1 << 31) /* Extension Flag */
#define AT91_DBGU_FNR (AT91_DBGU + 0x48) /* Force NTRST Register [SAM9 only] */
#define AT91_DBGU_FNTRST (1 << 0) /* Force NTRST */
#endif

4
include/asm-arm/arch-at91/uncompress.h
View File

@ -33,20 +33,24 @@
*/
static void putc(int c)
{
#ifdef AT91_DBGU
void __iomem *sys = (void __iomem *) AT91_BASE_SYS; /* physical address */
while (!(__raw_readl(sys + AT91_DBGU_SR) & AT91_DBGU_TXRDY))
barrier();
__raw_writel(c, sys + AT91_DBGU_THR);
#endif
}
static inline void flush(void)
{
#ifdef AT91_DBGU
void __iomem *sys = (void __iomem *) AT91_BASE_SYS; /* physical address */
/* wait for transmission to complete */
while (!(__raw_readl(sys + AT91_DBGU_SR) & AT91_DBGU_TXEMPTY))
barrier();
#endif
}
#define arch_decomp_setup()