phy fixes for 6.4

- Fix for mediatek driver warning for variable used uninitialized and fix
    for wrong pll math
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCAAdFiEE+vs47OPLdNbVcHzyfBQHDyUjg0cFAmRVAuwACgkQfBQHDyUj
 g0fo5Q//ciFC9H6b4o7HwjTpBCUvILtHW5j7Y8aqImHSeJ7DW3qgVlJGMwmnm1Wh
 gR8pekmKBoYmDd4Nqr5I1U7sz6iJYdROZdNAoUoJsE4P/oTgPvxdUmLmUslcjc3U
 ux66e3jp6qT1eq0IXXa3eW2XpRexCuknzRhfAovOIGs6nDCaAmWaY+bomFG8S6jV
 I9cPr9cGWZVBzGw/0LMRMQ+fGsd9fqn9onq28voltrZybmV3LWqVRHjAO2Blc7fp
 OqkEToKZKDsrDpxX+Ue2WvScv+ZD206VDNYhspa/RO3/As2s62NDdvoDQcG2NKXz
 x/UfpigW7XJvn9N0CXVJkqPhYiCYBtnXQOieW8YLDfjGpio1vABPgS3mJsWIy4mT
 6dQMzGIhJW+fqETJeukFlbWxjoXPruPuC/qosS3p9FrMnL7RytAg2U03J8FQKN8b
 IVzxLm4Q4zyJaYOUsCwihOW7kBCvLSJdAgzAA6BR0D6DNLmWIrfytznv3Ja8IfcI
 dgdMHJ9ga9AFviPdUdBsunfQPbP0aWzNhqtkmgT0JGUyDc8BViC4d6yAc7WOA3KB
 VHpoJutYApmnFbK8YEwpSL2q6Q4uL76pHdAdhT5vRHh3unGKYSZ2TXuLHnKHipoZ
 5+Jqg+GO0PvtWsmBOlpU4f0UP+EyjR3toVJx3AZ8g3g1T68oXAQ=
 =4GRz
 -----END PGP SIGNATURE-----

Merge tag 'phy-fixes-6.4-1' of git://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy

Pull phy fixes from Vinod Koul:

 - Fix for mediatek driver warning for variable used uninitialized and
   for wrong pll math

* tag 'phy-fixes-6.4-1' of git://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy:
  phy: mediatek: hdmi: mt8195: fix wrong pll calculus
  phy: mediatek: hdmi: mt8195: fix uninitialized variable usage in pll_calc
This commit is contained in:
Linus Torvalds 2023-05-05 11:57:29 -07:00
commit b49178e68f

View File

@ -213,7 +213,7 @@ static int mtk_hdmi_pll_calc(struct mtk_hdmi_phy *hdmi_phy, struct clk_hw *hw,
u64 tmds_clk, pixel_clk, da_hdmitx21_ref_ck, ns_hdmipll_ck, pcw;
u8 txpredivs[4] = { 2, 4, 6, 12 };
u32 fbkdiv_low;
int i, ret;
int i;
pixel_clk = rate;
tmds_clk = pixel_clk;
@ -271,7 +271,7 @@ static int mtk_hdmi_pll_calc(struct mtk_hdmi_phy *hdmi_phy, struct clk_hw *hw,
* [32,24] 9bit integer, [23,0]:24bit fraction
*/
pcw = div_u64(((u64)ns_hdmipll_ck) << PCW_DECIMAL_WIDTH,
da_hdmitx21_ref_ck / PLL_FBKDIV_HS3);
da_hdmitx21_ref_ck * PLL_FBKDIV_HS3);
if (pcw > GENMASK_ULL(32, 0))
return -EINVAL;
@ -288,17 +288,13 @@ static int mtk_hdmi_pll_calc(struct mtk_hdmi_phy *hdmi_phy, struct clk_hw *hw,
posdiv2 = 1;
/* Digital clk divider, max /32 */
digital_div = div_u64((u64)ns_hdmipll_ck, posdiv1 / posdiv2 / pixel_clk);
digital_div = div_u64(ns_hdmipll_ck, posdiv1 * posdiv2 * pixel_clk);
if (!(digital_div <= 32 && digital_div >= 1))
return -EINVAL;
mtk_hdmi_pll_set_hw(hw, PLL_PREDIV, fbkdiv_high, fbkdiv_low,
return mtk_hdmi_pll_set_hw(hw, PLL_PREDIV, fbkdiv_high, fbkdiv_low,
PLL_FBKDIV_HS3, posdiv1, posdiv2, txprediv,
txposdiv, digital_div);
if (ret)
return -EINVAL;
return 0;
}
static int mtk_hdmi_pll_drv_setting(struct clk_hw *hw)