staging: mt7621-pci: add quirks for 'E2' revision using 'soc_device_attribute'

Depending on revision of the chip, reset lines are inverted. Make code
more readable making use of 'soc_device_match' in driver probe function.

Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
Link: https://lore.kernel.org/r/20191006181032.19112-1-sergio.paracuellos@gmail.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Sergio Paracuellos 2019-10-06 20:10:32 +02:00 committed by Greg Kroah-Hartman
parent d8a363ef00
commit b483b4e4d3

View File

@ -29,15 +29,14 @@
#include <linux/phy/phy.h> #include <linux/phy/phy.h>
#include <linux/platform_device.h> #include <linux/platform_device.h>
#include <linux/reset.h> #include <linux/reset.h>
#include <linux/sys_soc.h>
#include <mt7621.h> #include <mt7621.h>
#include <ralink_regs.h> #include <ralink_regs.h>
#include "../../pci/pci.h" #include "../../pci/pci.h"
/* sysctl */ /* sysctl */
#define MT7621_CHIP_REV_ID 0x0c
#define MT7621_GPIO_MODE 0x60 #define MT7621_GPIO_MODE 0x60
#define CHIP_REV_MT7621_E2 0x0101
/* MediaTek specific configuration registers */ /* MediaTek specific configuration registers */
#define PCIE_FTS_NUM 0x70c #define PCIE_FTS_NUM 0x70c
@ -126,6 +125,8 @@ struct mt7621_pcie_port {
* @ports: pointer to PCIe port information * @ports: pointer to PCIe port information
* @perst: gpio reset * @perst: gpio reset
* @rst: pointer to pcie reset * @rst: pointer to pcie reset
* @resets_inverted: depends on chip revision
* reset lines are inverted.
*/ */
struct mt7621_pcie { struct mt7621_pcie {
void __iomem *base; void __iomem *base;
@ -140,6 +141,7 @@ struct mt7621_pcie {
struct list_head ports; struct list_head ports;
struct gpio_desc *perst; struct gpio_desc *perst;
struct reset_control *rst; struct reset_control *rst;
bool resets_inverted;
}; };
static inline u32 pcie_read(struct mt7621_pcie *pcie, u32 reg) static inline u32 pcie_read(struct mt7621_pcie *pcie, u32 reg)
@ -229,9 +231,9 @@ static inline void mt7621_pcie_port_clk_disable(struct mt7621_pcie_port *port)
static inline void mt7621_control_assert(struct mt7621_pcie_port *port) static inline void mt7621_control_assert(struct mt7621_pcie_port *port)
{ {
u32 chip_rev_id = rt_sysc_r32(MT7621_CHIP_REV_ID); struct mt7621_pcie *pcie = port->pcie;
if ((chip_rev_id & 0xFFFF) == CHIP_REV_MT7621_E2) if (pcie->resets_inverted)
reset_control_assert(port->pcie_rst); reset_control_assert(port->pcie_rst);
else else
reset_control_deassert(port->pcie_rst); reset_control_deassert(port->pcie_rst);
@ -239,9 +241,9 @@ static inline void mt7621_control_assert(struct mt7621_pcie_port *port)
static inline void mt7621_control_deassert(struct mt7621_pcie_port *port) static inline void mt7621_control_deassert(struct mt7621_pcie_port *port)
{ {
u32 chip_rev_id = rt_sysc_r32(MT7621_CHIP_REV_ID); struct mt7621_pcie *pcie = port->pcie;
if ((chip_rev_id & 0xFFFF) == CHIP_REV_MT7621_E2) if (pcie->resets_inverted)
reset_control_deassert(port->pcie_rst); reset_control_deassert(port->pcie_rst);
else else
reset_control_assert(port->pcie_rst); reset_control_assert(port->pcie_rst);
@ -641,9 +643,14 @@ static int mt7621_pcie_register_host(struct pci_host_bridge *host,
return pci_host_probe(host); return pci_host_probe(host);
} }
static const struct soc_device_attribute mt7621_pci_quirks_match[] = {
{ .soc_id = "mt7621", .revision = "E2" }
};
static int mt7621_pci_probe(struct platform_device *pdev) static int mt7621_pci_probe(struct platform_device *pdev)
{ {
struct device *dev = &pdev->dev; struct device *dev = &pdev->dev;
const struct soc_device_attribute *attr;
struct mt7621_pcie *pcie; struct mt7621_pcie *pcie;
struct pci_host_bridge *bridge; struct pci_host_bridge *bridge;
int err; int err;
@ -661,6 +668,10 @@ static int mt7621_pci_probe(struct platform_device *pdev)
platform_set_drvdata(pdev, pcie); platform_set_drvdata(pdev, pcie);
INIT_LIST_HEAD(&pcie->ports); INIT_LIST_HEAD(&pcie->ports);
attr = soc_device_match(mt7621_pci_quirks_match);
if (attr)
pcie->resets_inverted = true;
err = mt7621_pcie_parse_dt(pcie); err = mt7621_pcie_parse_dt(pcie);
if (err) { if (err) {
dev_err(dev, "Parsing DT failed\n"); dev_err(dev, "Parsing DT failed\n");