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arm64: dts: sdm845: Redefine interconnect provider DT nodes
Add the DT nodes for each of the Network-On-Chip interconnect buses found on SDM845 based platform and redefine the rsc_hlos child node as a bcm-voter device to better represent the hardware. Reviewed-by: Evan Green <evgreen@chromium.org> Acked-by: Georgi Djakov <georgi.djakov@linaro.org> Signed-off-by: David Dai <daidavid1@codeaurora.org> Signed-off-by: Odelu Kukatla <okukatla@codeaurora.org> Signed-off-by: Sibi Sankar <sibis@codeaurora.org> Link: https://lore.kernel.org/r/20200209183411.17195-7-sibis@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
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@ -1576,6 +1576,55 @@
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mem_noc: interconnect@1380000 {
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compatible = "qcom,sdm845-mem-noc";
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reg = <0 0x01380000 0 0x27200>;
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#interconnect-cells = <1>;
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qcom,bcm-voters = <&apps_bcm_voter>;
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};
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dc_noc: interconnect@14e0000 {
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compatible = "qcom,sdm845-dc-noc";
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reg = <0 0x014e0000 0 0x400>;
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#interconnect-cells = <1>;
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qcom,bcm-voters = <&apps_bcm_voter>;
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};
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config_noc: interconnect@1500000 {
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compatible = "qcom,sdm845-config-noc";
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reg = <0 0x01500000 0 0x5080>;
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#interconnect-cells = <1>;
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qcom,bcm-voters = <&apps_bcm_voter>;
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};
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system_noc: interconnect@1620000 {
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compatible = "qcom,sdm845-system-noc";
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reg = <0 0x01620000 0 0x18080>;
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#interconnect-cells = <1>;
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qcom,bcm-voters = <&apps_bcm_voter>;
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};
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aggre1_noc: interconnect@16e0000 {
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compatible = "qcom,sdm845-aggre1-noc";
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reg = <0 0x016e0000 0 0x15080>;
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#interconnect-cells = <1>;
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qcom,bcm-voters = <&apps_bcm_voter>;
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};
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aggre2_noc: interconnect@1700000 {
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compatible = "qcom,sdm845-aggre2-noc";
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reg = <0 0x01700000 0 0x1f300>;
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#interconnect-cells = <1>;
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qcom,bcm-voters = <&apps_bcm_voter>;
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};
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mmss_noc: interconnect@1740000 {
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compatible = "qcom,sdm845-mmss-noc";
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reg = <0 0x01740000 0 0x1c100>;
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#interconnect-cells = <1>;
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qcom,bcm-voters = <&apps_bcm_voter>;
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};
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ufs_mem_hc: ufshc@1d84000 {
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compatible = "qcom,sdm845-ufshc", "qcom,ufshc",
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"jedec,ufs-2.0";
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@ -3335,6 +3384,13 @@
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status = "disabled";
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};
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gladiator_noc: interconnect@17900000 {
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compatible = "qcom,sdm845-gladiator-noc";
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reg = <0 0x17900000 0 0xd080>;
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#interconnect-cells = <1>;
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qcom,bcm-voters = <&apps_bcm_voter>;
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};
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watchdog@17980000 {
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compatible = "qcom,apss-wdt-sdm845", "qcom,kpss-wdt";
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reg = <0 0x17980000 0 0x1000>;
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@ -3364,6 +3420,10 @@
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<WAKE_TCS 3>,
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<CONTROL_TCS 1>;
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apps_bcm_voter: bcm-voter {
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compatible = "qcom,bcm-voter";
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};
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rpmhcc: clock-controller {
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compatible = "qcom,sdm845-rpmh-clk";
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#clock-cells = <1>;
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@ -3420,11 +3480,6 @@
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};
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};
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};
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rsc_hlos: interconnect {
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compatible = "qcom,sdm845-rsc-hlos";
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#interconnect-cells = <1>;
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};
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};
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intc: interrupt-controller@17a00000 {
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