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USB: imx21-hcd: refactor hardware data memory management
We already have fields describing the hardware data memory (dmem_size and dmem_offset) in the HCD private data, use them rather than the rather obscure read from the hardware descriptor. Signed-off-by: Martin Fuzzey <mfuzzey@gmail.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
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@ -323,16 +323,23 @@ static void activate_queued_etd(struct imx21 *imx21,
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etd_writel(imx21, etd_num, 1,
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((dmem_offset + maxpacket) << DW1_YBUFSRTAD) | dmem_offset);
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etd->dmem_offset = dmem_offset;
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urb_priv->active = 1;
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activate_etd(imx21, etd_num, etd->dma_handle, dir);
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}
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static void free_dmem(struct imx21 *imx21, int offset)
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static void free_dmem(struct imx21 *imx21, struct etd_priv *etd)
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{
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struct imx21_dmem_area *area;
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struct etd_priv *etd, *tmp;
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struct etd_priv *tmp;
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int found = 0;
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int offset;
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if (!etd->dmem_size)
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return;
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etd->dmem_size = 0;
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offset = etd->dmem_offset;
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list_for_each_entry(area, &imx21->dmem_list, list) {
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if (area->offset == offset) {
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debug_dmem_freed(imx21, area->size);
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@ -734,9 +741,7 @@ static void dequeue_isoc_urb(struct imx21 *imx21,
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struct etd_priv *etd = imx21->etd + etd_num;
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reset_etd(imx21, etd_num);
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if (etd->dmem_size)
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free_dmem(imx21, etd->dmem_offset);
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etd->dmem_size = 0;
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free_dmem(imx21, etd);
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}
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}
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}
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@ -761,7 +766,6 @@ static void schedule_nonisoc_etd(struct imx21 *imx21, struct urb *urb)
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int state = urb_priv->state;
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int etd_num = ep_priv->etd[0];
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struct etd_priv *etd;
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int dmem_offset;
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u32 count;
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u16 etd_buf_size;
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u16 maxpacket;
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@ -855,8 +859,8 @@ static void schedule_nonisoc_etd(struct imx21 *imx21, struct urb *urb)
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/* allocate x and y buffer space at once */
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etd->dmem_size = (count > maxpacket) ? maxpacket * 2 : maxpacket;
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dmem_offset = alloc_dmem(imx21, etd->dmem_size, urb_priv->ep);
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if (dmem_offset < 0) {
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etd->dmem_offset = alloc_dmem(imx21, etd->dmem_size, urb_priv->ep);
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if (etd->dmem_offset < 0) {
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/* Setup everything we can in HW and update when we get DMEM */
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etd_writel(imx21, etd_num, 1, (u32)maxpacket << 16);
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@ -867,8 +871,8 @@ static void schedule_nonisoc_etd(struct imx21 *imx21, struct urb *urb)
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}
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etd_writel(imx21, etd_num, 1,
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(((u32) dmem_offset + (u32) maxpacket) << DW1_YBUFSRTAD) |
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(u32) dmem_offset);
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(((u32) etd->dmem_offset + (u32) maxpacket) << DW1_YBUFSRTAD) |
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(u32) etd->dmem_offset);
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urb_priv->active = 1;
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@ -886,7 +890,6 @@ static void nonisoc_etd_done(struct usb_hcd *hcd, struct urb *urb, int etd_num)
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u32 etd_mask = 1 << etd_num;
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struct urb_priv *urb_priv = urb->hcpriv;
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int dir;
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u16 xbufaddr;
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int cc;
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u32 bytes_xfrd;
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int etd_done;
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@ -894,7 +897,6 @@ static void nonisoc_etd_done(struct usb_hcd *hcd, struct urb *urb, int etd_num)
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disactivate_etd(imx21, etd_num);
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dir = (etd_readl(imx21, etd_num, 0) >> DW0_DIRECT) & 0x3;
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xbufaddr = etd_readl(imx21, etd_num, 1) & 0xffff;
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cc = (etd_readl(imx21, etd_num, 2) >> DW2_COMPCODE) & 0xf;
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bytes_xfrd = etd->len - (etd_readl(imx21, etd_num, 3) & 0x1fffff);
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@ -907,7 +909,7 @@ static void nonisoc_etd_done(struct usb_hcd *hcd, struct urb *urb, int etd_num)
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clear_toggle_bit(imx21, USBH_XFILLSTAT, etd_mask);
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clear_toggle_bit(imx21, USBH_YFILLSTAT, etd_mask);
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}
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free_dmem(imx21, xbufaddr);
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free_dmem(imx21, etd);
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urb->error_count = 0;
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if (!(urb->transfer_flags & URB_SHORT_NOT_OK)
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@ -1123,7 +1125,7 @@ static int imx21_hc_urb_dequeue(struct usb_hcd *hcd, struct urb *urb,
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int etd_num = ep_priv->etd[0];
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if (etd_num != -1) {
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disactivate_etd(imx21, etd_num);
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free_dmem(imx21, etd_readl(imx21, etd_num, 1) & 0xffff);
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free_dmem(imx21, &imx21->etd[etd_num]);
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imx21->etd[etd_num].urb = NULL;
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}
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}
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