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Support for the new rk3399 firefly board; extending the pcie ranges to
make usage of pci switches possible; some more qos and pinctrl nodes on rk3399; updates for the rk3399 cpu operating points including separate opps for the higher rates OP1 variant of the chip and mmc-nodes for the rk3328. -----BEGIN PGP SIGNATURE----- iQFEBAABCAAuFiEE7v+35S2Q1vLNA3Lx86Z5yZzRHYEFAlk5yQ4QHGhlaWtvQHNu dGVjaC5kZQAKCRDzpnnJnNEdgU7rCACdo8/RlAH58lR+35ZkJ3hAFHAlJJ9l2GFW pobp2PYjtSCLaHz2o9yU7tT0peNph3YoeL9rFS44U/NUwtE4eloPbPea/FaGJ0nW LUP6Y5bnM8sJMmO3YrG6Y3ryjTFD9GGe9IzSDgQhai+rXPfo/FZ+a1krpNN3HrJN dd6PIozaa5aJpDkpET7NyvTRePMiDmuJAoj/9atDr8MLDKuuKNqQtnKcXGJ+3gUb Zc4Ltxy2uTtc9bFi05Bi19AnZIqDXAGQdU+u+lqUGps3f8Q63iWYU/OEiCw3Oozs 3RJ7KXSZ58JN1CXwxMUE1OFplF5fVvPsv4Vzg8ddJ+vOK4E4t8Pd =UMmB -----END PGP SIGNATURE----- Merge tag 'v4.13-rockchip-dts64-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/dt64 Support for the new rk3399 firefly board; extending the pcie ranges to make usage of pci switches possible; some more qos and pinctrl nodes on rk3399; updates for the rk3399 cpu operating points including separate opps for the higher rates OP1 variant of the chip and mmc-nodes for the rk3328. * tag 'v4.13-rockchip-dts64-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: arm64: dts: rockchip: update common rk3399 operating points arm64: dts: rockchip: introduce rk3399-op1 operating points arm64: dts: rockchip: enable usb3 controllers on rk3399-firefly arm64: dts: rockchip: add ethernet0 alias on rk3399 arm64: dts: rockchip: bring rk3399-firefly power-tree in line arm64: dts: rockchip: add sdmmc/sdio/emmc nodes for RK3328 SoCs arm64: dts: rockchip: extent IORESOURCE_MEM_64 of PCIe for rk3399 arm64: dts: rockchip: extent bus-ranges of PCIe for rk3399 arm64: dts: rockchip: add pinctrl settings for some rk3399 peripherals arm64: dts: rockchip: add some missing qos nodes on rk3399 arm64: dts: rockchip: add support for firefly-rk3399 board dt-bindings: add firefly-rk3399 board support Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Olof Johansson
commit
b21af9751a
@ -42,6 +42,10 @@ Rockchip platforms device tree bindings
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Required root node properties:
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- compatible = "firefly,firefly-rk3288-reload", "rockchip,rk3288";
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- Firefly Firefly-RK3399 board:
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Required root node properties:
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- compatible = "firefly,firefly-rk3399", "rockchip,rk3399";
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- ChipSPARK PopMetal-RK3288 board:
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Required root node properties:
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- compatible = "chipspark,popmetal-rk3288", "rockchip,rk3288";
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@ -5,6 +5,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3368-orion-r68-meta.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3368-px5-evb.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3368-r88.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-evb.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-firefly.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-gru-kevin.dtb
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always := $(dtb-y)
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@ -372,6 +372,39 @@
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<32768>;
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};
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sdmmc: dwmmc@ff500000 {
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compatible = "rockchip,rk3328-dw-mshc", "rockchip,rk3288-dw-mshc";
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reg = <0x0 0xff500000 0x0 0x4000>;
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interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cru HCLK_SDMMC>, <&cru SCLK_SDMMC>,
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<&cru SCLK_SDMMC_DRV>, <&cru SCLK_SDMMC_SAMPLE>;
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clock-names = "biu", "ciu", "ciu_drv", "ciu_sample";
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fifo-depth = <0x100>;
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status = "disabled";
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};
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sdio: dwmmc@ff510000 {
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compatible = "rockchip,rk3328-dw-mshc", "rockchip,rk3288-dw-mshc";
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reg = <0x0 0xff510000 0x0 0x4000>;
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interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cru HCLK_SDIO>, <&cru SCLK_SDIO>,
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<&cru SCLK_SDIO_DRV>, <&cru SCLK_SDIO_SAMPLE>;
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clock-names = "biu", "ciu", "ciu_drv", "ciu_sample";
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fifo-depth = <0x100>;
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status = "disabled";
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};
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emmc: dwmmc@ff520000 {
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compatible = "rockchip,rk3328-dw-mshc", "rockchip,rk3288-dw-mshc";
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reg = <0x0 0xff520000 0x0 0x4000>;
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interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cru HCLK_EMMC>, <&cru SCLK_EMMC>,
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<&cru SCLK_EMMC_DRV>, <&cru SCLK_EMMC_SAMPLE>;
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clock-names = "biu", "ciu", "ciu_drv", "ciu_sample";
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fifo-depth = <0x100>;
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status = "disabled";
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};
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gmac2io: ethernet@ff540000 {
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compatible = "rockchip,rk3328-gmac";
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reg = <0x0 0xff540000 0x0 0x10000>;
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718
arch/arm64/boot/dts/rockchip/rk3399-firefly.dts
Normal file
718
arch/arm64/boot/dts/rockchip/rk3399-firefly.dts
Normal file
@ -0,0 +1,718 @@
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/*
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* Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd.
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*
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* This file is dual-licensed: you can use it either under the terms
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* of the GPL or the X11 license, at your option. Note that this dual
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* licensing only applies to this file, and not this project as a
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* whole.
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*
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* a) This file is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of the
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* License, or (at your option) any later version.
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*
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* This file is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* Or, alternatively,
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*
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* b) Permission is hereby granted, free of charge, to any person
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* obtaining a copy of this software and associated documentation
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* files (the "Software"), to deal in the Software without
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* restriction, including without limitation the rights to use,
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* copy, modify, merge, publish, distribute, sublicense, and/or
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* sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following
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* conditions:
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*
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* The above copyright notice and this permission notice shall be
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* included in all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
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* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
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* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
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* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*/
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/dts-v1/;
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#include <dt-bindings/pwm/pwm.h>
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#include "rk3399.dtsi"
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/ {
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model = "Firefly-RK3399 Board";
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compatible = "firefly,firefly-rk3399", "rockchip,rk3399";
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backlight: backlight {
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compatible = "pwm-backlight";
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enable-gpios = <&gpio1 RK_PB5 GPIO_ACTIVE_HIGH>;
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pwms = <&pwm0 0 25000 0>;
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brightness-levels = <
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0 1 2 3 4 5 6 7
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8 9 10 11 12 13 14 15
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16 17 18 19 20 21 22 23
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24 25 26 27 28 29 30 31
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32 33 34 35 36 37 38 39
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40 41 42 43 44 45 46 47
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48 49 50 51 52 53 54 55
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56 57 58 59 60 61 62 63
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64 65 66 67 68 69 70 71
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72 73 74 75 76 77 78 79
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80 81 82 83 84 85 86 87
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88 89 90 91 92 93 94 95
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96 97 98 99 100 101 102 103
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104 105 106 107 108 109 110 111
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112 113 114 115 116 117 118 119
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120 121 122 123 124 125 126 127
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128 129 130 131 132 133 134 135
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136 137 138 139 140 141 142 143
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144 145 146 147 148 149 150 151
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152 153 154 155 156 157 158 159
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160 161 162 163 164 165 166 167
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168 169 170 171 172 173 174 175
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176 177 178 179 180 181 182 183
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184 185 186 187 188 189 190 191
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192 193 194 195 196 197 198 199
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200 201 202 203 204 205 206 207
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208 209 210 211 212 213 214 215
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216 217 218 219 220 221 222 223
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224 225 226 227 228 229 230 231
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232 233 234 235 236 237 238 239
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240 241 242 243 244 245 246 247
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248 249 250 251 252 253 254 255>;
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default-brightness-level = <200>;
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};
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clkin_gmac: external-gmac-clock {
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compatible = "fixed-clock";
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clock-frequency = <125000000>;
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clock-output-names = "clkin_gmac";
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#clock-cells = <0>;
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};
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dc_12v: dc-12v {
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compatible = "regulator-fixed";
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regulator-name = "dc_12v";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <12000000>;
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regulator-max-microvolt = <12000000>;
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};
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rt5640-sound {
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compatible = "simple-audio-card";
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simple-audio-card,name = "rockchip,rt5640-codec";
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simple-audio-card,format = "i2s";
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simple-audio-card,mclk-fs = <256>;
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simple-audio-card,widgets =
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"Microphone", "Mic Jack",
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"Headphone", "Headphone Jack";
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simple-audio-card,routing =
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"Mic Jack", "MICBIAS1",
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"IN1P", "Mic Jack",
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"Headphone Jack", "HPOL",
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"Headphone Jack", "HPOR";
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simple-audio-card,cpu {
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sound-dai = <&i2s1>;
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};
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simple-audio-card,codec {
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sound-dai = <&rt5640>;
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};
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};
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sdio_pwrseq: sdio-pwrseq {
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compatible = "mmc-pwrseq-simple";
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clocks = <&rk808 1>;
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clock-names = "ext_clock";
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pinctrl-names = "default";
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pinctrl-0 = <&wifi_enable_h>;
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/*
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* On the module itself this is one of these (depending
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* on the actual card populated):
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* - SDIO_RESET_L_WL_REG_ON
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* - PDN (power down when low)
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*/
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reset-gpios = <&gpio0 RK_PB2 GPIO_ACTIVE_LOW>;
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};
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/* switched by pmic_sleep */
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vcc1v8_s3: vcca1v8_s3: vcc1v8-s3 {
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compatible = "regulator-fixed";
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regulator-name = "vcc1v8_s3";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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vin-supply = <&vcc_1v8>;
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};
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vcc3v3_pcie: vcc3v3-pcie-regulator {
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compatible = "regulator-fixed";
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enable-active-high;
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gpio = <&gpio1 RK_PC1 GPIO_ACTIVE_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&pcie_pwr_en>;
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regulator-name = "vcc3v3_pcie";
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regulator-always-on;
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regulator-boot-on;
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vin-supply = <&dc_12v>;
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};
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vcc3v3_sys: vcc3v3-sys {
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compatible = "regulator-fixed";
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regulator-name = "vcc3v3_sys";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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vin-supply = <&vcc_sys>;
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};
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/* Actually 3 regulators (host0, 1, 2) controlled by the same gpio */
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vcc5v0_host: vcc5v0-host-regulator {
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compatible = "regulator-fixed";
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enable-active-high;
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gpio = <&gpio1 RK_PA0 GPIO_ACTIVE_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&vcc5v0_host_en>;
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regulator-name = "vcc5v0_host";
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regulator-always-on;
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vin-supply = <&vcc_sys>;
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};
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vcc_sys: vcc-sys {
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compatible = "regulator-fixed";
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regulator-name = "vcc_sys";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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vin-supply = <&dc_12v>;
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};
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vdd_log: vdd-log {
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compatible = "pwm-regulator";
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pwms = <&pwm2 0 25000 1>;
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regulator-name = "vdd_log";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <800000>;
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regulator-max-microvolt = <1400000>;
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vin-supply = <&vcc_sys>;
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};
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};
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&cpu_l0 {
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cpu-supply = <&vdd_cpu_l>;
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};
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&cpu_l1 {
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cpu-supply = <&vdd_cpu_l>;
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};
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&cpu_l2 {
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cpu-supply = <&vdd_cpu_l>;
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};
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&cpu_l3 {
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cpu-supply = <&vdd_cpu_l>;
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};
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&cpu_b0 {
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cpu-supply = <&vdd_cpu_b>;
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};
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&cpu_b1 {
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cpu-supply = <&vdd_cpu_b>;
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||||
};
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||||
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&emmc_phy {
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status = "okay";
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};
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||||
&gmac {
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||||
assigned-clocks = <&cru SCLK_RMII_SRC>;
|
||||
assigned-clock-parents = <&clkin_gmac>;
|
||||
clock_in_out = "input";
|
||||
phy-supply = <&vcc_lan>;
|
||||
phy-mode = "rgmii";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&rgmii_pins>;
|
||||
snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
|
||||
snps,reset-active-low;
|
||||
snps,reset-delays-us = <0 10000 50000>;
|
||||
tx_delay = <0x28>;
|
||||
rx_delay = <0x11>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&i2c0 {
|
||||
clock-frequency = <400000>;
|
||||
i2c-scl-rising-time-ns = <168>;
|
||||
i2c-scl-falling-time-ns = <4>;
|
||||
status = "okay";
|
||||
|
||||
rk808: pmic@1b {
|
||||
compatible = "rockchip,rk808";
|
||||
reg = <0x1b>;
|
||||
interrupt-parent = <&gpio1>;
|
||||
interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
|
||||
#clock-cells = <1>;
|
||||
clock-output-names = "xin32k", "rk808-clkout2";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pmic_int_l>;
|
||||
rockchip,system-power-controller;
|
||||
wakeup-source;
|
||||
|
||||
vcc1-supply = <&vcc_sys>;
|
||||
vcc2-supply = <&vcc_sys>;
|
||||
vcc3-supply = <&vcc_sys>;
|
||||
vcc4-supply = <&vcc_sys>;
|
||||
vcc6-supply = <&vcc_sys>;
|
||||
vcc7-supply = <&vcc_sys>;
|
||||
vcc8-supply = <&vcc3v3_sys>;
|
||||
vcc9-supply = <&vcc_sys>;
|
||||
vcc10-supply = <&vcc_sys>;
|
||||
vcc11-supply = <&vcc_sys>;
|
||||
vcc12-supply = <&vcc3v3_sys>;
|
||||
vddio-supply = <&vcc1v8_pmu>;
|
||||
|
||||
regulators {
|
||||
vdd_center: DCDC_REG1 {
|
||||
regulator-name = "vdd_center";
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <750000>;
|
||||
regulator-max-microvolt = <1350000>;
|
||||
regulator-ramp-delay = <6001>;
|
||||
regulator-state-mem {
|
||||
regulator-off-in-suspend;
|
||||
};
|
||||
};
|
||||
|
||||
vdd_cpu_l: DCDC_REG2 {
|
||||
regulator-name = "vdd_cpu_l";
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <750000>;
|
||||
regulator-max-microvolt = <1350000>;
|
||||
regulator-ramp-delay = <6001>;
|
||||
regulator-state-mem {
|
||||
regulator-off-in-suspend;
|
||||
};
|
||||
};
|
||||
|
||||
vcc_ddr: DCDC_REG3 {
|
||||
regulator-name = "vcc_ddr";
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-state-mem {
|
||||
regulator-on-in-suspend;
|
||||
};
|
||||
};
|
||||
|
||||
vcc_1v8: DCDC_REG4 {
|
||||
regulator-name = "vcc_1v8";
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-state-mem {
|
||||
regulator-on-in-suspend;
|
||||
regulator-suspend-microvolt = <1800000>;
|
||||
};
|
||||
};
|
||||
|
||||
vcc1v8_dvp: LDO_REG1 {
|
||||
regulator-name = "vcc1v8_dvp";
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-state-mem {
|
||||
regulator-off-in-suspend;
|
||||
};
|
||||
};
|
||||
|
||||
vcc2v8_dvp: LDO_REG2 {
|
||||
regulator-name = "vcc2v8_dvp";
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <2800000>;
|
||||
regulator-max-microvolt = <2800000>;
|
||||
regulator-state-mem {
|
||||
regulator-off-in-suspend;
|
||||
};
|
||||
};
|
||||
|
||||
vcc1v8_pmu: LDO_REG3 {
|
||||
regulator-name = "vcc1v8_pmu";
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-state-mem {
|
||||
regulator-on-in-suspend;
|
||||
regulator-suspend-microvolt = <1800000>;
|
||||
};
|
||||
};
|
||||
|
||||
vcc_sdio: LDO_REG4 {
|
||||
regulator-name = "vcc_sdio";
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-state-mem {
|
||||
regulator-on-in-suspend;
|
||||
regulator-suspend-microvolt = <3300000>;
|
||||
};
|
||||
};
|
||||
|
||||
vcca3v0_codec: LDO_REG5 {
|
||||
regulator-name = "vcca3v0_codec";
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <3000000>;
|
||||
regulator-max-microvolt = <3000000>;
|
||||
regulator-state-mem {
|
||||
regulator-off-in-suspend;
|
||||
};
|
||||
};
|
||||
|
||||
vcc_1v5: LDO_REG6 {
|
||||
regulator-name = "vcc_1v5";
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <1500000>;
|
||||
regulator-max-microvolt = <1500000>;
|
||||
regulator-state-mem {
|
||||
regulator-on-in-suspend;
|
||||
regulator-suspend-microvolt = <1500000>;
|
||||
};
|
||||
};
|
||||
|
||||
vcca1v8_codec: LDO_REG7 {
|
||||
regulator-name = "vcca1v8_codec";
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-state-mem {
|
||||
regulator-off-in-suspend;
|
||||
};
|
||||
};
|
||||
|
||||
vcc_3v0: LDO_REG8 {
|
||||
regulator-name = "vcc_3v0";
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <3000000>;
|
||||
regulator-max-microvolt = <3000000>;
|
||||
regulator-state-mem {
|
||||
regulator-on-in-suspend;
|
||||
regulator-suspend-microvolt = <3000000>;
|
||||
};
|
||||
};
|
||||
|
||||
vcc3v3_s3: vcc_lan: SWITCH_REG1 {
|
||||
regulator-name = "vcc3v3_s3";
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-state-mem {
|
||||
regulator-off-in-suspend;
|
||||
};
|
||||
};
|
||||
|
||||
vcc3v3_s0: SWITCH_REG2 {
|
||||
regulator-name = "vcc3v3_s0";
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-state-mem {
|
||||
regulator-off-in-suspend;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
vdd_cpu_b: regulator@40 {
|
||||
compatible = "silergy,syr827";
|
||||
reg = <0x40>;
|
||||
fcs,suspend-voltage-selector = <0>;
|
||||
regulator-name = "vdd_cpu_b";
|
||||
regulator-min-microvolt = <712500>;
|
||||
regulator-max-microvolt = <1500000>;
|
||||
regulator-ramp-delay = <1000>;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
vin-supply = <&vcc_sys>;
|
||||
|
||||
regulator-state-mem {
|
||||
regulator-off-in-suspend;
|
||||
};
|
||||
};
|
||||
|
||||
vdd_gpu: regulator@41 {
|
||||
compatible = "silergy,syr828";
|
||||
reg = <0x41>;
|
||||
fcs,suspend-voltage-selector = <1>;
|
||||
regulator-name = "vdd_gpu";
|
||||
regulator-min-microvolt = <712500>;
|
||||
regulator-max-microvolt = <1500000>;
|
||||
regulator-ramp-delay = <1000>;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
vin-supply = <&vcc_sys>;
|
||||
|
||||
regulator-state-mem {
|
||||
regulator-off-in-suspend;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&i2c1 {
|
||||
i2c-scl-rising-time-ns = <300>;
|
||||
i2c-scl-falling-time-ns = <15>;
|
||||
status = "okay";
|
||||
|
||||
rt5640: rt5640@1c {
|
||||
compatible = "realtek,rt5640";
|
||||
reg = <0x1c>;
|
||||
clocks = <&cru SCLK_I2S_8CH_OUT>;
|
||||
clock-names = "mclk";
|
||||
realtek,in1-differential;
|
||||
#sound-dai-cells = <0>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&rt5640_hpcon>;
|
||||
};
|
||||
};
|
||||
|
||||
&i2c3 {
|
||||
i2c-scl-rising-time-ns = <450>;
|
||||
i2c-scl-falling-time-ns = <15>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&i2c4 {
|
||||
i2c-scl-rising-time-ns = <600>;
|
||||
i2c-scl-falling-time-ns = <20>;
|
||||
status = "okay";
|
||||
|
||||
accelerometer@68 {
|
||||
compatible = "invensense,mpu6500";
|
||||
reg = <0x68>;
|
||||
interrupt-parent = <&gpio1>;
|
||||
interrupts = <RK_PC6 IRQ_TYPE_EDGE_RISING>;
|
||||
};
|
||||
};
|
||||
|
||||
&i2s0 {
|
||||
rockchip,playback-channels = <8>;
|
||||
rockchip,capture-channels = <8>;
|
||||
#sound-dai-cells = <0>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&i2s1 {
|
||||
rockchip,playback-channels = <2>;
|
||||
rockchip,capture-channels = <2>;
|
||||
#sound-dai-cells = <0>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&i2s2 {
|
||||
#sound-dai-cells = <0>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&io_domains {
|
||||
status = "okay";
|
||||
|
||||
bt656-supply = <&vcc1v8_dvp>;
|
||||
audio-supply = <&vcca1v8_codec>;
|
||||
sdmmc-supply = <&vcc_sdio>;
|
||||
gpio1830-supply = <&vcc_3v0>;
|
||||
};
|
||||
|
||||
&pcie_phy {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pcie0 {
|
||||
ep-gpios = <&gpio4 RK_PD1 GPIO_ACTIVE_HIGH>;
|
||||
num-lanes = <4>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pcie_clkreqn>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pmu_io_domains {
|
||||
pmu1830-supply = <&vcc_3v0>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pinctrl {
|
||||
buttons {
|
||||
pwrbtn: pwrbtn {
|
||||
rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>;
|
||||
};
|
||||
};
|
||||
|
||||
lcd-panel {
|
||||
lcd_panel_reset: lcd-panel-reset {
|
||||
rockchip,pins = <4 RK_PD6 RK_FUNC_GPIO &pcfg_pull_up>;
|
||||
};
|
||||
};
|
||||
|
||||
pcie {
|
||||
pcie_pwr_en: pcie-pwr-en {
|
||||
rockchip,pins = <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
};
|
||||
|
||||
pcie_3g_drv: pcie-3g-drv {
|
||||
rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>;
|
||||
};
|
||||
};
|
||||
|
||||
pmic {
|
||||
vsel1_gpio: vsel1-gpio {
|
||||
rockchip,pins = <1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_down>;
|
||||
};
|
||||
|
||||
vsel2_gpio: vsel2-gpio {
|
||||
rockchip,pins = <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_down>;
|
||||
};
|
||||
};
|
||||
|
||||
sdio-pwrseq {
|
||||
wifi_enable_h: wifi-enable-h {
|
||||
rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
};
|
||||
};
|
||||
|
||||
rt5640 {
|
||||
rt5640_hpcon: rt5640-hpcon {
|
||||
rockchip,pins = <4 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
};
|
||||
};
|
||||
|
||||
pmic {
|
||||
pmic_int_l: pmic-int-l {
|
||||
rockchip,pins = <1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>;
|
||||
};
|
||||
};
|
||||
|
||||
usb2 {
|
||||
vcc5v0_host_en: vcc5v0-host-en {
|
||||
rockchip,pins = <1 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&pwm0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pwm2 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&saradc {
|
||||
vref-supply = <&vcca1v8_s3>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&sdhci {
|
||||
bus-width = <8>;
|
||||
keep-power-in-suspend;
|
||||
mmc-hs400-1_8v;
|
||||
mmc-hs400-enhanced-strobe;
|
||||
non-removable;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&tsadc {
|
||||
/* tshut mode 0:CRU 1:GPIO */
|
||||
rockchip,hw-tshut-mode = <1>;
|
||||
/* tshut polarity 0:LOW 1:HIGH */
|
||||
rockchip,hw-tshut-polarity = <1>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&u2phy0 {
|
||||
status = "okay";
|
||||
|
||||
u2phy0_otg: otg-port {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
u2phy0_host: host-port {
|
||||
phy-supply = <&vcc5v0_host>;
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
&u2phy1 {
|
||||
status = "okay";
|
||||
|
||||
u2phy1_otg: otg-port {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
u2phy1_host: host-port {
|
||||
phy-supply = <&vcc5v0_host>;
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
&uart0 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart0_xfer &uart0_cts>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&uart2 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb_host0_ehci {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb_host0_ohci {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb_host1_ehci {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb_host1_ohci {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usbdrd3_0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usbdrd_dwc3_0 {
|
||||
status = "okay";
|
||||
dr_mode = "otg";
|
||||
};
|
||||
|
||||
&usbdrd3_1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usbdrd_dwc3_1 {
|
||||
status = "okay";
|
||||
dr_mode = "host";
|
||||
};
|
||||
@ -44,7 +44,7 @@
|
||||
|
||||
#include <dt-bindings/input/input.h>
|
||||
#include "rk3399.dtsi"
|
||||
#include "rk3399-opp.dtsi"
|
||||
#include "rk3399-op1-opp.dtsi"
|
||||
|
||||
/ {
|
||||
chosen {
|
||||
|
||||
145
arch/arm64/boot/dts/rockchip/rk3399-op1-opp.dtsi
Normal file
145
arch/arm64/boot/dts/rockchip/rk3399-op1-opp.dtsi
Normal file
@ -0,0 +1,145 @@
|
||||
/*
|
||||
* Copyright (c) 2016-2017 Fuzhou Rockchip Electronics Co., Ltd
|
||||
*
|
||||
* This file is dual-licensed: you can use it either under the terms
|
||||
* of the GPL or the X11 license, at your option. Note that this dual
|
||||
* licensing only applies to this file, and not this project as a
|
||||
* whole.
|
||||
*
|
||||
* a) This library is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of the
|
||||
* License, or (at your option) any later version.
|
||||
*
|
||||
* This library is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* Or, alternatively,
|
||||
*
|
||||
* b) Permission is hereby granted, free of charge, to any person
|
||||
* obtaining a copy of this software and associated documentation
|
||||
* files (the "Software"), to deal in the Software without
|
||||
* restriction, including without limitation the rights to use,
|
||||
* copy, modify, merge, publish, distribute, sublicense, and/or
|
||||
* sell copies of the Software, and to permit persons to whom the
|
||||
* Software is furnished to do so, subject to the following
|
||||
* conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be
|
||||
* included in all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
|
||||
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
|
||||
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
|
||||
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
|
||||
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
|
||||
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
|
||||
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
|
||||
* OTHER DEALINGS IN THE SOFTWARE.
|
||||
*/
|
||||
|
||||
/ {
|
||||
cluster0_opp: opp-table0 {
|
||||
compatible = "operating-points-v2";
|
||||
opp-shared;
|
||||
|
||||
opp00 {
|
||||
opp-hz = /bits/ 64 <408000000>;
|
||||
opp-microvolt = <800000>;
|
||||
clock-latency-ns = <40000>;
|
||||
};
|
||||
opp01 {
|
||||
opp-hz = /bits/ 64 <600000000>;
|
||||
opp-microvolt = <825000>;
|
||||
};
|
||||
opp02 {
|
||||
opp-hz = /bits/ 64 <816000000>;
|
||||
opp-microvolt = <850000>;
|
||||
};
|
||||
opp03 {
|
||||
opp-hz = /bits/ 64 <1008000000>;
|
||||
opp-microvolt = <900000>;
|
||||
};
|
||||
opp04 {
|
||||
opp-hz = /bits/ 64 <1200000000>;
|
||||
opp-microvolt = <975000>;
|
||||
};
|
||||
opp05 {
|
||||
opp-hz = /bits/ 64 <1416000000>;
|
||||
opp-microvolt = <1100000>;
|
||||
};
|
||||
opp06 {
|
||||
opp-hz = /bits/ 64 <1512000000>;
|
||||
opp-microvolt = <1150000>;
|
||||
};
|
||||
};
|
||||
|
||||
cluster1_opp: opp-table1 {
|
||||
compatible = "operating-points-v2";
|
||||
opp-shared;
|
||||
|
||||
opp00 {
|
||||
opp-hz = /bits/ 64 <408000000>;
|
||||
opp-microvolt = <800000>;
|
||||
clock-latency-ns = <40000>;
|
||||
};
|
||||
opp01 {
|
||||
opp-hz = /bits/ 64 <600000000>;
|
||||
opp-microvolt = <800000>;
|
||||
};
|
||||
opp02 {
|
||||
opp-hz = /bits/ 64 <816000000>;
|
||||
opp-microvolt = <825000>;
|
||||
};
|
||||
opp03 {
|
||||
opp-hz = /bits/ 64 <1008000000>;
|
||||
opp-microvolt = <850000>;
|
||||
};
|
||||
opp04 {
|
||||
opp-hz = /bits/ 64 <1200000000>;
|
||||
opp-microvolt = <900000>;
|
||||
};
|
||||
opp05 {
|
||||
opp-hz = /bits/ 64 <1416000000>;
|
||||
opp-microvolt = <975000>;
|
||||
};
|
||||
opp06 {
|
||||
opp-hz = /bits/ 64 <1608000000>;
|
||||
opp-microvolt = <1050000>;
|
||||
};
|
||||
opp07 {
|
||||
opp-hz = /bits/ 64 <1800000000>;
|
||||
opp-microvolt = <1150000>;
|
||||
};
|
||||
opp08 {
|
||||
opp-hz = /bits/ 64 <2016000000>;
|
||||
opp-microvolt = <1250000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&cpu_l0 {
|
||||
operating-points-v2 = <&cluster0_opp>;
|
||||
};
|
||||
|
||||
&cpu_l1 {
|
||||
operating-points-v2 = <&cluster0_opp>;
|
||||
};
|
||||
|
||||
&cpu_l2 {
|
||||
operating-points-v2 = <&cluster0_opp>;
|
||||
};
|
||||
|
||||
&cpu_l3 {
|
||||
operating-points-v2 = <&cluster0_opp>;
|
||||
};
|
||||
|
||||
&cpu_b0 {
|
||||
operating-points-v2 = <&cluster1_opp>;
|
||||
};
|
||||
|
||||
&cpu_b1 {
|
||||
operating-points-v2 = <&cluster1_opp>;
|
||||
};
|
||||
@ -56,22 +56,18 @@
|
||||
};
|
||||
opp02 {
|
||||
opp-hz = /bits/ 64 <816000000>;
|
||||
opp-microvolt = <800000>;
|
||||
opp-microvolt = <850000>;
|
||||
};
|
||||
opp03 {
|
||||
opp-hz = /bits/ 64 <1008000000>;
|
||||
opp-microvolt = <875000>;
|
||||
opp-microvolt = <925000>;
|
||||
};
|
||||
opp04 {
|
||||
opp-hz = /bits/ 64 <1200000000>;
|
||||
opp-microvolt = <925000>;
|
||||
opp-microvolt = <1000000>;
|
||||
};
|
||||
opp05 {
|
||||
opp-hz = /bits/ 64 <1416000000>;
|
||||
opp-microvolt = <1050000>;
|
||||
};
|
||||
opp06 {
|
||||
opp-hz = /bits/ 64 <1512000000>;
|
||||
opp-microvolt = <1125000>;
|
||||
};
|
||||
};
|
||||
@ -107,15 +103,11 @@
|
||||
};
|
||||
opp06 {
|
||||
opp-hz = /bits/ 64 <1608000000>;
|
||||
opp-microvolt = <1075000>;
|
||||
opp-microvolt = <1100000>;
|
||||
};
|
||||
opp07 {
|
||||
opp-hz = /bits/ 64 <1800000000>;
|
||||
opp-microvolt = <1150000>;
|
||||
};
|
||||
opp08 {
|
||||
opp-hz = /bits/ 64 <2016000000>;
|
||||
opp-microvolt = <1250000>;
|
||||
opp-microvolt = <1200000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
@ -56,6 +56,7 @@
|
||||
#size-cells = <2>;
|
||||
|
||||
aliases {
|
||||
ethernet0 = &gmac;
|
||||
i2c0 = &i2c0;
|
||||
i2c1 = &i2c1;
|
||||
i2c2 = &i2c2;
|
||||
@ -220,7 +221,7 @@
|
||||
#size-cells = <2>;
|
||||
#interrupt-cells = <1>;
|
||||
aspm-no-l0s;
|
||||
bus-range = <0x0 0x1>;
|
||||
bus-range = <0x0 0x1f>;
|
||||
clocks = <&cru ACLK_PCIE>, <&cru ACLK_PERF_PCIE>,
|
||||
<&cru PCLK_PCIE>, <&cru SCLK_PCIE_PM>;
|
||||
clock-names = "aclk", "aclk-perf",
|
||||
@ -239,8 +240,8 @@
|
||||
msi-map = <0x0 &its 0x0 0x1000>;
|
||||
phys = <&pcie_phy>;
|
||||
phy-names = "pcie-phy";
|
||||
ranges = <0x83000000 0x0 0xfa000000 0x0 0xfa000000 0x0 0x600000
|
||||
0x81000000 0x0 0xfa600000 0x0 0xfa600000 0x0 0x100000>;
|
||||
ranges = <0x83000000 0x0 0xfa000000 0x0 0xfa000000 0x0 0x1e00000
|
||||
0x81000000 0x0 0xfbe00000 0x0 0xfbe00000 0x0 0x100000>;
|
||||
resets = <&cru SRST_PCIE_CORE>, <&cru SRST_PCIE_MGMT>,
|
||||
<&cru SRST_PCIE_MGMT_STICKY>, <&cru SRST_PCIE_PIPE>,
|
||||
<&cru SRST_PCIE_PM>, <&cru SRST_P_PCIE>,
|
||||
@ -769,11 +770,6 @@
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
qos_sd: qos@ffa74000 {
|
||||
compatible = "syscon";
|
||||
reg = <0x0 0xffa74000 0x0 0x20>;
|
||||
};
|
||||
|
||||
qos_emmc: qos@ffa58000 {
|
||||
compatible = "syscon";
|
||||
reg = <0x0 0xffa58000 0x0 0x20>;
|
||||
@ -784,6 +780,41 @@
|
||||
reg = <0x0 0xffa5c000 0x0 0x20>;
|
||||
};
|
||||
|
||||
qos_pcie: qos@ffa60080 {
|
||||
compatible = "syscon";
|
||||
reg = <0x0 0xffa60080 0x0 0x20>;
|
||||
};
|
||||
|
||||
qos_usb_host0: qos@ffa60100 {
|
||||
compatible = "syscon";
|
||||
reg = <0x0 0xffa60100 0x0 0x20>;
|
||||
};
|
||||
|
||||
qos_usb_host1: qos@ffa60180 {
|
||||
compatible = "syscon";
|
||||
reg = <0x0 0xffa60180 0x0 0x20>;
|
||||
};
|
||||
|
||||
qos_usb_otg0: qos@ffa70000 {
|
||||
compatible = "syscon";
|
||||
reg = <0x0 0xffa70000 0x0 0x20>;
|
||||
};
|
||||
|
||||
qos_usb_otg1: qos@ffa70080 {
|
||||
compatible = "syscon";
|
||||
reg = <0x0 0xffa70080 0x0 0x20>;
|
||||
};
|
||||
|
||||
qos_sd: qos@ffa74000 {
|
||||
compatible = "syscon";
|
||||
reg = <0x0 0xffa74000 0x0 0x20>;
|
||||
};
|
||||
|
||||
qos_sdioaudio: qos@ffa76000 {
|
||||
compatible = "syscon";
|
||||
reg = <0x0 0xffa76000 0x0 0x20>;
|
||||
};
|
||||
|
||||
qos_hdcp: qos@ffa90000 {
|
||||
compatible = "syscon";
|
||||
reg = <0x0 0xffa90000 0x0 0x20>;
|
||||
@ -854,6 +885,11 @@
|
||||
reg = <0x0 0xffad0000 0x0 0x20>;
|
||||
};
|
||||
|
||||
qos_perihp: qos@ffad8080 {
|
||||
compatible = "syscon";
|
||||
reg = <0x0 0xffad8080 0x0 0x20>;
|
||||
};
|
||||
|
||||
qos_gpu: qos@ffae0000 {
|
||||
compatible = "syscon";
|
||||
reg = <0x0 0xffae0000 0x0 0x20>;
|
||||
@ -1676,6 +1712,91 @@
|
||||
};
|
||||
};
|
||||
|
||||
sdio0 {
|
||||
sdio0_bus1: sdio0-bus1 {
|
||||
rockchip,pins =
|
||||
<2 RK_PC4 RK_FUNC_1 &pcfg_pull_up>;
|
||||
};
|
||||
|
||||
sdio0_bus4: sdio0-bus4 {
|
||||
rockchip,pins =
|
||||
<2 RK_PC4 RK_FUNC_1 &pcfg_pull_up>,
|
||||
<2 RK_PC5 RK_FUNC_1 &pcfg_pull_up>,
|
||||
<2 RK_PC6 RK_FUNC_1 &pcfg_pull_up>,
|
||||
<2 RK_PC7 RK_FUNC_1 &pcfg_pull_up>;
|
||||
};
|
||||
|
||||
sdio0_cmd: sdio0-cmd {
|
||||
rockchip,pins =
|
||||
<2 RK_PD0 RK_FUNC_1 &pcfg_pull_up>;
|
||||
};
|
||||
|
||||
sdio0_clk: sdio0-clk {
|
||||
rockchip,pins =
|
||||
<2 RK_PD1 RK_FUNC_1 &pcfg_pull_none>;
|
||||
};
|
||||
|
||||
sdio0_cd: sdio0-cd {
|
||||
rockchip,pins =
|
||||
<2 RK_PD2 RK_FUNC_1 &pcfg_pull_up>;
|
||||
};
|
||||
|
||||
sdio0_pwr: sdio0-pwr {
|
||||
rockchip,pins =
|
||||
<2 RK_PD3 RK_FUNC_1 &pcfg_pull_up>;
|
||||
};
|
||||
|
||||
sdio0_bkpwr: sdio0-bkpwr {
|
||||
rockchip,pins =
|
||||
<2 RK_PD4 RK_FUNC_1 &pcfg_pull_up>;
|
||||
};
|
||||
|
||||
sdio0_wp: sdio0-wp {
|
||||
rockchip,pins =
|
||||
<0 RK_PA3 RK_FUNC_1 &pcfg_pull_up>;
|
||||
};
|
||||
|
||||
sdio0_int: sdio0-int {
|
||||
rockchip,pins =
|
||||
<0 RK_PA4 RK_FUNC_1 &pcfg_pull_up>;
|
||||
};
|
||||
};
|
||||
|
||||
sdmmc {
|
||||
sdmmc_bus1: sdmmc-bus1 {
|
||||
rockchip,pins =
|
||||
<4 RK_PB0 RK_FUNC_1 &pcfg_pull_up>;
|
||||
};
|
||||
|
||||
sdmmc_bus4: sdmmc-bus4 {
|
||||
rockchip,pins =
|
||||
<4 RK_PB0 RK_FUNC_1 &pcfg_pull_up>,
|
||||
<4 RK_PB1 RK_FUNC_1 &pcfg_pull_up>,
|
||||
<4 RK_PB2 RK_FUNC_1 &pcfg_pull_up>,
|
||||
<4 RK_PB3 RK_FUNC_1 &pcfg_pull_up>;
|
||||
};
|
||||
|
||||
sdmmc_clk: sdmmc-clk {
|
||||
rockchip,pins =
|
||||
<4 RK_PB4 RK_FUNC_1 &pcfg_pull_none>;
|
||||
};
|
||||
|
||||
sdmmc_cmd: sdmmc-cmd {
|
||||
rockchip,pins =
|
||||
<4 RK_PB5 RK_FUNC_1 &pcfg_pull_up>;
|
||||
};
|
||||
|
||||
sdmmc_cd: sdmcc-cd {
|
||||
rockchip,pins =
|
||||
<0 RK_PA7 RK_FUNC_1 &pcfg_pull_up>;
|
||||
};
|
||||
|
||||
sdmmc_wp: sdmmc-wp {
|
||||
rockchip,pins =
|
||||
<0 RK_PB0 RK_FUNC_1 &pcfg_pull_up>;
|
||||
};
|
||||
};
|
||||
|
||||
sleep {
|
||||
ap_pwroff: ap-pwroff {
|
||||
rockchip,pins = <1 5 RK_FUNC_1 &pcfg_pull_none>;
|
||||
@ -1691,6 +1812,11 @@
|
||||
rockchip,pins =
|
||||
<4 21 RK_FUNC_1 &pcfg_pull_none>;
|
||||
};
|
||||
|
||||
spdif_bus_1: spdif-bus-1 {
|
||||
rockchip,pins =
|
||||
<3 RK_PC0 RK_FUNC_3 &pcfg_pull_none>;
|
||||
};
|
||||
};
|
||||
|
||||
spi0 {
|
||||
@ -1950,6 +2076,19 @@
|
||||
};
|
||||
};
|
||||
|
||||
hdmi {
|
||||
hdmi_i2c_xfer: hdmi-i2c-xfer {
|
||||
rockchip,pins =
|
||||
<4 RK_PC1 RK_FUNC_3 &pcfg_pull_none>,
|
||||
<4 RK_PC0 RK_FUNC_3 &pcfg_pull_none>;
|
||||
};
|
||||
|
||||
hdmi_cec: hdmi-cec {
|
||||
rockchip,pins =
|
||||
<4 RK_PC7 RK_FUNC_1 &pcfg_pull_none>;
|
||||
};
|
||||
};
|
||||
|
||||
pcie {
|
||||
pcie_clkreqn: pci-clkreqn {
|
||||
rockchip,pins =
|
||||
@ -1960,6 +2099,16 @@
|
||||
rockchip,pins =
|
||||
<4 24 RK_FUNC_1 &pcfg_pull_none>;
|
||||
};
|
||||
|
||||
pcie_clkreqn_cpm: pci-clkreqn-cpm {
|
||||
rockchip,pins =
|
||||
<2 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
};
|
||||
|
||||
pcie_clkreqnb_cpm: pci-clkreqnb-cpm {
|
||||
rockchip,pins =
|
||||
<4 RK_PD0 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
};
|
||||
};
|
||||
|
||||
};
|
||||
|
||||
Loading…
Reference in New Issue
Block a user