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m68knommu: clean up definitions of ColdFire peripheral base registers
Different ColdFire CPUs have different ways of defining where their internal peripheral registers sit in their address space. Some use an MBAR register, some use and IPSBAR register, some have a fixed mapping. Now that most of the peripheral address definitions have been cleaned up we can clean up the setting of the MBAR and IPSBAR defines to limit them to just where they are needed (and where they actually exist). Signed-off-by: Greg Ungerer <gerg@uclinux.org>
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@ -27,15 +27,20 @@
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#endif
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/*
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* Define the processor support peripherals base address.
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* Define the processor internal peripherals base address.
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*
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* The majority of ColdFire parts use an MBAR register to set
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* the base address. Some have an IPSBAR register instead, and it
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* has slightly different rules on its size and alignment. Some
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* parts have fixed addresses and the internal peripherals cannot
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* be relocated in the address space.
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*
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* This is generally setup by the boards start up code.
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*/
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#define MCF_MBAR 0x10000000
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#define MCF_IPSBAR 0x40000000
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#if defined(CONFIG_M523x) || defined(CONFIG_M527x) || defined(CONFIG_M528x)
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#undef MCF_MBAR
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#define MCF_MBAR MCF_IPSBAR
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#define MCF_IPSBAR 0x40000000
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#else
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#define MCF_MBAR 0x10000000
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#endif
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/****************************************************************************/
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