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m68knommu: clean up definitions of ColdFire peripheral base registers

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Different ColdFire CPUs have different ways of defining where their
internal peripheral registers sit in their address space. Some use an
MBAR register, some use and IPSBAR register, some have a fixed mapping.

Now that most of the peripheral address definitions have been cleaned up
we can clean up the setting of the MBAR and IPSBAR defines to limit them
to just where they are needed (and where they actually exist).

Signed-off-by: Greg Ungerer <gerg@uclinux.org>
This commit is contained in:
Greg Ungerer 2011-03-06 01:01:31 +10:00
parent 6a92e1982d
commit b195c47924
1 changed files with 11 additions and 6 deletions
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17
arch/m68k/include/asm/coldfire.h
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@ -27,15 +27,20 @@
#endif
/*
* Define the processor support peripherals base address.
* Define the processor internal peripherals base address.
*
* The majority of ColdFire parts use an MBAR register to set
* the base address. Some have an IPSBAR register instead, and it
* has slightly different rules on its size and alignment. Some
* parts have fixed addresses and the internal peripherals cannot
* be relocated in the address space.
*
* This is generally setup by the boards start up code.
*/
#define MCF_MBAR 0x10000000
#define MCF_IPSBAR 0x40000000
#if defined(CONFIG_M523x) || defined(CONFIG_M527x) || defined(CONFIG_M528x)
#undef MCF_MBAR
#define MCF_MBAR MCF_IPSBAR
#define MCF_IPSBAR 0x40000000
#else
#define MCF_MBAR 0x10000000
#endif
/****************************************************************************/