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mfd: syscon: atmel-smc: Add helper to retrieve register layout
For HSMC controller, the register layout depends on the device i.e. the
offset of setup, pulse, cycle, mode and timings registers is not the
same. An helper is added to provide the correct register layout.
Fixes: fe9d7cb22e
("mfd: syscon: atmel-smc: Add new helpers to ease
SMC regs manipulation")
Suggested-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: Ludovic Desroches <ludovic.desroches@microchip.com>
Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Acked-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
This commit is contained in:
parent
f446363374
commit
b0f3ab20e7
@ -51,6 +51,7 @@ struct atmel_ebi {
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struct {
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struct regmap *regmap;
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struct clk *clk;
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const struct atmel_hsmc_reg_layout *layout;
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} smc;
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struct device *dev;
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@ -84,8 +85,8 @@ static void at91sam9_ebi_get_config(struct atmel_ebi_dev *ebid,
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static void sama5_ebi_get_config(struct atmel_ebi_dev *ebid,
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struct atmel_ebi_dev_config *conf)
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{
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atmel_hsmc_cs_conf_get(ebid->ebi->smc.regmap, conf->cs,
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&conf->smcconf);
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atmel_hsmc_cs_conf_get(ebid->ebi->smc.regmap, ebid->ebi->smc.layout,
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conf->cs, &conf->smcconf);
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}
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static const struct atmel_smc_timing_xlate timings_xlate_table[] = {
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@ -287,8 +288,8 @@ static void at91sam9_ebi_apply_config(struct atmel_ebi_dev *ebid,
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static void sama5_ebi_apply_config(struct atmel_ebi_dev *ebid,
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struct atmel_ebi_dev_config *conf)
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{
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atmel_hsmc_cs_conf_apply(ebid->ebi->smc.regmap, conf->cs,
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&conf->smcconf);
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atmel_hsmc_cs_conf_apply(ebid->ebi->smc.regmap, ebid->ebi->smc.layout,
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conf->cs, &conf->smcconf);
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}
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static int atmel_ebi_dev_setup(struct atmel_ebi *ebi, struct device_node *np,
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@ -527,6 +528,10 @@ static int atmel_ebi_probe(struct platform_device *pdev)
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if (IS_ERR(ebi->smc.regmap))
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return PTR_ERR(ebi->smc.regmap);
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ebi->smc.layout = atmel_hsmc_get_reg_layout(smc_np);
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if (IS_ERR(ebi->smc.layout))
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return PTR_ERR(ebi->smc.layout);
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ebi->smc.clk = of_clk_get(smc_np, 0);
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if (IS_ERR(ebi->smc.clk)) {
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if (PTR_ERR(ebi->smc.clk) != -ENOENT)
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@ -258,19 +258,21 @@ EXPORT_SYMBOL_GPL(atmel_smc_cs_conf_apply);
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* atmel_hsmc_cs_conf_apply - apply an SMC CS conf
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* @regmap: the HSMC regmap
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* @cs: the CS id
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* @layout: the layout of registers
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* @conf the SMC CS conf to apply
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*
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* Applies an SMC CS configuration.
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* Only valid on post-sama5 SoCs.
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*/
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void atmel_hsmc_cs_conf_apply(struct regmap *regmap, int cs,
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const struct atmel_smc_cs_conf *conf)
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void atmel_hsmc_cs_conf_apply(struct regmap *regmap,
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const struct atmel_hsmc_reg_layout *layout,
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int cs, const struct atmel_smc_cs_conf *conf)
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{
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regmap_write(regmap, ATMEL_HSMC_SETUP(cs), conf->setup);
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regmap_write(regmap, ATMEL_HSMC_PULSE(cs), conf->pulse);
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regmap_write(regmap, ATMEL_HSMC_CYCLE(cs), conf->cycle);
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regmap_write(regmap, ATMEL_HSMC_TIMINGS(cs), conf->timings);
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regmap_write(regmap, ATMEL_HSMC_MODE(cs), conf->mode);
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regmap_write(regmap, ATMEL_HSMC_SETUP(layout, cs), conf->setup);
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regmap_write(regmap, ATMEL_HSMC_PULSE(layout, cs), conf->pulse);
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regmap_write(regmap, ATMEL_HSMC_CYCLE(layout, cs), conf->cycle);
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regmap_write(regmap, ATMEL_HSMC_TIMINGS(layout, cs), conf->timings);
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regmap_write(regmap, ATMEL_HSMC_MODE(layout, cs), conf->mode);
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}
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EXPORT_SYMBOL_GPL(atmel_hsmc_cs_conf_apply);
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@ -297,18 +299,55 @@ EXPORT_SYMBOL_GPL(atmel_smc_cs_conf_get);
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* atmel_hsmc_cs_conf_get - retrieve the current SMC CS conf
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* @regmap: the HSMC regmap
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* @cs: the CS id
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* @layout: the layout of registers
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* @conf: the SMC CS conf object to store the current conf
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*
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* Retrieve the SMC CS configuration.
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* Only valid on post-sama5 SoCs.
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*/
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void atmel_hsmc_cs_conf_get(struct regmap *regmap, int cs,
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struct atmel_smc_cs_conf *conf)
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void atmel_hsmc_cs_conf_get(struct regmap *regmap,
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const struct atmel_hsmc_reg_layout *layout,
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int cs, struct atmel_smc_cs_conf *conf)
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{
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regmap_read(regmap, ATMEL_HSMC_SETUP(cs), &conf->setup);
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regmap_read(regmap, ATMEL_HSMC_PULSE(cs), &conf->pulse);
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regmap_read(regmap, ATMEL_HSMC_CYCLE(cs), &conf->cycle);
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regmap_read(regmap, ATMEL_HSMC_TIMINGS(cs), &conf->timings);
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regmap_read(regmap, ATMEL_HSMC_MODE(cs), &conf->mode);
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regmap_read(regmap, ATMEL_HSMC_SETUP(layout, cs), &conf->setup);
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regmap_read(regmap, ATMEL_HSMC_PULSE(layout, cs), &conf->pulse);
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regmap_read(regmap, ATMEL_HSMC_CYCLE(layout, cs), &conf->cycle);
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regmap_read(regmap, ATMEL_HSMC_TIMINGS(layout, cs), &conf->timings);
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regmap_read(regmap, ATMEL_HSMC_MODE(layout, cs), &conf->mode);
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}
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EXPORT_SYMBOL_GPL(atmel_hsmc_cs_conf_get);
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static const struct atmel_hsmc_reg_layout sama5d3_reg_layout = {
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.timing_regs_offset = 0x600,
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};
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static const struct atmel_hsmc_reg_layout sama5d2_reg_layout = {
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.timing_regs_offset = 0x700,
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};
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static const struct of_device_id atmel_smc_ids[] = {
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{ .compatible = "atmel,at91sam9260-smc", .data = NULL },
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{ .compatible = "atmel,sama5d3-smc", .data = &sama5d3_reg_layout },
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{ .compatible = "atmel,sama5d2-smc", .data = &sama5d2_reg_layout },
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{ /* sentinel */ },
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};
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/**
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* atmel_hsmc_get_reg_layout - retrieve the layout of HSMC registers
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* @np: the HSMC regmap
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*
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* Retrieve the layout of HSMC registers.
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*
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* Returns NULL in case of SMC, a struct atmel_hsmc_reg_layout pointer
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* in HSMC case, otherwise ERR_PTR(-EINVAL).
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*/
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const struct atmel_hsmc_reg_layout *
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atmel_hsmc_get_reg_layout(struct device_node *np)
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{
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const struct of_device_id *match;
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match = of_match_node(atmel_smc_ids, np);
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return match ? match->data : ERR_PTR(-EINVAL);
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}
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EXPORT_SYMBOL_GPL(atmel_hsmc_get_reg_layout);
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@ -247,6 +247,7 @@ struct atmel_hsmc_nand_controller {
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void __iomem *virt;
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dma_addr_t dma;
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} sram;
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const struct atmel_hsmc_reg_layout *hsmc_layout;
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struct regmap *io;
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struct atmel_nfc_op op;
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struct completion complete;
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@ -1442,12 +1443,12 @@ static int atmel_hsmc_nand_setup_data_interface(struct atmel_nand *nand,
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int csline,
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const struct nand_data_interface *conf)
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{
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struct atmel_nand_controller *nc;
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struct atmel_hsmc_nand_controller *nc;
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struct atmel_smc_cs_conf smcconf;
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struct atmel_nand_cs *cs;
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int ret;
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nc = to_nand_controller(nand->base.controller);
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nc = to_hsmc_nand_controller(nand->base.controller);
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ret = atmel_smc_nand_prepare_smcconf(nand, conf, &smcconf);
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if (ret)
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@ -1462,7 +1463,8 @@ static int atmel_hsmc_nand_setup_data_interface(struct atmel_nand *nand,
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if (cs->rb.type == ATMEL_NAND_NATIVE_RB)
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cs->smcconf.timings |= ATMEL_HSMC_TIMINGS_RBNSEL(cs->rb.id);
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atmel_hsmc_cs_conf_apply(nc->smc, cs->id, &cs->smcconf);
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atmel_hsmc_cs_conf_apply(nc->base.smc, nc->hsmc_layout, cs->id,
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&cs->smcconf);
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return 0;
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}
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@ -2177,6 +2179,8 @@ atmel_hsmc_nand_controller_init(struct atmel_hsmc_nand_controller *nc)
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return -EINVAL;
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}
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nc->hsmc_layout = atmel_hsmc_get_reg_layout(np);
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nc->irq = of_irq_get(np, 0);
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of_node_put(np);
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if (nc->irq < 0) {
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@ -15,21 +15,26 @@
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#define _LINUX_MFD_SYSCON_ATMEL_SMC_H_
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#include <linux/kernel.h>
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#include <linux/of.h>
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#include <linux/regmap.h>
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#define ATMEL_SMC_SETUP(cs) (((cs) * 0x10))
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#define ATMEL_HSMC_SETUP(cs) (0x600 + ((cs) * 0x14))
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#define ATMEL_HSMC_SETUP(layout, cs) \
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((layout)->timing_regs_offset + ((cs) * 0x14))
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#define ATMEL_SMC_PULSE(cs) (((cs) * 0x10) + 0x4)
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#define ATMEL_HSMC_PULSE(cs) (0x600 + ((cs) * 0x14) + 0x4)
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#define ATMEL_HSMC_PULSE(layout, cs) \
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((layout)->timing_regs_offset + ((cs) * 0x14) + 0x4)
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#define ATMEL_SMC_CYCLE(cs) (((cs) * 0x10) + 0x8)
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#define ATMEL_HSMC_CYCLE(cs) (0x600 + ((cs) * 0x14) + 0x8)
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#define ATMEL_HSMC_CYCLE(layout, cs) \
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((layout)->timing_regs_offset + ((cs) * 0x14) + 0x8)
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#define ATMEL_SMC_NWE_SHIFT 0
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#define ATMEL_SMC_NCS_WR_SHIFT 8
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#define ATMEL_SMC_NRD_SHIFT 16
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#define ATMEL_SMC_NCS_RD_SHIFT 24
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#define ATMEL_SMC_MODE(cs) (((cs) * 0x10) + 0xc)
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#define ATMEL_HSMC_MODE(cs) (0x600 + ((cs) * 0x14) + 0x10)
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#define ATMEL_HSMC_MODE(layout, cs) \
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((layout)->timing_regs_offset + ((cs) * 0x14) + 0x10)
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#define ATMEL_SMC_MODE_READMODE_MASK BIT(0)
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#define ATMEL_SMC_MODE_READMODE_NCS (0 << 0)
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#define ATMEL_SMC_MODE_READMODE_NRD (1 << 0)
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@ -59,7 +64,8 @@
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#define ATMEL_SMC_MODE_PS_16 (2 << 28)
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#define ATMEL_SMC_MODE_PS_32 (3 << 28)
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#define ATMEL_HSMC_TIMINGS(cs) (0x600 + ((cs) * 0x14) + 0xc)
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#define ATMEL_HSMC_TIMINGS(layout, cs) \
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((layout)->timing_regs_offset + ((cs) * 0x14) + 0xc)
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#define ATMEL_HSMC_TIMINGS_OCMS BIT(12)
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#define ATMEL_HSMC_TIMINGS_RBNSEL(x) ((x) << 28)
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#define ATMEL_HSMC_TIMINGS_NFSEL BIT(31)
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@ -69,6 +75,10 @@
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#define ATMEL_HSMC_TIMINGS_TRR_SHIFT 16
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#define ATMEL_HSMC_TIMINGS_TWB_SHIFT 24
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struct atmel_hsmc_reg_layout {
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unsigned int timing_regs_offset;
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};
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/**
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* struct atmel_smc_cs_conf - SMC CS config as described in the datasheet.
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* @setup: NCS/NWE/NRD setup timings (not applicable to at91rm9200)
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@ -98,11 +108,15 @@ int atmel_smc_cs_conf_set_cycle(struct atmel_smc_cs_conf *conf,
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unsigned int shift, unsigned int ncycles);
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void atmel_smc_cs_conf_apply(struct regmap *regmap, int cs,
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const struct atmel_smc_cs_conf *conf);
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void atmel_hsmc_cs_conf_apply(struct regmap *regmap, int cs,
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const struct atmel_smc_cs_conf *conf);
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void atmel_hsmc_cs_conf_apply(struct regmap *regmap,
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const struct atmel_hsmc_reg_layout *reglayout,
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int cs, const struct atmel_smc_cs_conf *conf);
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void atmel_smc_cs_conf_get(struct regmap *regmap, int cs,
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struct atmel_smc_cs_conf *conf);
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void atmel_hsmc_cs_conf_get(struct regmap *regmap, int cs,
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struct atmel_smc_cs_conf *conf);
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void atmel_hsmc_cs_conf_get(struct regmap *regmap,
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const struct atmel_hsmc_reg_layout *reglayout,
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int cs, struct atmel_smc_cs_conf *conf);
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const struct atmel_hsmc_reg_layout *
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atmel_hsmc_get_reg_layout(struct device_node *np);
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#endif /* _LINUX_MFD_SYSCON_ATMEL_SMC_H_ */
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