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net: ena: cosmetic: minor code changes
1. Use BIT macro instead of shift operator for code clarity 2. Replace multiple flag assignments to a single assignment of multiple flags in ena_com_add_single_rx_desc() 3. Move ENA_HASH_KEY_SIZE from ena_netdev.h to ena_com.h Signed-off-by: Arthur Kiyanovski <akiyano@amazon.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -2285,7 +2285,7 @@ int ena_com_fill_hash_function(struct ena_com_dev *ena_dev,
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if (unlikely(rc))
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return rc;
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if (!((1 << func) & get_resp.u.flow_hash_func.supported_func)) {
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if (!(BIT(func) & get_resp.u.flow_hash_func.supported_func)) {
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pr_err("Flow hash function %d isn't supported\n", func);
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return -EOPNOTSUPP;
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}
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@ -77,6 +77,8 @@
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#define ENA_INTR_INITIAL_RX_INTERVAL_USECS 0
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#define ENA_DEFAULT_INTR_DELAY_RESOLUTION 1
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#define ENA_HASH_KEY_SIZE 40
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#define ENA_HW_HINTS_NO_TIMEOUT 0xFFFF
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#define ENA_FEATURE_MAX_QUEUE_EXT_VER 1
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@ -584,10 +584,10 @@ int ena_com_add_single_rx_desc(struct ena_com_io_sq *io_sq,
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desc->length = ena_buf->len;
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desc->ctrl = ENA_ETH_IO_RX_DESC_FIRST_MASK;
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desc->ctrl |= ENA_ETH_IO_RX_DESC_LAST_MASK;
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desc->ctrl |= io_sq->phase & ENA_ETH_IO_RX_DESC_PHASE_MASK;
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desc->ctrl |= ENA_ETH_IO_RX_DESC_COMP_REQ_MASK;
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desc->ctrl = ENA_ETH_IO_RX_DESC_FIRST_MASK |
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ENA_ETH_IO_RX_DESC_LAST_MASK |
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(io_sq->phase & ENA_ETH_IO_RX_DESC_PHASE_MASK) |
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ENA_ETH_IO_RX_DESC_COMP_REQ_MASK;
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desc->req_id = req_id;
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@ -98,8 +98,6 @@
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#define ENA_RX_RSS_TABLE_LOG_SIZE 7
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#define ENA_RX_RSS_TABLE_SIZE (1 << ENA_RX_RSS_TABLE_LOG_SIZE)
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#define ENA_HASH_KEY_SIZE 40
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/* The number of tx packet completions that will be handled each NAPI poll
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* cycle is ring_size / ENA_TX_POLL_BUDGET_DIVIDER.
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*/
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