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Merge branch 'for-rmk' of git://git.kernel.org/pub/scm/linux/kernel/git/ycmiao/pxa-linux-2.6

Browse Source 
Conflicts:

	arch/arm/mach-pxa/generic.c
	arch/arm/mach-pxa/pxa25x.c
	arch/arm/mach-pxa/pxa27x.c
	arch/arm/mach-pxa/pxa2xx.c
	arch/arm/mach-pxa/pxa3xx.c
	arch/arm/mach-pxa/reset.c
	arch/arm/mach-pxa/spitz.c
	arch/arm/mach-pxa/tosa.c
	drivers/watchdog/sa1100_wdt.c
This commit is contained in:
Russell King 2008-08-07 11:05:25 +01:00 committed by Russell King
commit afd2fc02ab
14 changed files with 94 additions and 9 deletions
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10
arch/arm/mach-pxa/generic.c
View File

@ -26,9 +26,19 @@
#include <asm/mach/map.h>
#include <mach/pxa-regs.h>
#include <mach/reset.h>
#include "generic.h"
void clear_reset_status(unsigned int mask)
{
if (cpu_is_pxa2xx())
pxa2xx_clear_reset_status(mask);
if (cpu_is_pxa3xx())
pxa3xx_clear_reset_status(mask);
}
/*
* Get the clock frequency as reflected by CCCR and the turbo flag.
* We assume these values have been applied via a fcs.

8
arch/arm/mach-pxa/generic.h
View File

@ -47,12 +47,20 @@ extern unsigned pxa27x_get_memclk_frequency_10khz(void);
#define pxa27x_get_memclk_frequency_10khz() (0)
#endif
#if defined(CONFIG_PXA25x) || defined(CONFIG_PXA27x)
extern void pxa2xx_clear_reset_status(unsigned int);
#else
static inline void pxa2xx_clear_reset_status(unsigned int mask) {}
#endif
#ifdef CONFIG_PXA3xx
extern unsigned pxa3xx_get_clk_frequency_khz(int);
extern unsigned pxa3xx_get_memclk_frequency_10khz(void);
extern void pxa3xx_clear_reset_status(unsigned int);
#else
#define pxa3xx_get_clk_frequency_khz(x) (0)
#define pxa3xx_get_memclk_frequency_10khz() (0)
static inline void pxa3xx_clear_reset_status(unsigned int mask) {}
#endif
extern struct sysdev_class pxa_irq_sysclass;

5
arch/arm/mach-pxa/include/mach/hardware.h
View File

@ -224,11 +224,6 @@ extern void pxa_gpio_set_value(unsigned gpio, int value);
*/
extern unsigned int get_memclk_frequency_10khz(void);
/*
* register GPIO as reset generator
*/
extern int init_gpio_reset(int gpio);
#endif
#if defined(CONFIG_MACH_ARMCORE) && defined(CONFIG_PCI)

18
arch/arm/mach-pxa/include/mach/reset.h Normal file
View File

@ -0,0 +1,18 @@
#ifndef __ASM_ARCH_RESET_H
#define __ASM_ARCH_RESET_H
#define RESET_STATUS_HARDWARE (1 << 0) /* Hardware Reset */
#define RESET_STATUS_WATCHDOG (1 << 1) /* Watchdog Reset */
#define RESET_STATUS_LOWPOWER (1 << 2) /* Low Power/Sleep Exit */
#define RESET_STATUS_GPIO (1 << 3) /* GPIO Reset */
#define RESET_STATUS_ALL (0xf)
extern unsigned int reset_status;
extern void clear_reset_status(unsigned int mask);
/*
* register GPIO as reset generator
*/
extern int init_gpio_reset(int gpio);
#endif /* __ASM_ARCH_RESET_H */

4
arch/arm/mach-pxa/pxa25x.c
View File

@ -28,6 +28,7 @@
#include <mach/pxa-regs.h>
#include <mach/pxa2xx-regs.h>
#include <mach/mfp-pxa25x.h>
#include <mach/reset.h>
#include <mach/pm.h>
#include <mach/dma.h>
@ -348,6 +349,9 @@ static int __init pxa25x_init(void)
clks_register(&pxa25x_hwuart_clk, 1);
if (cpu_is_pxa21x() || cpu_is_pxa25x()) {
reset_status = RCSR;
clks_register(pxa25x_clks, ARRAY_SIZE(pxa25x_clks));
if ((ret = pxa_init_dma(16)))

4
arch/arm/mach-pxa/pxa27x.c
View File

@ -24,6 +24,7 @@
#include <mach/pxa-regs.h>
#include <mach/pxa2xx-regs.h>
#include <mach/mfp-pxa27x.h>
#include <mach/reset.h>
#include <mach/ohci.h>
#include <mach/pm.h>
#include <mach/dma.h>
@ -384,6 +385,9 @@ static int __init pxa27x_init(void)
int i, ret = 0;
if (cpu_is_pxa27x()) {
reset_status = RCSR;
clks_register(pxa27x_clks, ARRAY_SIZE(pxa27x_clks));
if ((ret = pxa_init_dma(32)))

9
arch/arm/mach-pxa/pxa2xx.c
View File

@ -14,10 +14,19 @@
#include <linux/kernel.h>
#include <linux/device.h>
#include <mach/hardware.h>
#include <mach/pxa2xx-regs.h>
#include <mach/mfp-pxa2xx.h>
#include <mach/mfp-pxa25x.h>
#include <mach/reset.h>
#include <mach/irda.h>
void pxa2xx_clear_reset_status(unsigned int mask)
{
/* RESET_STATUS_* has a 1:1 mapping with RCSR */
RCSR = mask;
}
static unsigned long pxa2xx_mfp_fir[] = {
GPIO46_FICP_RXD,
GPIO47_FICP_TXD,

10
arch/arm/mach-pxa/pxa3xx.c
View File

@ -24,6 +24,7 @@
#include <mach/hardware.h>
#include <mach/pxa3xx-regs.h>
#include <mach/reset.h>
#include <mach/ohci.h>
#include <mach/pm.h>
#include <mach/dma.h>
@ -109,6 +110,12 @@ unsigned int pxa3xx_get_memclk_frequency_10khz(void)
return (clk / 10000);
}
void pxa3xx_clear_reset_status(unsigned int mask)
{
/* RESET_STATUS_* has a 1:1 mapping with ARSR */
ARSR = mask;
}
/*
* Return the current AC97 clock frequency.
*/
@ -532,6 +539,9 @@ static int __init pxa3xx_init(void)
int i, ret = 0;
if (cpu_is_pxa3xx()) {
reset_status = ARSR;
/*
* clear RDH bit every time after reset
*

8
arch/arm/mach-pxa/reset.c
View File

@ -11,7 +11,10 @@
#include <asm/proc-fns.h>
#include <mach/pxa-regs.h>
#include <mach/pxa2xx-regs.h>
#include <mach/reset.h>
unsigned int reset_status;
EXPORT_SYMBOL(reset_status);
static void do_hw_reset(void);
@ -77,8 +80,7 @@ static void do_hw_reset(void)
void arch_reset(char mode)
{
if (cpu_is_pxa2xx())
RCSR = RCSR_HWR | RCSR_WDR | RCSR_SMR | RCSR_GPR;
clear_reset_status(RESET_STATUS_ALL);
switch (mode) {
case 's':

1
arch/arm/mach-pxa/spitz.c
View File

@ -39,6 +39,7 @@
#include <mach/pxa2xx-regs.h>
#include <mach/pxa2xx-gpio.h>
#include <mach/pxa27x-udc.h>
#include <mach/reset.h>
#include <mach/irda.h>
#include <mach/mmc.h>
#include <mach/ohci.h>

1
arch/arm/mach-pxa/tosa.c
View File

@ -36,6 +36,7 @@
#include <asm/mach-types.h>
#include <mach/pxa2xx-regs.h>
#include <mach/mfp-pxa25x.h>
#include <mach/reset.h>
#include <mach/irda.h>
#include <mach/i2c.h>
#include <mach/mmc.h>

3
arch/arm/mach-sa1100/generic.c
View File

@ -31,6 +31,9 @@
#include "generic.h"
unsigned int reset_status;
EXPORT_SYMBOL(reset_status);
#define NR_FREQS 16
/*

18
arch/arm/mach-sa1100/include/mach/reset.h Normal file
View File

@ -0,0 +1,18 @@
#ifndef __ASM_ARCH_RESET_H
#define __ASM_ARCH_RESET_H
#include "hardware.h"
#define RESET_STATUS_HARDWARE (1 << 0) /* Hardware Reset */
#define RESET_STATUS_WATCHDOG (1 << 1) /* Watchdog Reset */
#define RESET_STATUS_LOWPOWER (1 << 2) /* Exit from Low Power/Sleep */
#define RESET_STATUS_GPIO (1 << 3) /* GPIO Reset */
#define RESET_STATUS_ALL (0xf)
extern unsigned int reset_status;
static inline void clear_reset_status(unsigned int mask)
{
RCSR = mask;
}
#endif /* __ASM_ARCH_RESET_H */

4
drivers/watchdog/sa1100_wdt.c
View File

@ -31,6 +31,7 @@
#include <mach/pxa-regs.h>
#endif
#include <mach/reset.h>
#include <mach/hardware.h>
#include <asm/uaccess.h>
@ -162,7 +163,8 @@ static int __init sa1100dog_init(void)
* we suspend, RCSR will be cleared, and the watchdog
* reset reason will be lost.
*/
boot_status = (RCSR & RCSR_WDR) ? WDIOF_CARDRESET : 0;
boot_status = (reset_status & RESET_STATUS_WATCHDOG) ?
WDIOF_CARDRESET : 0;
pre_margin = OSCR_FREQ * margin;
ret = misc_register(&sa1100dog_miscdev);