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mmc: sunxi: Enable eMMC HS-DDR (MMC_CAP_1_8V_DDR) support

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Now that clock delay settings for 8 bit DDR are correct, and vqmmc
support is available, we can enable MMC_CAP_1_8V_DDR support. This
enables MMC HS-DDR at up to 52 MHz, even if signal voltage switching
is not available.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
This commit is contained in:
Chen-Yu Tsai 2016-01-30 01:21:48 +08:00 committed by Ulf Hansson
parent 2a7aa63a27
commit aed26fcafe
1 changed files with 1 additions and 0 deletions
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drivers/mmc/host/sunxi-mmc.c
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@ -1131,6 +1131,7 @@ static int sunxi_mmc_probe(struct platform_device *pdev)
mmc->f_min = 400000;
mmc->f_max = 52000000;
mmc->caps |= MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED |
MMC_CAP_1_8V_DDR |
MMC_CAP_ERASE | MMC_CAP_SDIO_IRQ;
ret = mmc_of_parse(mmc);