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tools/power turbostat: Print the C-state Pre-wake settings
C-state pre-wake setting[1] is an optimization for some Intel CPUs to be woken up from deep C-states in order to reduce latency. According to the spec, the BIT30 is the C-state Pre-wake Disable. Expose this setting accordingly. Sample output from turbostat: ... cpu51: MSR_IA32_POWER_CTL: 0x1a00a40059 (C1E auto-promotion: DISabled) C-state Pre-wake: ENabled cpu51: MSR_TURBO_RATIO_LIMIT: 0x2021212121212224 ... [1] https://intel.github.io/wult/#c-state-pre-wake Signed-off-by: Chen Yu <yu.c.chen@intel.com> Signed-off-by: Len Brown <len.brown@intel.com>
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@ -91,6 +91,7 @@ double rapl_dram_energy_units, rapl_energy_units;
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double rapl_joule_counter_range;
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unsigned int do_core_perf_limit_reasons;
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unsigned int has_automatic_cstate_conversion;
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unsigned int dis_cstate_prewake;
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unsigned int do_gfx_perf_limit_reasons;
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unsigned int do_ring_perf_limit_reasons;
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unsigned int crystal_hz;
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@ -2271,6 +2272,8 @@ calculate_tsc_tweak()
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tsc_tweak = base_hz / tsc_hz;
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}
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void prewake_cstate_probe(unsigned int family, unsigned int model);
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static void
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dump_nhm_platform_info(void)
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{
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@ -2293,6 +2296,11 @@ dump_nhm_platform_info(void)
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fprintf(outf, "cpu%d: MSR_IA32_POWER_CTL: 0x%08llx (C1E auto-promotion: %sabled)\n",
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base_cpu, msr, msr & 0x2 ? "EN" : "DIS");
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/* C-state Pre-wake Disable (CSTATE_PREWAKE_DISABLE) */
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if (dis_cstate_prewake)
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fprintf(outf, "C-state Pre-wake: %sabled\n",
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msr & 0x40000000 ? "DIS" : "EN");
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return;
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}
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@ -4546,6 +4554,12 @@ void automatic_cstate_conversion_probe(unsigned int family, unsigned int model)
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has_automatic_cstate_conversion = 1;
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}
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void prewake_cstate_probe(unsigned int family, unsigned int model)
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{
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if (is_icx(family, model))
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dis_cstate_prewake = 1;
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}
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int print_thermal(struct thread_data *t, struct core_data *c, struct pkg_data *p)
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{
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unsigned long long msr;
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