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Allwinner arm64 DT changes for 4.15
Most notable changes: - SPI and DMA support on the a64 - New boards: NanoPi NEO Plus2 -----BEGIN PGP SIGNATURE----- iQIcBAABAgAGBQJZ6a4VAAoJEBx+YmzsjxAgnL0P/1KkOUnEuo0sW56x9S5BTLob tc8HjJtismgCAISKIQmtFSrPQ4LhP2QRSce7a1sqOAp5TXOzKazXo8UJ4Peg7zkQ 91aqwOn0Bv3azelzzSnTnfLxJBSOuBBu+DfmoEp7nJsnFcon7xzDeRPSVE+r4bDH nAygZJq+d9rJogsWA9x20GR+3HsGShPo2GHXWDDP23eCDSA7EzguaJJq2bp58kQV lp/naY6BUCQ6svXdM1yoVtx6YbHMMzuV+ltZ8ZnryGtT3Dqm2y+tYGuQ2iBHhCz6 IWC9pyaVd62exoOr827M+qErJoszPgO9yxjSgQkrpZzzuIo2zsQNWfNIjkuJ2F18 jVKzCyuYQhLUVnIBpDAcRa33k37SvXJdyZgRdiAin/wGixrRw0LivX3qcpfe1EZB MgSsiAa7c82/Fy1gzj+49zcfPkk7cqpQnTK3dDSMRyOsZuN34meiaYvT7tmI44/q EQOJvat49Bm/54ueqBHET0dMCY447TDudG9zJinvEGkbCQzTxx1dMk4EP68qnOZF /57meyzaNs5Xo9KM/KpSXYC+Z0SKWQBDNVN3rtNLzDg+lQi5GCKVmXss2r5xabYN m/dMrZeJskVi+/2IIkNgUop7UgCvNDMq+PtEQMEh7c2ezO4eQWKkz/t2Y6MguK0Y NbBLy+4tfmML2mLHyqBB =OAav -----END PGP SIGNATURE----- Merge tag 'sunxi-dt64-for-4.15' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into next/dt Pull "Allwinner arm64 DT changes for 4.15" from Maxime Ripard: Most notable changes: - SPI and DMA support on the a64 - New boards: NanoPi NEO Plus2 * tag 'sunxi-dt64-for-4.15' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux: arm: allwinner: Correct unit name in devicetree binding example arm64: allwinner: a64: add dma controller references to spi nodes arm64: allwinner: a64: Add device node for DMA controller arm64: allwinner: a64: Fix node with unit name and no reg property arm64: allwinner: a64: Fix simple-bus unit address format error arm64: allwinner: h5: add NanoPi NEO Plus2 DT support arm64: allwinner: a64: add SPI nodes
This commit is contained in:
commit
add5c42e99
@ -18,7 +18,7 @@ Required properties:
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- #dma-cells : Should be 1, a single cell holding a line request number
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Example:
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dma: dma-controller@01c02000 {
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dma: dma-controller@1c02000 {
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compatible = "allwinner,sun6i-a31-dma";
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reg = <0x01c02000 0x1000>;
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interrupts = <0 50 4>;
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@ -8,6 +8,7 @@ dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-orangepi-pc2.dtb
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dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-orangepi-prime.dtb
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dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-orangepi-zero-plus2.dtb
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dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-nanopi-neo2.dtb
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dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-nanopi-neo-plus2.dtb
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always := $(dtb-y)
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subdir-y := $(dts-dirs)
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@ -136,6 +136,17 @@
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reg = <0x01c00000 0x1000>;
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};
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dma: dma-controller@1c02000 {
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compatible = "allwinner,sun50i-a64-dma";
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reg = <0x01c02000 0x1000>;
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interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&ccu CLK_BUS_DMA>;
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dma-channels = <8>;
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dma-requests = <27>;
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resets = <&ccu RST_BUS_DMA>;
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#dma-cells = <1>;
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};
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mmc0: mmc@1c0f000 {
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compatible = "allwinner,sun50i-a64-mmc";
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reg = <0x01c0f000 0x1000>;
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@ -325,7 +336,17 @@
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drive-strength = <40>;
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};
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uart0_pins_a: uart0@0 {
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spi0_pins: spi0 {
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pins = "PC0", "PC1", "PC2", "PC3";
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function = "spi0";
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};
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spi1_pins: spi1 {
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pins = "PD0", "PD1", "PD2", "PD3";
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function = "spi1";
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};
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uart0_pins_a: uart0 {
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pins = "PB8", "PB9";
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function = "uart0";
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};
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@ -449,6 +470,41 @@
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#size-cells = <0>;
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};
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spi0: spi@1c68000 {
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compatible = "allwinner,sun8i-h3-spi";
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reg = <0x01c68000 0x1000>;
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interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&ccu CLK_BUS_SPI0>, <&ccu CLK_SPI0>;
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clock-names = "ahb", "mod";
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dmas = <&dma 23>, <&dma 23>;
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dma-names = "rx", "tx";
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pinctrl-names = "default";
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pinctrl-0 = <&spi0_pins>;
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resets = <&ccu RST_BUS_SPI0>;
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status = "disabled";
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num-cs = <1>;
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#address-cells = <1>;
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#size-cells = <0>;
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};
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spi1: spi@1c69000 {
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compatible = "allwinner,sun8i-h3-spi";
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reg = <0x01c69000 0x1000>;
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interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&ccu CLK_BUS_SPI1>, <&ccu CLK_SPI1>;
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clock-names = "ahb", "mod";
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dmas = <&dma 24>, <&dma 24>;
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dma-names = "rx", "tx";
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pinctrl-names = "default";
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pinctrl-0 = <&spi1_pins>;
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resets = <&ccu RST_BUS_SPI1>;
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status = "disabled";
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num-cs = <1>;
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#address-cells = <1>;
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#size-cells = <0>;
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};
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gic: interrupt-controller@1c81000 {
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compatible = "arm,gic-400";
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reg = <0x01c81000 0x1000>,
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@ -497,7 +553,7 @@
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interrupt-controller;
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#interrupt-cells = <3>;
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r_rsb_pins: rsb@0 {
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r_rsb_pins: rsb {
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pins = "PL0", "PL1";
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function = "s_rsb";
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};
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193
arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo-plus2.dts
Normal file
193
arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo-plus2.dts
Normal file
@ -0,0 +1,193 @@
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/*
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* Copyright (C) 2017 Antony Antony <antony@phenome.org>
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* Copyright (C) 2016 ARM Ltd.
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*
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* This file is dual-licensed: you can use it either under the terms
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* of the GPL or the X11 license, at your option. Note that this dual
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* licensing only applies to this file, and not this project as a
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* whole.
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*
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* a) This file is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of the
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* License, or (at your option) any later version.
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*
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* This file is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* Or, alternatively,
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*
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* b) Permission is hereby granted, free of charge, to any person
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* obtaining a copy of this software and associated documentation
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* files (the "Software"), to deal in the Software without
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* restriction, including without limitation the rights to use,
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* copy, modify, merge, publish, distribute, sublicense, and/or
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* sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following
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* conditions:
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*
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* The above copyright notice and this permission notice shall be
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* included in all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
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* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
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* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
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* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*/
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/dts-v1/;
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#include "sun50i-h5.dtsi"
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/input/input.h>
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#include <dt-bindings/pinctrl/sun4i-a10.h>
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/ {
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model = "FriendlyARM NanoPi NEO Plus2";
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compatible = "friendlyarm,nanopi-neo-plus2", "allwinner,sun50i-h5";
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aliases {
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serial0 = &uart0;
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};
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chosen {
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stdout-path = "serial0:115200n8";
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};
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leds {
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compatible = "gpio-leds";
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pwr {
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label = "nanopi:green:pwr";
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gpios = <&r_pio 0 10 GPIO_ACTIVE_HIGH>;
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default-state = "on";
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};
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status {
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label = "nanopi:red:status";
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gpios = <&pio 0 20 GPIO_ACTIVE_HIGH>;
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};
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};
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reg_gmac_3v3: gmac-3v3 {
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compatible = "regulator-fixed";
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pinctrl-names = "default";
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regulator-name = "gmac-3v3";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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startup-delay-us = <100000>;
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enable-active-high;
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gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>;
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};
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reg_vcc3v3: vcc3v3 {
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compatible = "regulator-fixed";
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regulator-name = "vcc3v3";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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};
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vdd_cpux: gpio-regulator {
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compatible = "regulator-gpio";
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pinctrl-names = "default";
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regulator-name = "vdd-cpux";
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regulator-type = "voltage";
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regulator-boot-on;
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regulator-always-on;
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regulator-min-microvolt = <1100000>;
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regulator-max-microvolt = <1300000>;
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regulator-ramp-delay = <50>; /* 4ms */
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gpios = <&r_pio 0 6 GPIO_ACTIVE_HIGH>;
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gpios-states = <0x1>;
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states = <1100000 0x0
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1300000 0x1>;
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};
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wifi_pwrseq: wifi_pwrseq {
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compatible = "mmc-pwrseq-simple";
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pinctrl-names = "default";
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reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */
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post-power-on-delay-ms = <200>;
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};
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};
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&codec {
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allwinner,audio-routing =
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"Line Out", "LINEOUT",
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"MIC1", "Mic",
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"Mic", "MBIAS";
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status = "okay";
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};
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&ehci0 {
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status = "okay";
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};
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&ehci3 {
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status = "okay";
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};
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&mmc0 {
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pinctrl-names = "default";
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pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>;
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vmmc-supply = <®_vcc3v3>;
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bus-width = <4>;
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cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
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status = "okay";
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};
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&mmc1 {
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pinctrl-names = "default";
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pinctrl-0 = <&mmc1_pins_a>;
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vmmc-supply = <®_vcc3v3>;
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vqmmc-supply = <®_vcc3v3>;
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mmc-pwrseq = <&wifi_pwrseq>;
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bus-width = <4>;
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non-removable;
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status = "okay";
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brcmf: wifi@1 {
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reg = <1>;
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compatible = "brcm,bcm4329-fmac";
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};
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};
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&mmc2 {
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pinctrl-names = "default";
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pinctrl-0 = <&mmc2_8bit_pins>;
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vmmc-supply = <®_vcc3v3>;
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bus-width = <8>;
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non-removable;
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cap-mmc-hw-reset;
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status = "okay";
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};
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&ohci0 {
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status = "okay";
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};
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&ohci3 {
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status = "okay";
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};
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&uart0 {
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pinctrl-names = "default";
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pinctrl-0 = <&uart0_pins_a>;
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status = "okay";
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};
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&usb_otg {
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dr_mode = "host";
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status = "okay";
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};
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&usbphy {
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/* USB Type-A ports' VBUS is always on */
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status = "okay";
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};
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