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ARM: shmobile: r8a7740: add CEU clock support
It is required from sh_mobile_ceu_camera driver. This patch is based on v1.0 manual Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Tested-by: Simon Horman <horms@verge.net.au> Acked-by: Magnus Damm <damm@opensource.se> Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
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@ -43,6 +43,8 @@
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/* CPG registers */
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#define FRQCRA 0xe6150000
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#define FRQCRB 0xe6150004
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#define VCLKCR1 0xE6150008
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#define VCLKCR2 0xE615000c
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#define FRQCRC 0xe61500e0
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#define PLLC01CR 0xe6150028
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@ -317,6 +319,7 @@ static struct clk_div4_table div4_table = {
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/* DIV6 reparent */
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enum {
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DIV6_HDMI,
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DIV6_VCLK1, DIV6_VCLK2,
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DIV6_REPARENT_NR,
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};
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@ -326,9 +329,21 @@ static struct clk *hdmi_parent[] = {
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[2] = &dv_clk
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};
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static struct clk *vclk_parents[8] = {
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[0] = &pllc1_div2_clk,
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[2] = &dv_clk,
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[3] = &usb24s_clk,
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[4] = &extal1_div2_clk,
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[5] = &extalr_clk,
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};
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static struct clk div6_reparent_clks[DIV6_REPARENT_NR] = {
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[DIV6_HDMI] = SH_CLK_DIV6_EXT(HDMICKCR, 0,
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hdmi_parent, ARRAY_SIZE(hdmi_parent), 6, 2),
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[DIV6_VCLK1] = SH_CLK_DIV6_EXT(VCLKCR1, 0,
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vclk_parents, ARRAY_SIZE(vclk_parents), 12, 3),
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[DIV6_VCLK2] = SH_CLK_DIV6_EXT(VCLKCR2, 0,
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vclk_parents, ARRAY_SIZE(vclk_parents), 12, 3),
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};
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/* HDMI1/2 clock */
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@ -417,7 +432,7 @@ static struct clk div6_clks[DIV6_NR] = {
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};
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enum {
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MSTP125,
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MSTP128, MSTP127, MSTP125,
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MSTP116, MSTP111, MSTP100, MSTP117,
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MSTP230,
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@ -434,6 +449,8 @@ enum {
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};
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static struct clk mstp_clks[MSTP_NR] = {
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[MSTP128] = SH_CLK_MSTP32(&div4_clks[DIV4_S], SMSTPCR1, 28, 0), /* CEU21 */
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[MSTP127] = SH_CLK_MSTP32(&div4_clks[DIV4_S], SMSTPCR1, 27, 0), /* CEU20 */
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[MSTP125] = SH_CLK_MSTP32(&div6_clks[DIV6_SUB], SMSTPCR1, 25, 0), /* TMU0 */
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[MSTP117] = SH_CLK_MSTP32(&div4_clks[DIV4_B], SMSTPCR1, 17, 0), /* LCDC1 */
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[MSTP116] = SH_CLK_MSTP32(&div6_clks[DIV6_SUB], SMSTPCR1, 16, 0), /* IIC0 */
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@ -484,6 +501,8 @@ static struct clk_lookup lookups[] = {
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CLKDEV_CON_ID("usb24s", &usb24s_clk),
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CLKDEV_CON_ID("hdmi1", &hdmi1_clk),
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CLKDEV_CON_ID("hdmi2", &hdmi2_clk),
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CLKDEV_CON_ID("video1", &div6_reparent_clks[DIV6_VCLK1]),
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CLKDEV_CON_ID("video2", &div6_reparent_clks[DIV6_VCLK2]),
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/* DIV4 clocks */
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CLKDEV_CON_ID("i_clk", &div4_clks[DIV4_I]),
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@ -506,6 +525,8 @@ static struct clk_lookup lookups[] = {
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CLKDEV_DEV_ID("i2c-sh_mobile.0", &mstp_clks[MSTP116]),
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CLKDEV_DEV_ID("sh_mobile_lcdc_fb.1", &mstp_clks[MSTP117]),
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CLKDEV_DEV_ID("sh_tmu.0", &mstp_clks[MSTP125]),
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CLKDEV_DEV_ID("sh_mobile_ceu.0", &mstp_clks[MSTP127]),
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CLKDEV_DEV_ID("sh_mobile_ceu.1", &mstp_clks[MSTP128]),
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CLKDEV_DEV_ID("sh-sci.4", &mstp_clks[MSTP200]),
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CLKDEV_DEV_ID("sh-sci.3", &mstp_clks[MSTP201]),
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