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KVM: arm64: vgic-its: Avoid potential UAF in LPI translation cache
There is a potential UAF scenario in the case of an LPI translation cache hit racing with an operation that invalidates the cache, such as a DISCARD ITS command. The root of the problem is that vgic_its_check_cache() does not elevate the refcount on the vgic_irq before dropping the lock that serializes refcount changes. Have vgic_its_check_cache() raise the refcount on the returned vgic_irq and add the corresponding decrement after queueing the interrupt. Cc: stable@vger.kernel.org Signed-off-by: Oliver Upton <oliver.upton@linux.dev> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20240104183233.3560639-1-oliver.upton@linux.dev
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@ -590,7 +590,11 @@ static struct vgic_irq *vgic_its_check_cache(struct kvm *kvm, phys_addr_t db,
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unsigned long flags;
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raw_spin_lock_irqsave(&dist->lpi_list_lock, flags);
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irq = __vgic_its_check_cache(dist, db, devid, eventid);
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if (irq)
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vgic_get_irq_kref(irq);
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raw_spin_unlock_irqrestore(&dist->lpi_list_lock, flags);
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return irq;
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@ -769,6 +773,7 @@ int vgic_its_inject_cached_translation(struct kvm *kvm, struct kvm_msi *msi)
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raw_spin_lock_irqsave(&irq->irq_lock, flags);
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irq->pending_latch = true;
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vgic_queue_irq_unlock(kvm, irq, flags);
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vgic_put_irq(kvm, irq);
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return 0;
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}
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