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ARM: kprobes: Fix emulation of CMP, CMN, TST and TEQ instructions.
Probing these instructions was corrupting R0 because the emulation code didn't account for the fact that they don't write a result to a register. Signed-off-by: Jon Medhurst <tixy@yxit.co.uk> Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
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@ -807,6 +807,17 @@ emulate_alu_imm_rwflags(struct kprobe *p, struct pt_regs *regs)
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regs->uregs[rd] = insnslot_1arg_rwflags(rnv, ®s->ARM_cpsr, i_fn);
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}
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static void __kprobes
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emulate_alu_tests_imm(struct kprobe *p, struct pt_regs *regs)
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{
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insn_1arg_fn_t *i_fn = (insn_1arg_fn_t *)&p->ainsn.insn[0];
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kprobe_opcode_t insn = p->opcode;
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int rn = (insn >> 16) & 0xf;
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long rnv = (rn == 15) ? (long)p->addr + 8 : regs->uregs[rn];
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insnslot_1arg_rwflags(rnv, ®s->ARM_cpsr, i_fn);
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}
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static void __kprobes
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emulate_alu_rflags(struct kprobe *p, struct pt_regs *regs)
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{
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@ -843,6 +854,22 @@ emulate_alu_rwflags(struct kprobe *p, struct pt_regs *regs)
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insnslot_3arg_rwflags(rnv, rmv, rsv, ®s->ARM_cpsr, i_fn);
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}
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static void __kprobes
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emulate_alu_tests(struct kprobe *p, struct pt_regs *regs)
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{
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insn_3arg_fn_t *i_fn = (insn_3arg_fn_t *)&p->ainsn.insn[0];
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kprobe_opcode_t insn = p->opcode;
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long ppc = (long)p->addr + 8;
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int rn = (insn >> 16) & 0xf;
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int rs = (insn >> 8) & 0xf; /* rs/rsv may be invalid, don't care. */
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int rm = insn & 0xf;
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long rnv = (rn == 15) ? ppc : regs->uregs[rn];
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long rmv = (rm == 15) ? ppc : regs->uregs[rm];
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long rsv = regs->uregs[rs];
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insnslot_3arg_rwflags(rnv, rmv, rsv, ®s->ARM_cpsr, i_fn);
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}
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static enum kprobe_insn __kprobes
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prep_emulate_ldr_str(kprobe_opcode_t insn, struct arch_specific_insn *asi)
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{
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@ -1142,8 +1169,20 @@ space_cccc_000x(kprobe_opcode_t insn, struct arch_specific_insn *asi)
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insn |= 0x00000200; /* Rs = r2 */
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}
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asi->insn[0] = insn;
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asi->insn_handler = (insn & (1 << 20)) ? /* S-bit */
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if ((insn & 0x0f900000) == 0x01100000) {
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/*
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* TST : cccc 0001 0001 xxxx xxxx xxxx xxxx xxxx
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* TEQ : cccc 0001 0011 xxxx xxxx xxxx xxxx xxxx
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* CMP : cccc 0001 0101 xxxx xxxx xxxx xxxx xxxx
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* CMN : cccc 0001 0111 xxxx xxxx xxxx xxxx xxxx
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*/
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asi->insn_handler = emulate_alu_tests;
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} else {
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/* ALU ops which write to Rd */
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asi->insn_handler = (insn & (1 << 20)) ? /* S-bit */
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emulate_alu_rwflags : emulate_alu_rflags;
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}
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return INSN_GOOD;
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}
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@ -1170,8 +1209,20 @@ space_cccc_001x(kprobe_opcode_t insn, struct arch_specific_insn *asi)
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*/
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insn &= 0xffff0fff; /* Rd = r0 */
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asi->insn[0] = insn;
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asi->insn_handler = (insn & (1 << 20)) ? /* S-bit */
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if ((insn & 0x0f900000) == 0x03100000) {
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/*
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* TST : cccc 0011 0001 xxxx xxxx xxxx xxxx xxxx
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* TEQ : cccc 0011 0011 xxxx xxxx xxxx xxxx xxxx
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* CMP : cccc 0011 0101 xxxx xxxx xxxx xxxx xxxx
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* CMN : cccc 0011 0111 xxxx xxxx xxxx xxxx xxxx
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*/
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asi->insn_handler = emulate_alu_tests_imm;
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} else {
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/* ALU ops which write to Rd */
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asi->insn_handler = (insn & (1 << 20)) ? /* S-bit */
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emulate_alu_imm_rwflags : emulate_alu_imm_rflags;
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}
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return INSN_GOOD;
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}
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