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MIPS: ath79: Fix the size of the MISC INTC registers in ar9132.dtsi
There is 2 registers that is 8 bytes long, not 4. Signed-off-by: Alban Bedel <albeu@free.fr> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Marc Zyngier <marc.zyngier@arm.com> Cc: Alexander Couzens <lynxis@fe80.eu> Cc: Joel Porquet <joel@porquet.org> Cc: Andrew Bresticker <abrestic@chromium.org> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/11508/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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@ -107,7 +107,7 @@
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miscintc: interrupt-controller@18060010 {
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compatible = "qca,ar9132-misc-intc",
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"qca,ar7100-misc-intc";
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reg = <0x18060010 0x4>;
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reg = <0x18060010 0x8>;
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interrupt-parent = <&cpuintc>;
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interrupts = <6>;
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