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asm-generic/bitops: Always inline all bit manipulation helpers
Make it consistent with the atomic/atomic-instrumented.h helpers. And defconfig size is actually going down! text data bss dec hex filename 22352096 8213152 1917164 32482412 1efa46c vmlinux.x86-64.defconfig.before 22350551 8213184 1917164 32480899 1ef9e83 vmlinux.x86-64.defconfig.after Suggested-by: Peter Zijlstra (Intel) <peterz@infradead.org> Signed-off-by: Borislav Petkov <bp@suse.de> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Acked-by: Marco Elver <elver@google.com> Link: https://lore.kernel.org/r/20220113155357.4706-2-bp@alien8.de
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@ -23,7 +23,7 @@
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* Note that @nr may be almost arbitrarily large; this function is not
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* restricted to acting on a single-word quantity.
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*/
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static inline void set_bit(long nr, volatile unsigned long *addr)
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static __always_inline void set_bit(long nr, volatile unsigned long *addr)
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{
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instrument_atomic_write(addr + BIT_WORD(nr), sizeof(long));
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arch_set_bit(nr, addr);
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@ -36,7 +36,7 @@ static inline void set_bit(long nr, volatile unsigned long *addr)
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*
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* This is a relaxed atomic operation (no implied memory barriers).
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*/
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static inline void clear_bit(long nr, volatile unsigned long *addr)
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static __always_inline void clear_bit(long nr, volatile unsigned long *addr)
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{
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instrument_atomic_write(addr + BIT_WORD(nr), sizeof(long));
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arch_clear_bit(nr, addr);
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@ -52,7 +52,7 @@ static inline void clear_bit(long nr, volatile unsigned long *addr)
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* Note that @nr may be almost arbitrarily large; this function is not
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* restricted to acting on a single-word quantity.
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*/
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static inline void change_bit(long nr, volatile unsigned long *addr)
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static __always_inline void change_bit(long nr, volatile unsigned long *addr)
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{
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instrument_atomic_write(addr + BIT_WORD(nr), sizeof(long));
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arch_change_bit(nr, addr);
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@ -65,7 +65,7 @@ static inline void change_bit(long nr, volatile unsigned long *addr)
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*
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* This is an atomic fully-ordered operation (implied full memory barrier).
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*/
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static inline bool test_and_set_bit(long nr, volatile unsigned long *addr)
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static __always_inline bool test_and_set_bit(long nr, volatile unsigned long *addr)
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{
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kcsan_mb();
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instrument_atomic_read_write(addr + BIT_WORD(nr), sizeof(long));
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@ -79,7 +79,7 @@ static inline bool test_and_set_bit(long nr, volatile unsigned long *addr)
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*
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* This is an atomic fully-ordered operation (implied full memory barrier).
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*/
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static inline bool test_and_clear_bit(long nr, volatile unsigned long *addr)
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static __always_inline bool test_and_clear_bit(long nr, volatile unsigned long *addr)
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{
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kcsan_mb();
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instrument_atomic_read_write(addr + BIT_WORD(nr), sizeof(long));
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@ -93,7 +93,7 @@ static inline bool test_and_clear_bit(long nr, volatile unsigned long *addr)
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*
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* This is an atomic fully-ordered operation (implied full memory barrier).
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*/
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static inline bool test_and_change_bit(long nr, volatile unsigned long *addr)
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static __always_inline bool test_and_change_bit(long nr, volatile unsigned long *addr)
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{
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kcsan_mb();
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instrument_atomic_read_write(addr + BIT_WORD(nr), sizeof(long));
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@ -22,7 +22,7 @@
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* region of memory concurrently, the effect may be that only one operation
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* succeeds.
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*/
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static inline void __set_bit(long nr, volatile unsigned long *addr)
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static __always_inline void __set_bit(long nr, volatile unsigned long *addr)
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{
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instrument_write(addr + BIT_WORD(nr), sizeof(long));
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arch___set_bit(nr, addr);
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@ -37,7 +37,7 @@ static inline void __set_bit(long nr, volatile unsigned long *addr)
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* region of memory concurrently, the effect may be that only one operation
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* succeeds.
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*/
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static inline void __clear_bit(long nr, volatile unsigned long *addr)
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static __always_inline void __clear_bit(long nr, volatile unsigned long *addr)
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{
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instrument_write(addr + BIT_WORD(nr), sizeof(long));
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arch___clear_bit(nr, addr);
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@ -52,13 +52,13 @@ static inline void __clear_bit(long nr, volatile unsigned long *addr)
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* region of memory concurrently, the effect may be that only one operation
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* succeeds.
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*/
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static inline void __change_bit(long nr, volatile unsigned long *addr)
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static __always_inline void __change_bit(long nr, volatile unsigned long *addr)
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{
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instrument_write(addr + BIT_WORD(nr), sizeof(long));
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arch___change_bit(nr, addr);
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}
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static inline void __instrument_read_write_bitop(long nr, volatile unsigned long *addr)
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static __always_inline void __instrument_read_write_bitop(long nr, volatile unsigned long *addr)
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{
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if (IS_ENABLED(CONFIG_KCSAN_ASSUME_PLAIN_WRITES_ATOMIC)) {
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/*
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@ -90,7 +90,7 @@ static inline void __instrument_read_write_bitop(long nr, volatile unsigned long
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* This operation is non-atomic. If two instances of this operation race, one
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* can appear to succeed but actually fail.
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*/
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static inline bool __test_and_set_bit(long nr, volatile unsigned long *addr)
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static __always_inline bool __test_and_set_bit(long nr, volatile unsigned long *addr)
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{
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__instrument_read_write_bitop(nr, addr);
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return arch___test_and_set_bit(nr, addr);
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@ -104,7 +104,7 @@ static inline bool __test_and_set_bit(long nr, volatile unsigned long *addr)
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* This operation is non-atomic. If two instances of this operation race, one
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* can appear to succeed but actually fail.
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*/
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static inline bool __test_and_clear_bit(long nr, volatile unsigned long *addr)
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static __always_inline bool __test_and_clear_bit(long nr, volatile unsigned long *addr)
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{
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__instrument_read_write_bitop(nr, addr);
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return arch___test_and_clear_bit(nr, addr);
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@ -118,7 +118,7 @@ static inline bool __test_and_clear_bit(long nr, volatile unsigned long *addr)
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* This operation is non-atomic. If two instances of this operation race, one
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* can appear to succeed but actually fail.
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*/
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static inline bool __test_and_change_bit(long nr, volatile unsigned long *addr)
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static __always_inline bool __test_and_change_bit(long nr, volatile unsigned long *addr)
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{
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__instrument_read_write_bitop(nr, addr);
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return arch___test_and_change_bit(nr, addr);
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@ -129,7 +129,7 @@ static inline bool __test_and_change_bit(long nr, volatile unsigned long *addr)
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* @nr: bit number to test
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* @addr: Address to start counting from
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*/
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static inline bool test_bit(long nr, const volatile unsigned long *addr)
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static __always_inline bool test_bit(long nr, const volatile unsigned long *addr)
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{
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instrument_atomic_read(addr + BIT_WORD(nr), sizeof(long));
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return arch_test_bit(nr, addr);
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