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PCI: Add weak pcibios_window_alignment() interface
This patch implements a weak function to return the default I/O or memory window alignment for a P2P bridge. By default, I/O windows are aligned to 4KiB or 1KiB and memory windows are aligned to 4MiB. Some platforms, e.g., powernv, have special alignment requirements and can override pcibios_window_alignment(). [bhelgaas: changelog] Signed-off-by: Gavin Shan <shangw@linux.vnet.ibm.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
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@ -697,6 +697,38 @@ static resource_size_t calculate_memsize(resource_size_t size,
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return size;
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}
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resource_size_t __weak pcibios_window_alignment(struct pci_bus *bus,
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unsigned long type)
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{
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return 1;
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}
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#define PCI_P2P_DEFAULT_MEM_ALIGN 0x100000 /* 1MiB */
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#define PCI_P2P_DEFAULT_IO_ALIGN 0x1000 /* 4KiB */
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#define PCI_P2P_DEFAULT_IO_ALIGN_1K 0x400 /* 1KiB */
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static resource_size_t window_alignment(struct pci_bus *bus,
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unsigned long type)
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{
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resource_size_t align = 1, arch_align;
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if (type & IORESOURCE_MEM)
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align = PCI_P2P_DEFAULT_MEM_ALIGN;
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else if (type & IORESOURCE_IO) {
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/*
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* Per spec, I/O windows are 4K-aligned, but some
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* bridges have an extension to support 1K alignment.
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*/
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if (bus->self->io_window_1k)
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align = PCI_P2P_DEFAULT_IO_ALIGN_1K;
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else
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align = PCI_P2P_DEFAULT_IO_ALIGN;
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}
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arch_align = pcibios_window_alignment(bus, type);
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return max(align, arch_align);
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}
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/**
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* pbus_size_io() - size the io window of a given bus
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*
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@ -1064,6 +1064,8 @@ int pci_cfg_space_size_ext(struct pci_dev *dev);
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int pci_cfg_space_size(struct pci_dev *dev);
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unsigned char pci_bus_max_busnr(struct pci_bus *bus);
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void pci_setup_bridge(struct pci_bus *bus);
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resource_size_t pcibios_window_alignment(struct pci_bus *bus,
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unsigned long type);
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#define PCI_VGA_STATE_CHANGE_BRIDGE (1 << 0)
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#define PCI_VGA_STATE_CHANGE_DECODES (1 << 1)
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