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include/asm-x86/msr.h: checkpatch cleanups - formatting only
Signed-off-by: Joe Perches <joe@perches.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
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@ -16,8 +16,8 @@
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static inline unsigned long long native_read_tscp(unsigned int *aux)
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{
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unsigned long low, high;
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asm volatile (".byte 0x0f,0x01,0xf9"
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: "=a" (low), "=d" (high), "=c" (*aux));
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asm volatile(".byte 0x0f,0x01,0xf9"
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: "=a" (low), "=d" (high), "=c" (*aux));
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return low | ((u64)high >> 32);
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}
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@ -29,7 +29,7 @@ static inline unsigned long long native_read_tscp(unsigned int *aux)
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*/
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#ifdef CONFIG_X86_64
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#define DECLARE_ARGS(val, low, high) unsigned low, high
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#define EAX_EDX_VAL(val, low, high) (low | ((u64)(high) << 32))
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#define EAX_EDX_VAL(val, low, high) ((low) | ((u64)(high) << 32))
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#define EAX_EDX_ARGS(val, low, high) "a" (low), "d" (high)
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#define EAX_EDX_RET(val, low, high) "=a" (low), "=d" (high)
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#else
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@ -57,7 +57,7 @@ static inline unsigned long long native_read_msr_safe(unsigned int msr,
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".section .fixup,\"ax\"\n\t"
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"3: mov %3,%0 ; jmp 1b\n\t"
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".previous\n\t"
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_ASM_EXTABLE(2b,3b)
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_ASM_EXTABLE(2b, 3b)
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: "=r" (*err), EAX_EDX_RET(val, low, high)
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: "c" (msr), "i" (-EFAULT));
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return EAX_EDX_VAL(val, low, high);
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@ -78,10 +78,10 @@ static inline int native_write_msr_safe(unsigned int msr,
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".section .fixup,\"ax\"\n\t"
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"3: mov %4,%0 ; jmp 1b\n\t"
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".previous\n\t"
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_ASM_EXTABLE(2b,3b)
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_ASM_EXTABLE(2b, 3b)
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: "=a" (err)
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: "c" (msr), "0" (low), "d" (high),
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"i" (-EFAULT));
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"i" (-EFAULT));
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return err;
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}
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@ -116,23 +116,23 @@ static inline unsigned long long native_read_pmc(int counter)
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* pointer indirection), this allows gcc to optimize better
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*/
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#define rdmsr(msr,val1,val2) \
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do { \
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u64 __val = native_read_msr(msr); \
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(val1) = (u32)__val; \
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(val2) = (u32)(__val >> 32); \
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} while(0)
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#define rdmsr(msr, val1, val2) \
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do { \
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u64 __val = native_read_msr((msr)); \
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(val1) = (u32)__val; \
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(val2) = (u32)(__val >> 32); \
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} while (0)
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static inline void wrmsr(unsigned msr, unsigned low, unsigned high)
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{
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native_write_msr(msr, low, high);
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}
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#define rdmsrl(msr,val) \
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((val) = native_read_msr(msr))
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#define rdmsrl(msr, val) \
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((val) = native_read_msr((msr)))
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#define wrmsrl(msr, val) \
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native_write_msr(msr, (u32)((u64)(val)), (u32)((u64)(val) >> 32))
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native_write_msr((msr), (u32)((u64)(val)), (u32)((u64)(val) >> 32))
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/* wrmsr with exception handling */
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static inline int wrmsr_safe(unsigned msr, unsigned low, unsigned high)
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@ -141,14 +141,14 @@ static inline int wrmsr_safe(unsigned msr, unsigned low, unsigned high)
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}
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/* rdmsr with exception handling */
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#define rdmsr_safe(msr,p1,p2) \
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({ \
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int __err; \
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u64 __val = native_read_msr_safe(msr, &__err); \
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(*p1) = (u32)__val; \
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(*p2) = (u32)(__val >> 32); \
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__err; \
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})
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#define rdmsr_safe(msr, p1, p2) \
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({ \
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int __err; \
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u64 __val = native_read_msr_safe((msr), &__err); \
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(*p1) = (u32)__val; \
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(*p2) = (u32)(__val >> 32); \
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__err; \
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})
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#define rdtscl(low) \
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((low) = (u32)native_read_tsc())
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@ -156,35 +156,37 @@ static inline int wrmsr_safe(unsigned msr, unsigned low, unsigned high)
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#define rdtscll(val) \
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((val) = native_read_tsc())
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#define rdpmc(counter,low,high) \
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do { \
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u64 _l = native_read_pmc(counter); \
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(low) = (u32)_l; \
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(high) = (u32)(_l >> 32); \
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} while(0)
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#define rdpmc(counter, low, high) \
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do { \
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u64 _l = native_read_pmc((counter)); \
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(low) = (u32)_l; \
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(high) = (u32)(_l >> 32); \
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} while (0)
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#define rdtscp(low, high, aux) \
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do { \
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unsigned long long _val = native_read_tscp(&(aux)); \
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(low) = (u32)_val; \
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(high) = (u32)(_val >> 32); \
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} while (0)
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#define rdtscp(low, high, aux) \
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do { \
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unsigned long long _val = native_read_tscp(&(aux)); \
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(low) = (u32)_val; \
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(high) = (u32)(_val >> 32); \
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} while (0)
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#define rdtscpll(val, aux) (val) = native_read_tscp(&(aux))
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#endif /* !CONFIG_PARAVIRT */
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#define checking_wrmsrl(msr,val) wrmsr_safe(msr,(u32)(val),(u32)((val)>>32))
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#define checking_wrmsrl(msr, val) wrmsr_safe((msr), (u32)(val), \
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(u32)((val) >> 32))
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#define write_tsc(val1,val2) wrmsr(0x10, val1, val2)
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#define write_tsc(val1, val2) wrmsr(0x10, (val1), (val2))
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#define write_rdtscp_aux(val) wrmsr(0xc0000103, val, 0)
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#define write_rdtscp_aux(val) wrmsr(0xc0000103, (val), 0)
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#ifdef CONFIG_SMP
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void rdmsr_on_cpu(unsigned int cpu, u32 msr_no, u32 *l, u32 *h);
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void wrmsr_on_cpu(unsigned int cpu, u32 msr_no, u32 l, u32 h);
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int rdmsr_safe_on_cpu(unsigned int cpu, u32 msr_no, u32 *l, u32 *h);
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int wrmsr_safe_on_cpu(unsigned int cpu, u32 msr_no, u32 l, u32 h);
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#else /* CONFIG_SMP */
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static inline void rdmsr_on_cpu(unsigned int cpu, u32 msr_no, u32 *l, u32 *h)
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@ -195,7 +197,8 @@ static inline void wrmsr_on_cpu(unsigned int cpu, u32 msr_no, u32 l, u32 h)
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{
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wrmsr(msr_no, l, h);
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}
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static inline int rdmsr_safe_on_cpu(unsigned int cpu, u32 msr_no, u32 *l, u32 *h)
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static inline int rdmsr_safe_on_cpu(unsigned int cpu, u32 msr_no,
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u32 *l, u32 *h)
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{
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return rdmsr_safe(msr_no, l, h);
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}
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