mirror of
https://github.com/torvalds/linux.git
synced 2024-11-01 09:41:44 +00:00
Drop omap legacy platform data for IRQ, DMA and IO resources. With the
dts files fixed up to contain the necessary data for basic resources, we can drop the related platform data. Note that this branch depends on the "omap-for-v4.15/fixes-dt-signed" branch and the patches with dependencies are based on a merge with that branch. These patches first ensure things keep working for the legacy "ti,hwmods" property when we start making it optional, then adds a minimal TI sysc interconnect target device driver to handle the new generic "ti,sysc" compatible property. And then we can finally drop the legacy platform data for IRQ, DMA and IO resources as seen in the diffstats. -----BEGIN PGP SIGNATURE----- iQJFBAABCAAvFiEEkgNvrZJU/QSQYIcQG9Q+yVyrpXMFAlnpH4MRHHRvbnlAYXRv bWlkZS5jb20ACgkQG9Q+yVyrpXOflw//a6XK67MvvBAni0jUrEvVsXkIszk/V8bm 2rTnBT+8mdH7QjH2QQrvtS5XX7uVSY27Pay9yiudhB/ZvHdih4SguSZB2JC9nMyf uAJAk5JUXvGdlj7NjMhIEEQZHzb2GYXlwNWKW8201FgjTrUs/miRLb0+bBi0+a5O 02FFYb45Gcv0xQlwcG7yAWzjCpy5a0Vd75M/Q+aGeNXeZagrH1bLtc6dNY59RPKs 0D51XGQNHyVDITArBms9Q6O+MyIHnRcL3zdKRGrWMhNXBwP5jwE6EE1Jnmcsge9m vPSdCpRlPQPPhBgLKAqZfHKXEpaVQfPjq7vp/ZFUiBSMuyNb2SP7YCOnh06cZwjZ hz4eMIQVvABBNvGMmg934hWP7OHSQkgxn5+zPo5o3gYvv+GvrKRUmxfaDpUoX4Ld oLUUcCfb4r0YAr5S+iCXaGtEdYhXdL1xzndSKFNlf+tx95BxbsfQ4u7pITMjLTAB vXBJASquuLQYRumWXPnMUDkKuTEJPq/ndSIOfdSU+09jFKGwkv/2C15YO8uZsH6m fWSUEGyD+c9hbnYDNE5mXkB4OeP7aGeCJC0RaucHXOeNNJJPRgNXPeHJA2aXYam+ ml28jwoPRoOCE+SjGV0RtxjDAjMuc3Xknq6xq5GmHp8peHdeG+GaD4qdJThlcgRl yLnaNnEoZsI= =UKzm -----END PGP SIGNATURE----- Merge tag 'omap-for-v4.15/ti-sysc-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/soc Pull "more soc changes for omaps for v4.15 merge window" from Tony Lindgren: Drop omap legacy platform data for IRQ, DMA and IO resources. With the dts files fixed up to contain the necessary data for basic resources, we can drop the related platform data. Note that this branch depends on the "omap-for-v4.15/fixes-dt-signed" branch and the patches with dependencies are based on a merge with that branch. These patches first ensure things keep working for the legacy "ti,hwmods" property when we start making it optional, then adds a minimal TI sysc interconnect target device driver to handle the new generic "ti,sysc" compatible property. And then we can finally drop the legacy platform data for IRQ, DMA and IO resources as seen in the diffstats. * tag 'omap-for-v4.15/ti-sysc-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: (25 commits) bus: ti-sysc: Fix unbalanced pm_runtime_enable by adding remove bus: ti-sysc: mark PM functions as __maybe_unused ARM: OMAP2+: omap_device: fix error return code in omap_device_copy_resources() ARM: OMAP2+: Drop legacy struct omap_hwmod_addr_space ARM: OMAP2+: Drop omap_hwmod_dma_info ARM: OMAP2+: Drop omap_hwmod_irq_info ARM: OMAP4: Remove legacy IRQ for PRM ARM: OMAP3: Remove legacy IRQ for PRM bus: ti-sysc: Add minimal TI sysc interconnect target driver ARM: OMAP2+: Populate legacy resources for dma and smartreflex ARM: OMAP2+: Parse module IO range from dts for legacy "ti,hwmods" support ARM: dts: Configure SmartReflex only to idle the interconnect target module ARM: dts: Add nodes for missing omap4 interconnect target modules dt-bindings: bus: Minimal TI sysc interconnect target module binding ARM: dts: Add missing hwmod related properties for dra7 ARM: dts: Add missing hwmod related nodes for am33xx ARM: dts: Add missing dma hwmod property for omap5 ARM: dts: Add missing wdt3 node for omap4 ARM: dts: Add missing hsi node for omap4 ARM: dts: Add missing onewire node for omap4 ...
This commit is contained in:
Arnd Bergmann
commit
ab63d1efc5
@ -21,6 +21,8 @@ Required properties:
|
||||
"ti,omap3-scm"
|
||||
"ti,omap4-scm-core"
|
||||
"ti,omap4-scm-padconf-core"
|
||||
"ti,omap4-scm-wkup"
|
||||
"ti,omap4-scm-padconf-wkup"
|
||||
"ti,omap5-scm-core"
|
||||
"ti,omap5-scm-padconf-core"
|
||||
"ti,dra7-scm-core"
|
||||
|
||||
93
Documentation/devicetree/bindings/bus/ti-sysc.txt
Normal file
93
Documentation/devicetree/bindings/bus/ti-sysc.txt
Normal file
@ -0,0 +1,93 @@
|
||||
Texas Instruments sysc interconnect target module wrapper binding
|
||||
|
||||
Texas Instruments SoCs can have a generic interconnect target module
|
||||
hardware for devices connected to various interconnects such as L3
|
||||
interconnect (Arteris NoC) and L4 interconnect (Sonics s3220). The sysc
|
||||
is mostly used for interaction between module and PRCM. It participates
|
||||
in the OCP Disconnect Protocol but other than that is mostly independent
|
||||
of the interconnect.
|
||||
|
||||
Each interconnect target module can have one or more devices connected to
|
||||
it. There is a set of control registers for managing interconnect target
|
||||
module clocks, idle modes and interconnect level resets for the module.
|
||||
|
||||
These control registers are sprinkled into the unused register address
|
||||
space of the first child device IP block managed by the interconnect
|
||||
target module and typically are named REVISION, SYSCONFIG and SYSSTATUS.
|
||||
|
||||
Required standard properties:
|
||||
|
||||
- compatible shall be one of the following generic types:
|
||||
|
||||
"ti,sysc-omap2"
|
||||
"ti,sysc-omap4"
|
||||
"ti,sysc-omap4-simple"
|
||||
|
||||
or one of the following derivative types for hardware
|
||||
needing special workarounds:
|
||||
|
||||
"ti,sysc-omap3430-sr"
|
||||
"ti,sysc-omap3630-sr"
|
||||
"ti,sysc-omap4-sr"
|
||||
"ti,sysc-omap3-sham"
|
||||
"ti,sysc-omap-aes"
|
||||
"ti,sysc-mcasp"
|
||||
"ti,sysc-usb-host-fs"
|
||||
|
||||
- reg shall have register areas implemented for the interconnect
|
||||
target module in question such as revision, sysc and syss
|
||||
|
||||
- reg-names shall contain the register names implemented for the
|
||||
interconnect target module in question such as
|
||||
"rev, "sysc", and "syss"
|
||||
|
||||
- ranges shall contain the interconnect target module IO range
|
||||
available for one or more child device IP blocks managed
|
||||
by the interconnect target module, the ranges may include
|
||||
multiple ranges such as device L4 range for control and
|
||||
parent L3 range for DMA access
|
||||
|
||||
Optional properties:
|
||||
|
||||
- clocks clock specifier for each name in the clock-names as
|
||||
specified in the binding documentation for ti-clkctrl,
|
||||
typically available for all interconnect targets on TI SoCs
|
||||
based on omap4 except if it's read-only register in hwauto
|
||||
mode as for example omap4 L4_CFG_CLKCTRL
|
||||
|
||||
- clock-names should contain at least "fck", and optionally also "ick"
|
||||
depending on the SoC and the interconnect target module
|
||||
|
||||
- ti,hwmods optional TI interconnect module name to use legacy
|
||||
hwmod platform data
|
||||
|
||||
|
||||
Example: Single instance of MUSB controller on omap4 using interconnect ranges
|
||||
using offsets from l4_cfg second segment (0x4a000000 + 0x80000 = 0x4a0ab000):
|
||||
|
||||
target-module@2b000 { /* 0x4a0ab000, ap 84 12.0 */
|
||||
compatible = "ti,sysc-omap2";
|
||||
ti,hwmods = "usb_otg_hs";
|
||||
reg = <0x2b400 0x4>,
|
||||
<0x2b404 0x4>,
|
||||
<0x2b408 0x4>;
|
||||
reg-names = "rev", "sysc", "syss";
|
||||
clocks = <&l3_init_clkctrl OMAP4_USB_OTG_HS_CLKCTRL 0>;
|
||||
clock-names = "fck";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges = <0 0x2b000 0x1000>;
|
||||
|
||||
usb_otg_hs: otg@0 {
|
||||
compatible = "ti,omap4-musb";
|
||||
reg = <0x0 0x7ff>;
|
||||
interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
|
||||
usb-phy = <&usb2_phy>;
|
||||
...
|
||||
};
|
||||
};
|
||||
|
||||
Note that other SoCs, such as am335x can have multipe child devices. On am335x
|
||||
there are two MUSB instances, two USB PHY instances, and a single CPPI41 DMA
|
||||
instance as children of a single interconnet target module.
|
||||
@ -1,10 +1,12 @@
|
||||
OMAP SSI controller bindings
|
||||
|
||||
OMAP Synchronous Serial Interface (SSI) controller implements a legacy
|
||||
variant of MIPI's High Speed Synchronous Serial Interface (HSI).
|
||||
OMAP3's Synchronous Serial Interface (SSI) controller implements a
|
||||
legacy variant of MIPI's High Speed Synchronous Serial Interface (HSI),
|
||||
while the controller found inside OMAP4 is supposed to be fully compliant
|
||||
with the HSI standard.
|
||||
|
||||
Required properties:
|
||||
- compatible: Should include "ti,omap3-ssi".
|
||||
- compatible: Should include "ti,omap3-ssi" or "ti,omap4-hsi"
|
||||
- reg-names: Contains the values "sys" and "gdd" (in this order).
|
||||
- reg: Contains a matching register specifier for each entry
|
||||
in reg-names.
|
||||
@ -27,6 +29,7 @@ Each port is represented as a sub-node of the ti,omap3-ssi device.
|
||||
Required Port sub-node properties:
|
||||
- compatible: Should be set to the following value
|
||||
ti,omap3-ssi-port (applicable to OMAP34xx devices)
|
||||
ti,omap4-hsi-port (applicable to OMAP44xx devices)
|
||||
- reg-names: Contains the values "tx" and "rx" (in this order).
|
||||
- reg: Contains a matching register specifier for each entry
|
||||
in reg-names.
|
||||
@ -38,6 +41,10 @@ Required Port sub-node properties:
|
||||
property. If it's missing the port will not be
|
||||
enabled.
|
||||
|
||||
Optional properties:
|
||||
- ti,hwmods: Shall contain TI interconnect module name if needed
|
||||
by the SoC
|
||||
|
||||
Example for Nokia N900:
|
||||
|
||||
ssi-controller@48058000 {
|
||||
|
||||
@ -7,8 +7,10 @@ of the EMIF IP and memory parts attached to it.
|
||||
|
||||
Required properties:
|
||||
- compatible : Should be of the form "ti,emif-<ip-rev>" where <ip-rev>
|
||||
is the IP revision of the specific EMIF instance.
|
||||
For am437x should be ti,emif-am4372.
|
||||
is the IP revision of the specific EMIF instance. For newer controllers,
|
||||
compatible should be one of the following:
|
||||
"ti,emif-am3352"
|
||||
"ti,emif-am4372"
|
||||
|
||||
- phy-type : <u32> indicating the DDR phy type. Following are the
|
||||
allowed values
|
||||
|
||||
47
Documentation/devicetree/bindings/power/ti-smartreflex.txt
Normal file
47
Documentation/devicetree/bindings/power/ti-smartreflex.txt
Normal file
@ -0,0 +1,47 @@
|
||||
Texas Instruments SmartReflex binding
|
||||
|
||||
SmartReflex is used to set and adjust the SoC operating points.
|
||||
|
||||
|
||||
Required properties:
|
||||
|
||||
compatible: Shall be one of the following:
|
||||
"ti,omap3-smartreflex-core"
|
||||
"ti,omap3-smartreflex-iva"
|
||||
"ti,omap4-smartreflex-core"
|
||||
"ti,omap4-smartreflex-mpu"
|
||||
"ti,omap4-smartreflex-iva"
|
||||
|
||||
reg: Shall contain the device instance IO range
|
||||
|
||||
interrupts: Shall contain the device instance interrupt
|
||||
|
||||
|
||||
Optional properties:
|
||||
|
||||
ti,hwmods: Shall contain the TI interconnect module name if needed
|
||||
by the SoC
|
||||
|
||||
|
||||
Example:
|
||||
|
||||
smartreflex_iva: smartreflex@4a0db000 {
|
||||
compatible = "ti,omap4-smartreflex-iva";
|
||||
reg = <0x4a0db000 0x80>;
|
||||
interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
|
||||
ti,hwmods = "smartreflex_iva";
|
||||
};
|
||||
|
||||
smartreflex_core: smartreflex@4a0dd000 {
|
||||
compatible = "ti,omap4-smartreflex-core";
|
||||
reg = <0x4a0dd000 0x80>;
|
||||
interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
|
||||
ti,hwmods = "smartreflex_core";
|
||||
};
|
||||
|
||||
smartreflex_mpu: smartreflex@4a0d9000 {
|
||||
compatible = "ti,omap4-smartreflex-mpu";
|
||||
reg = <0x4a0d9000 0x80>;
|
||||
interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>;
|
||||
ti,hwmods = "smartreflex_mpu";
|
||||
};
|
||||
@ -130,9 +130,11 @@
|
||||
};
|
||||
};
|
||||
|
||||
pmu {
|
||||
pmu@4b000000 {
|
||||
compatible = "arm,cortex-a8-pmu";
|
||||
interrupts = <3>;
|
||||
reg = <0x4b000000 0x1000000>;
|
||||
ti,hwmods = "debugss";
|
||||
};
|
||||
|
||||
/*
|
||||
@ -929,6 +931,12 @@
|
||||
};
|
||||
};
|
||||
|
||||
emif: emif@4c000000 {
|
||||
compatible = "ti,emif-am3352";
|
||||
reg = <0x4c000000 0x1000000>;
|
||||
ti,hwmods = "emif";
|
||||
};
|
||||
|
||||
gpmc: gpmc@50000000 {
|
||||
compatible = "ti,am3352-gpmc";
|
||||
ti,hwmods = "gpmc";
|
||||
|
||||
@ -457,6 +457,7 @@
|
||||
#dma-cells = <1>;
|
||||
dma-channels = <32>;
|
||||
dma-requests = <127>;
|
||||
ti,hwmods = "dma_system";
|
||||
};
|
||||
|
||||
edma: edma@43300000 {
|
||||
@ -1069,6 +1070,13 @@
|
||||
max-frequency = <192000000>;
|
||||
};
|
||||
|
||||
hdqw1w: 1w@480b2000 {
|
||||
compatible = "ti,omap3-1w";
|
||||
reg = <0x480b2000 0x1000>;
|
||||
interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>;
|
||||
ti,hwmods = "hdq1w";
|
||||
};
|
||||
|
||||
mmc2: mmc@480b4000 {
|
||||
compatible = "ti,omap4-hsmmc";
|
||||
reg = <0x480b4000 0x400>;
|
||||
@ -1489,6 +1497,32 @@
|
||||
};
|
||||
};
|
||||
|
||||
target-module@4a0dd000 {
|
||||
compatible = "ti,sysc-omap4-sr";
|
||||
ti,hwmods = "smartreflex_core";
|
||||
reg = <0x4a0dd000 0x4>,
|
||||
<0x4a0dd008 0x4>;
|
||||
reg-names = "rev", "sysc";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges = <0 0x4a0dd000 0x001000>;
|
||||
|
||||
/* SmartReflex child device marked reserved in TRM */
|
||||
};
|
||||
|
||||
target-module@4a0d9000 {
|
||||
compatible = "ti,sysc-omap4-sr";
|
||||
ti,hwmods = "smartreflex_mpu";
|
||||
reg = <0x4a0d9000 0x4>,
|
||||
<0x4a0d9008 0x4>;
|
||||
reg-names = "rev", "sysc";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges = <0 0x4a0d9000 0x001000>;
|
||||
|
||||
/* SmartReflex child device marked reserved in TRM */
|
||||
};
|
||||
|
||||
omap_dwc3_1: omap_dwc3_1@48880000 {
|
||||
compatible = "ti,dwc3";
|
||||
ti,hwmods = "usb_otg_ss1";
|
||||
|
||||
@ -215,6 +215,7 @@
|
||||
#dma-cells = <1>;
|
||||
dma-channels = <32>;
|
||||
dma-requests = <96>;
|
||||
ti,hwmods = "dma";
|
||||
};
|
||||
|
||||
gpio1: gpio@48310000 {
|
||||
|
||||
@ -51,6 +51,17 @@
|
||||
};
|
||||
};
|
||||
|
||||
/*
|
||||
* Note that 4430 needs cross trigger interface (CTI) supported
|
||||
* before we can configure the interrupts. This means sampling
|
||||
* events are not supported for pmu. Note that 4460 does not use
|
||||
* CTI, see also 4460.dtsi.
|
||||
*/
|
||||
pmu {
|
||||
compatible = "arm,cortex-a9-pmu";
|
||||
ti,hwmods = "debugss";
|
||||
};
|
||||
|
||||
gic: interrupt-controller@48241000 {
|
||||
compatible = "arm,cortex-a9-gic";
|
||||
interrupt-controller;
|
||||
@ -163,6 +174,7 @@
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges = <0 0x2000 0x1000>;
|
||||
ti,hwmods = "ctrl_module_core";
|
||||
|
||||
scm_conf: scm_conf@0 {
|
||||
compatible = "syscon";
|
||||
@ -175,9 +187,11 @@
|
||||
omap4_padconf_core: scm@100000 {
|
||||
compatible = "ti,omap4-scm-padconf-core",
|
||||
"simple-bus";
|
||||
reg = <0x100000 0x1000>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges = <0 0x100000 0x1000>;
|
||||
ti,hwmods = "ctrl_module_pad_core";
|
||||
|
||||
omap4_pmx_core: pinmux@40 {
|
||||
compatible = "ti,omap4-padconf",
|
||||
@ -252,17 +266,33 @@
|
||||
};
|
||||
};
|
||||
|
||||
omap4_pmx_wkup: pinmux@1e040 {
|
||||
compatible = "ti,omap4-padconf",
|
||||
"pinctrl-single";
|
||||
reg = <0x1e040 0x0038>;
|
||||
omap4_scm_wkup: scm@c000 {
|
||||
compatible = "ti,omap4-scm-wkup";
|
||||
reg = <0xc000 0x1000>;
|
||||
ti,hwmods = "ctrl_module_wkup";
|
||||
};
|
||||
|
||||
omap4_padconf_wkup: padconf@1e000 {
|
||||
compatible = "ti,omap4-scm-padconf-wkup",
|
||||
"simple-bus";
|
||||
reg = <0x1e000 0x1000>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
#pinctrl-cells = <1>;
|
||||
#interrupt-cells = <1>;
|
||||
interrupt-controller;
|
||||
pinctrl-single,register-width = <16>;
|
||||
pinctrl-single,function-mask = <0x7fff>;
|
||||
#size-cells = <1>;
|
||||
ranges = <0 0x1e000 0x1000>;
|
||||
ti,hwmods = "ctrl_module_pad_wkup";
|
||||
|
||||
omap4_pmx_wkup: pinmux@40 {
|
||||
compatible = "ti,omap4-padconf",
|
||||
"pinctrl-single";
|
||||
reg = <0x40 0x0038>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
#pinctrl-cells = <1>;
|
||||
#interrupt-cells = <1>;
|
||||
interrupt-controller;
|
||||
pinctrl-single,register-width = <16>;
|
||||
pinctrl-single,function-mask = <0x7fff>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
@ -282,6 +312,7 @@
|
||||
#dma-cells = <1>;
|
||||
dma-channels = <32>;
|
||||
dma-requests = <127>;
|
||||
ti,hwmods = "dma_system";
|
||||
};
|
||||
|
||||
gpio1: gpio@4a310000 {
|
||||
@ -351,6 +382,19 @@
|
||||
#interrupt-cells = <2>;
|
||||
};
|
||||
|
||||
target-module@48076000 {
|
||||
compatible = "ti,sysc-omap4";
|
||||
ti,hwmods = "slimbus2";
|
||||
reg = <0x48076000 0x4>,
|
||||
<0x48076010 0x4>;
|
||||
reg-names = "rev", "sysc";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges = <0 0x48076000 0x001000>;
|
||||
|
||||
/* No child device binding or driver in mainline */
|
||||
};
|
||||
|
||||
elm: elm@48078000 {
|
||||
compatible = "ti,am3352-elm";
|
||||
reg = <0x48078000 0x2000>;
|
||||
@ -411,6 +455,57 @@
|
||||
clock-frequency = <48000000>;
|
||||
};
|
||||
|
||||
target-module@4a0db000 {
|
||||
compatible = "ti,sysc-sr";
|
||||
ti,hwmods = "smartreflex_iva";
|
||||
reg = <0x4a0db000 0x4>,
|
||||
<0x4a0db008 0x4>;
|
||||
reg-names = "rev", "sysc";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges = <0 0x4a0db000 0x001000>;
|
||||
|
||||
smartreflex_iva: smartreflex@0 {
|
||||
compatible = "ti,omap4-smartreflex-iva";
|
||||
reg = <0 0x80>;
|
||||
interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
|
||||
};
|
||||
};
|
||||
|
||||
target-module@4a0dd000 {
|
||||
compatible = "ti,sysc-sr";
|
||||
ti,hwmods = "smartreflex_core";
|
||||
reg = <0x4a0dd000 0x4>,
|
||||
<0x4a0dd008 0x4>;
|
||||
reg-names = "rev", "sysc";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges = <0 0x4a0dd000 0x001000>;
|
||||
|
||||
smartreflex_core: smartreflex@0 {
|
||||
compatible = "ti,omap4-smartreflex-core";
|
||||
reg = <0 0x80>;
|
||||
interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
|
||||
};
|
||||
};
|
||||
|
||||
target-module@4a0d9000 {
|
||||
compatible = "ti,sysc-sr";
|
||||
ti,hwmods = "smartreflex_mpu";
|
||||
reg = <0x4a0d9000 0x4>,
|
||||
<0x4a0d9008 0x4>;
|
||||
reg-names = "rev", "sysc";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges = <0 0x4a0d9000 0x001000>;
|
||||
|
||||
smartreflex_mpu: smartreflex@0 {
|
||||
compatible = "ti,omap4-smartreflex-mpu";
|
||||
reg = <0 0x80>;
|
||||
interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>;
|
||||
};
|
||||
};
|
||||
|
||||
hwspinlock: spinlock@4a0f6000 {
|
||||
compatible = "ti,omap4-hwspinlock";
|
||||
reg = <0x4a0f6000 0x1000>;
|
||||
@ -489,6 +584,13 @@
|
||||
dma-names = "tx0", "rx0", "tx1", "rx1";
|
||||
};
|
||||
|
||||
hdqw1w: 1w@480b2000 {
|
||||
compatible = "ti,omap3-1w";
|
||||
reg = <0x480b2000 0x1000>;
|
||||
interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>;
|
||||
ti,hwmods = "hdq1w";
|
||||
};
|
||||
|
||||
mcspi3: spi@480b8000 {
|
||||
compatible = "ti,omap4-mcspi";
|
||||
reg = <0x480b8000 0x200>;
|
||||
@ -565,6 +667,40 @@
|
||||
dma-names = "tx", "rx";
|
||||
};
|
||||
|
||||
hsi: hsi@4a058000 {
|
||||
compatible = "ti,omap4-hsi";
|
||||
reg = <0x4a058000 0x4000>,
|
||||
<0x4a05c000 0x1000>;
|
||||
reg-names = "sys", "gdd";
|
||||
ti,hwmods = "hsi";
|
||||
|
||||
clocks = <&hsi_fck>;
|
||||
clock-names = "hsi_fck";
|
||||
|
||||
interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "gdd_mpu";
|
||||
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges = <0 0x4a058000 0x4000>;
|
||||
|
||||
hsi_port1: hsi-port@2000 {
|
||||
compatible = "ti,omap4-hsi-port";
|
||||
reg = <0x2000 0x800>,
|
||||
<0x2800 0x800>;
|
||||
reg-names = "tx", "rx";
|
||||
interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
|
||||
};
|
||||
|
||||
hsi_port2: hsi-port@3000 {
|
||||
compatible = "ti,omap4-hsi-port";
|
||||
reg = <0x3000 0x800>,
|
||||
<0x3800 0x800>;
|
||||
reg-names = "tx", "rx";
|
||||
interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>;
|
||||
};
|
||||
};
|
||||
|
||||
mmu_dsp: mmu@4a066000 {
|
||||
compatible = "ti,omap4-iommu";
|
||||
reg = <0x4a066000 0x100>;
|
||||
@ -573,6 +709,19 @@
|
||||
#iommu-cells = <0>;
|
||||
};
|
||||
|
||||
target-module@52000000 {
|
||||
compatible = "ti,sysc-omap4";
|
||||
ti,hwmods = "iss";
|
||||
reg = <0x52000000 0x4>,
|
||||
<0x52000010 0x4>;
|
||||
reg-names = "rev", "sysc";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges = <0 0x52000000 0x1000000>;
|
||||
|
||||
/* No child device binding, driver in staging */
|
||||
};
|
||||
|
||||
mmu_ipu: mmu@55082000 {
|
||||
compatible = "ti,omap4-iommu";
|
||||
reg = <0x55082000 0x100>;
|
||||
@ -589,6 +738,14 @@
|
||||
ti,hwmods = "wd_timer2";
|
||||
};
|
||||
|
||||
wdt3: wdt@40130000 {
|
||||
compatible = "ti,omap4-wdt", "ti,omap3-wdt";
|
||||
reg = <0x40130000 0x80>, /* MPU private access */
|
||||
<0x49030000 0x80>; /* L3 Interconnect */
|
||||
interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
|
||||
ti,hwmods = "wd_timer3";
|
||||
};
|
||||
|
||||
mcpdm: mcpdm@40132000 {
|
||||
compatible = "ti,omap4-mcpdm";
|
||||
reg = <0x40132000 0x7f>, /* MPU private access */
|
||||
@ -659,6 +816,56 @@
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
target-module@40128000 {
|
||||
compatible = "ti,sysc-mcasp";
|
||||
ti,hwmods = "mcasp";
|
||||
reg = <0x40128004 0x4>;
|
||||
reg-names = "sysc";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges = <0x00000000 0x40128000 0x1000>, /* MPU */
|
||||
<0x49028000 0x49028000 0x1000>; /* L3 */
|
||||
|
||||
/*
|
||||
* Child device unsupported by davinci-mcasp. At least
|
||||
* TX path is disabled for omap4, and only DIT mode
|
||||
* works with no I2S. See also old Android kernel
|
||||
* omap-mcasp driver for more information.
|
||||
*/
|
||||
};
|
||||
|
||||
target-module@4012c000 {
|
||||
compatible = "ti,sysc-omap4";
|
||||
ti,hwmods = "slimbus1";
|
||||
reg = <0x4012c000 0x4>,
|
||||
<0x4012c010 0x4>;
|
||||
reg-names = "rev", "sysc";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges = <0x00000000 0x4012c000 0x1000>, /* MPU */
|
||||
<0x4902c000 0x4902c000 0x1000>; /* L3 */
|
||||
|
||||
/* No child device binding or driver in mainline */
|
||||
};
|
||||
|
||||
target-module@401f1000 {
|
||||
compatible = "ti,sysc-omap4";
|
||||
ti,hwmods = "aess";
|
||||
reg = <0x401f1000 0x4>,
|
||||
<0x401f1010 0x4>;
|
||||
reg-names = "rev", "sysc";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges = <0x00000000 0x401f1000 0x1000>, /* MPU */
|
||||
<0x490f1000 0x490f1000 0x1000>; /* L3 */
|
||||
|
||||
/*
|
||||
* No child device binding or driver in mainline.
|
||||
* See Android tree and related upstreaming efforts
|
||||
* for the old driver.
|
||||
*/
|
||||
};
|
||||
|
||||
mcbsp4: mcbsp@48096000 {
|
||||
compatible = "ti,omap4-mcbsp";
|
||||
reg = <0x48096000 0xff>; /* L4 Interconnect */
|
||||
@ -747,6 +954,19 @@
|
||||
};
|
||||
};
|
||||
|
||||
target-module@4a10a000 {
|
||||
compatible = "ti,sysc-omap4";
|
||||
ti,hwmods = "fdif";
|
||||
reg = <0x4a10a000 0x4>,
|
||||
<0x4a10a010 0x4>;
|
||||
reg-names = "rev", "sysc";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges = <0 0x4a10a000 0x1000>;
|
||||
|
||||
/* No child device binding or driver in mainline */
|
||||
};
|
||||
|
||||
timer1: timer@4a318000 {
|
||||
compatible = "ti,omap3430-timer";
|
||||
reg = <0x4a318000 0x80>;
|
||||
@ -962,6 +1182,22 @@
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
target-module@56000000 {
|
||||
compatible = "ti,sysc-omap4";
|
||||
ti,hwmods = "gpu";
|
||||
reg = <0x5601fc00 0x4>,
|
||||
<0x5601fc10 0x4>;
|
||||
reg-names = "rev", "sysc";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges = <0 0x56000000 0x2000000>;
|
||||
|
||||
/*
|
||||
* Closed source PowerVR driver, no child device
|
||||
* binding or driver in mainline
|
||||
*/
|
||||
};
|
||||
|
||||
dss: dss@58000000 {
|
||||
compatible = "ti,omap4-dss";
|
||||
reg = <0x58000000 0x80>;
|
||||
|
||||
@ -295,6 +295,7 @@
|
||||
#dma-cells = <1>;
|
||||
dma-channels = <32>;
|
||||
dma-requests = <127>;
|
||||
ti,hwmods = "dma_system";
|
||||
};
|
||||
|
||||
gpio1: gpio@4ae10000 {
|
||||
|
||||
@ -104,6 +104,7 @@ config ARCH_OMAP2PLUS
|
||||
select OMAP_GPMC
|
||||
select PINCTRL
|
||||
select SOC_BUS
|
||||
select TI_SYSC
|
||||
select OMAP_IRQCHIP
|
||||
select CLKSRC_TI_32K
|
||||
help
|
||||
|
||||
@ -198,15 +198,12 @@ obj-y += omap_hwmod_common_ipblock_data.o
|
||||
obj-$(CONFIG_SOC_OMAP2420) += omap_hwmod_2xxx_ipblock_data.o
|
||||
obj-$(CONFIG_SOC_OMAP2420) += omap_hwmod_2xxx_3xxx_ipblock_data.o
|
||||
obj-$(CONFIG_SOC_OMAP2420) += omap_hwmod_2xxx_interconnect_data.o
|
||||
obj-$(CONFIG_SOC_OMAP2420) += omap_hwmod_2xxx_3xxx_interconnect_data.o
|
||||
obj-$(CONFIG_SOC_OMAP2420) += omap_hwmod_2420_data.o
|
||||
obj-$(CONFIG_SOC_OMAP2430) += omap_hwmod_2xxx_ipblock_data.o
|
||||
obj-$(CONFIG_SOC_OMAP2430) += omap_hwmod_2xxx_3xxx_ipblock_data.o
|
||||
obj-$(CONFIG_SOC_OMAP2430) += omap_hwmod_2xxx_interconnect_data.o
|
||||
obj-$(CONFIG_SOC_OMAP2430) += omap_hwmod_2xxx_3xxx_interconnect_data.o
|
||||
obj-$(CONFIG_SOC_OMAP2430) += omap_hwmod_2430_data.o
|
||||
obj-$(CONFIG_ARCH_OMAP3) += omap_hwmod_2xxx_3xxx_ipblock_data.o
|
||||
obj-$(CONFIG_ARCH_OMAP3) += omap_hwmod_2xxx_3xxx_interconnect_data.o
|
||||
obj-$(CONFIG_ARCH_OMAP3) += omap_hwmod_3xxx_data.o
|
||||
obj-$(CONFIG_SOC_AM33XX) += omap_hwmod_33xx_data.o
|
||||
obj-$(CONFIG_SOC_AM33XX) += omap_hwmod_33xx_43xx_interconnect_data.o
|
||||
|
||||
@ -225,7 +225,6 @@ extern struct device *omap2_get_iva_device(void);
|
||||
extern struct device *omap2_get_l3_device(void);
|
||||
extern struct device *omap4_get_dsp_device(void);
|
||||
|
||||
unsigned int omap4_xlate_irq(unsigned int hwirq);
|
||||
void omap_gic_of_init(void);
|
||||
|
||||
#ifdef CONFIG_CACHE_L2X0
|
||||
|
||||
@ -299,30 +299,6 @@ static const struct of_device_id intc_match[] = {
|
||||
|
||||
static struct device_node *intc_node;
|
||||
|
||||
unsigned int omap4_xlate_irq(unsigned int hwirq)
|
||||
{
|
||||
struct of_phandle_args irq_data;
|
||||
unsigned int irq;
|
||||
|
||||
if (!intc_node)
|
||||
intc_node = of_find_matching_node(NULL, intc_match);
|
||||
|
||||
if (WARN_ON(!intc_node))
|
||||
return hwirq;
|
||||
|
||||
irq_data.np = intc_node;
|
||||
irq_data.args_count = 3;
|
||||
irq_data.args[0] = 0;
|
||||
irq_data.args[1] = hwirq - OMAP44XX_IRQ_GIC_START;
|
||||
irq_data.args[2] = IRQ_TYPE_LEVEL_HIGH;
|
||||
|
||||
irq = irq_create_of_mapping(&irq_data);
|
||||
if (WARN_ON(!irq))
|
||||
irq = hwirq;
|
||||
|
||||
return irq;
|
||||
}
|
||||
|
||||
void __init omap_gic_of_init(void)
|
||||
{
|
||||
struct device_node *np;
|
||||
|
||||
@ -35,6 +35,8 @@
|
||||
#include <linux/pm_domain.h>
|
||||
#include <linux/pm_runtime.h>
|
||||
#include <linux/of.h>
|
||||
#include <linux/of_address.h>
|
||||
#include <linux/of_irq.h>
|
||||
#include <linux/notifier.h>
|
||||
|
||||
#include "common.h"
|
||||
@ -308,88 +310,6 @@ int omap_device_get_context_loss_count(struct platform_device *pdev)
|
||||
return ret;
|
||||
}
|
||||
|
||||
/**
|
||||
* omap_device_count_resources - count number of struct resource entries needed
|
||||
* @od: struct omap_device *
|
||||
* @flags: Type of resources to include when counting (IRQ/DMA/MEM)
|
||||
*
|
||||
* Count the number of struct resource entries needed for this
|
||||
* omap_device @od. Used by omap_device_build_ss() to determine how
|
||||
* much memory to allocate before calling
|
||||
* omap_device_fill_resources(). Returns the count.
|
||||
*/
|
||||
static int omap_device_count_resources(struct omap_device *od,
|
||||
unsigned long flags)
|
||||
{
|
||||
int c = 0;
|
||||
int i;
|
||||
|
||||
for (i = 0; i < od->hwmods_cnt; i++)
|
||||
c += omap_hwmod_count_resources(od->hwmods[i], flags);
|
||||
|
||||
pr_debug("omap_device: %s: counted %d total resources across %d hwmods\n",
|
||||
od->pdev->name, c, od->hwmods_cnt);
|
||||
|
||||
return c;
|
||||
}
|
||||
|
||||
/**
|
||||
* omap_device_fill_resources - fill in array of struct resource
|
||||
* @od: struct omap_device *
|
||||
* @res: pointer to an array of struct resource to be filled in
|
||||
*
|
||||
* Populate one or more empty struct resource pointed to by @res with
|
||||
* the resource data for this omap_device @od. Used by
|
||||
* omap_device_build_ss() after calling omap_device_count_resources().
|
||||
* Ideally this function would not be needed at all. If omap_device
|
||||
* replaces platform_device, then we can specify our own
|
||||
* get_resource()/ get_irq()/etc functions that use the underlying
|
||||
* omap_hwmod information. Or if platform_device is extended to use
|
||||
* subarchitecture-specific function pointers, the various
|
||||
* platform_device functions can simply call omap_device internal
|
||||
* functions to get device resources. Hacking around the existing
|
||||
* platform_device code wastes memory. Returns 0.
|
||||
*/
|
||||
static int omap_device_fill_resources(struct omap_device *od,
|
||||
struct resource *res)
|
||||
{
|
||||
int i, r;
|
||||
|
||||
for (i = 0; i < od->hwmods_cnt; i++) {
|
||||
r = omap_hwmod_fill_resources(od->hwmods[i], res);
|
||||
res += r;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/**
|
||||
* _od_fill_dma_resources - fill in array of struct resource with dma resources
|
||||
* @od: struct omap_device *
|
||||
* @res: pointer to an array of struct resource to be filled in
|
||||
*
|
||||
* Populate one or more empty struct resource pointed to by @res with
|
||||
* the dma resource data for this omap_device @od. Used by
|
||||
* omap_device_alloc() after calling omap_device_count_resources().
|
||||
*
|
||||
* Ideally this function would not be needed at all. If we have
|
||||
* mechanism to get dma resources from DT.
|
||||
*
|
||||
* Returns 0.
|
||||
*/
|
||||
static int _od_fill_dma_resources(struct omap_device *od,
|
||||
struct resource *res)
|
||||
{
|
||||
int i, r;
|
||||
|
||||
for (i = 0; i < od->hwmods_cnt; i++) {
|
||||
r = omap_hwmod_fill_dma_resources(od->hwmods[i], res);
|
||||
res += r;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/**
|
||||
* omap_device_alloc - allocate an omap_device
|
||||
* @pdev: platform_device that will be included in this omap_device
|
||||
@ -407,8 +327,7 @@ struct omap_device *omap_device_alloc(struct platform_device *pdev,
|
||||
{
|
||||
int ret = -ENOMEM;
|
||||
struct omap_device *od;
|
||||
struct resource *res = NULL;
|
||||
int i, res_count;
|
||||
int i;
|
||||
struct omap_hwmod **hwmods;
|
||||
|
||||
od = kzalloc(sizeof(struct omap_device), GFP_KERNEL);
|
||||
@ -424,74 +343,6 @@ struct omap_device *omap_device_alloc(struct platform_device *pdev,
|
||||
|
||||
od->hwmods = hwmods;
|
||||
od->pdev = pdev;
|
||||
|
||||
/*
|
||||
* Non-DT Boot:
|
||||
* Here, pdev->num_resources = 0, and we should get all the
|
||||
* resources from hwmod.
|
||||
*
|
||||
* DT Boot:
|
||||
* OF framework will construct the resource structure (currently
|
||||
* does for MEM & IRQ resource) and we should respect/use these
|
||||
* resources, killing hwmod dependency.
|
||||
* If pdev->num_resources > 0, we assume that MEM & IRQ resources
|
||||
* have been allocated by OF layer already (through DTB).
|
||||
* As preparation for the future we examine the OF provided resources
|
||||
* to see if we have DMA resources provided already. In this case
|
||||
* there is no need to update the resources for the device, we use the
|
||||
* OF provided ones.
|
||||
*
|
||||
* TODO: Once DMA resource is available from OF layer, we should
|
||||
* kill filling any resources from hwmod.
|
||||
*/
|
||||
if (!pdev->num_resources) {
|
||||
/* Count all resources for the device */
|
||||
res_count = omap_device_count_resources(od, IORESOURCE_IRQ |
|
||||
IORESOURCE_DMA |
|
||||
IORESOURCE_MEM);
|
||||
} else {
|
||||
/* Take a look if we already have DMA resource via DT */
|
||||
for (i = 0; i < pdev->num_resources; i++) {
|
||||
struct resource *r = &pdev->resource[i];
|
||||
|
||||
/* We have it, no need to touch the resources */
|
||||
if (r->flags == IORESOURCE_DMA)
|
||||
goto have_everything;
|
||||
}
|
||||
/* Count only DMA resources for the device */
|
||||
res_count = omap_device_count_resources(od, IORESOURCE_DMA);
|
||||
/* The device has no DMA resource, no need for update */
|
||||
if (!res_count)
|
||||
goto have_everything;
|
||||
|
||||
res_count += pdev->num_resources;
|
||||
}
|
||||
|
||||
/* Allocate resources memory to account for new resources */
|
||||
res = kzalloc(sizeof(struct resource) * res_count, GFP_KERNEL);
|
||||
if (!res)
|
||||
goto oda_exit3;
|
||||
|
||||
if (!pdev->num_resources) {
|
||||
dev_dbg(&pdev->dev, "%s: using %d resources from hwmod\n",
|
||||
__func__, res_count);
|
||||
omap_device_fill_resources(od, res);
|
||||
} else {
|
||||
dev_dbg(&pdev->dev,
|
||||
"%s: appending %d DMA resources from hwmod\n",
|
||||
__func__, res_count - pdev->num_resources);
|
||||
memcpy(res, pdev->resource,
|
||||
sizeof(struct resource) * pdev->num_resources);
|
||||
_od_fill_dma_resources(od, &res[pdev->num_resources]);
|
||||
}
|
||||
|
||||
ret = platform_device_add_resources(pdev, res, res_count);
|
||||
kfree(res);
|
||||
|
||||
if (ret)
|
||||
goto oda_exit3;
|
||||
|
||||
have_everything:
|
||||
pdev->archdata.od = od;
|
||||
|
||||
for (i = 0; i < oh_cnt; i++) {
|
||||
@ -501,8 +352,6 @@ have_everything:
|
||||
|
||||
return od;
|
||||
|
||||
oda_exit3:
|
||||
kfree(hwmods);
|
||||
oda_exit2:
|
||||
kfree(od);
|
||||
oda_exit1:
|
||||
@ -521,6 +370,93 @@ void omap_device_delete(struct omap_device *od)
|
||||
kfree(od);
|
||||
}
|
||||
|
||||
/**
|
||||
* omap_device_copy_resources - Add legacy IO and IRQ resources
|
||||
* @oh: interconnect target module
|
||||
* @pdev: platform device to copy resources to
|
||||
*
|
||||
* We still have legacy DMA and smartreflex needing resources.
|
||||
* Let's populate what they need until we can eventually just
|
||||
* remove this function. Note that there should be no need to
|
||||
* call this from omap_device_build_from_dt(), nor should there
|
||||
* be any need to call it for other devices.
|
||||
*/
|
||||
static int
|
||||
omap_device_copy_resources(struct omap_hwmod *oh,
|
||||
struct platform_device *pdev)
|
||||
{
|
||||
struct device_node *np, *child;
|
||||
struct property *prop;
|
||||
struct resource *res;
|
||||
const char *name;
|
||||
int error, irq = 0;
|
||||
|
||||
if (!oh || !oh->od || !oh->od->pdev) {
|
||||
error = -EINVAL;
|
||||
goto error;
|
||||
}
|
||||
|
||||
np = oh->od->pdev->dev.of_node;
|
||||
if (!np) {
|
||||
error = -ENODEV;
|
||||
goto error;
|
||||
}
|
||||
|
||||
res = kzalloc(sizeof(*res) * 2, GFP_KERNEL);
|
||||
if (!res)
|
||||
return -ENOMEM;
|
||||
|
||||
/* Do we have a dts range for the interconnect target module? */
|
||||
error = omap_hwmod_parse_module_range(oh, np, res);
|
||||
|
||||
/* No ranges, rely on device reg entry */
|
||||
if (error)
|
||||
error = of_address_to_resource(np, 0, res);
|
||||
if (error)
|
||||
goto free;
|
||||
|
||||
/* SmartReflex needs first IO resource name to be "mpu" */
|
||||
res[0].name = "mpu";
|
||||
|
||||
/*
|
||||
* We may have a configured "ti,sysc" interconnect target with a
|
||||
* dts child with the interrupt. If so use the first child's
|
||||
* first interrupt for "ti-hwmods" legacy support.
|
||||
*/
|
||||
of_property_for_each_string(np, "compatible", prop, name)
|
||||
if (!strncmp("ti,sysc-", name, 8))
|
||||
break;
|
||||
|
||||
child = of_get_next_available_child(np, NULL);
|
||||
|
||||
if (name)
|
||||
irq = irq_of_parse_and_map(child, 0);
|
||||
if (!irq)
|
||||
irq = irq_of_parse_and_map(np, 0);
|
||||
if (!irq) {
|
||||
error = -EINVAL;
|
||||
goto free;
|
||||
}
|
||||
|
||||
/* Legacy DMA code needs interrupt name to be "0" */
|
||||
res[1].start = irq;
|
||||
res[1].end = irq;
|
||||
res[1].flags = IORESOURCE_IRQ;
|
||||
res[1].name = "0";
|
||||
|
||||
error = platform_device_add_resources(pdev, res, 2);
|
||||
|
||||
free:
|
||||
kfree(res);
|
||||
|
||||
error:
|
||||
WARN(error, "%s: %s device %s failed: %i\n",
|
||||
__func__, oh->name, dev_name(&pdev->dev),
|
||||
error);
|
||||
|
||||
return error;
|
||||
}
|
||||
|
||||
/**
|
||||
* omap_device_build - build and register an omap_device with one omap_hwmod
|
||||
* @pdev_name: name of the platform_device driver to use
|
||||
@ -539,46 +475,25 @@ struct platform_device __init *omap_device_build(const char *pdev_name,
|
||||
int pdev_id,
|
||||
struct omap_hwmod *oh,
|
||||
void *pdata, int pdata_len)
|
||||
{
|
||||
struct omap_hwmod *ohs[] = { oh };
|
||||
|
||||
if (!oh)
|
||||
return ERR_PTR(-EINVAL);
|
||||
|
||||
return omap_device_build_ss(pdev_name, pdev_id, ohs, 1, pdata,
|
||||
pdata_len);
|
||||
}
|
||||
|
||||
/**
|
||||
* omap_device_build_ss - build and register an omap_device with multiple hwmods
|
||||
* @pdev_name: name of the platform_device driver to use
|
||||
* @pdev_id: this platform_device's connection ID
|
||||
* @oh: ptr to the single omap_hwmod that backs this omap_device
|
||||
* @pdata: platform_data ptr to associate with the platform_device
|
||||
* @pdata_len: amount of memory pointed to by @pdata
|
||||
*
|
||||
* Convenience function for building and registering an omap_device
|
||||
* subsystem record. Subsystem records consist of multiple
|
||||
* omap_hwmods. This function in turn builds and registers a
|
||||
* platform_device record. Returns an ERR_PTR() on error, or passes
|
||||
* along the return value of omap_device_register().
|
||||
*/
|
||||
struct platform_device __init *omap_device_build_ss(const char *pdev_name,
|
||||
int pdev_id,
|
||||
struct omap_hwmod **ohs,
|
||||
int oh_cnt, void *pdata,
|
||||
int pdata_len)
|
||||
{
|
||||
int ret = -ENOMEM;
|
||||
struct platform_device *pdev;
|
||||
struct omap_device *od;
|
||||
|
||||
if (!ohs || oh_cnt == 0 || !pdev_name)
|
||||
if (!oh || !pdev_name)
|
||||
return ERR_PTR(-EINVAL);
|
||||
|
||||
if (!pdata && pdata_len > 0)
|
||||
return ERR_PTR(-EINVAL);
|
||||
|
||||
if (strncmp(oh->name, "smartreflex", 11) &&
|
||||
strncmp(oh->name, "dma", 3)) {
|
||||
pr_warn("%s need to update %s to probe with dt\na",
|
||||
__func__, pdev_name);
|
||||
ret = -ENODEV;
|
||||
goto odbs_exit;
|
||||
}
|
||||
|
||||
pdev = platform_device_alloc(pdev_name, pdev_id);
|
||||
if (!pdev) {
|
||||
ret = -ENOMEM;
|
||||
@ -591,7 +506,16 @@ struct platform_device __init *omap_device_build_ss(const char *pdev_name,
|
||||
else
|
||||
dev_set_name(&pdev->dev, "%s", pdev->name);
|
||||
|
||||
od = omap_device_alloc(pdev, ohs, oh_cnt);
|
||||
/*
|
||||
* Must be called before omap_device_alloc() as oh->od
|
||||
* only contains the currently registered omap_device
|
||||
* and will get overwritten by omap_device_alloc().
|
||||
*/
|
||||
ret = omap_device_copy_resources(oh, pdev);
|
||||
if (ret)
|
||||
goto odbs_exit1;
|
||||
|
||||
od = omap_device_alloc(pdev, &oh, 1);
|
||||
if (IS_ERR(od))
|
||||
goto odbs_exit1;
|
||||
|
||||
|
||||
@ -75,10 +75,6 @@ struct platform_device *omap_device_build(const char *pdev_name, int pdev_id,
|
||||
struct omap_hwmod *oh, void *pdata,
|
||||
int pdata_len);
|
||||
|
||||
struct platform_device *omap_device_build_ss(const char *pdev_name, int pdev_id,
|
||||
struct omap_hwmod **oh, int oh_cnt,
|
||||
void *pdata, int pdata_len);
|
||||
|
||||
struct omap_device *omap_device_alloc(struct platform_device *pdev,
|
||||
struct omap_hwmod **ohs, int oh_cnt);
|
||||
void omap_device_delete(struct omap_device *od);
|
||||
|
||||
@ -1101,215 +1101,6 @@ static int _omap4_wait_target_disable(struct omap_hwmod *oh)
|
||||
oh->prcm.omap4.clkctrl_offs, 0);
|
||||
}
|
||||
|
||||
/**
|
||||
* _count_mpu_irqs - count the number of MPU IRQ lines associated with @oh
|
||||
* @oh: struct omap_hwmod *oh
|
||||
*
|
||||
* Count and return the number of MPU IRQs associated with the hwmod
|
||||
* @oh. Used to allocate struct resource data. Returns 0 if @oh is
|
||||
* NULL.
|
||||
*/
|
||||
static int _count_mpu_irqs(struct omap_hwmod *oh)
|
||||
{
|
||||
struct omap_hwmod_irq_info *ohii;
|
||||
int i = 0;
|
||||
|
||||
if (!oh || !oh->mpu_irqs)
|
||||
return 0;
|
||||
|
||||
do {
|
||||
ohii = &oh->mpu_irqs[i++];
|
||||
} while (ohii->irq != -1);
|
||||
|
||||
return i-1;
|
||||
}
|
||||
|
||||
/**
|
||||
* _count_sdma_reqs - count the number of SDMA request lines associated with @oh
|
||||
* @oh: struct omap_hwmod *oh
|
||||
*
|
||||
* Count and return the number of SDMA request lines associated with
|
||||
* the hwmod @oh. Used to allocate struct resource data. Returns 0
|
||||
* if @oh is NULL.
|
||||
*/
|
||||
static int _count_sdma_reqs(struct omap_hwmod *oh)
|
||||
{
|
||||
struct omap_hwmod_dma_info *ohdi;
|
||||
int i = 0;
|
||||
|
||||
if (!oh || !oh->sdma_reqs)
|
||||
return 0;
|
||||
|
||||
do {
|
||||
ohdi = &oh->sdma_reqs[i++];
|
||||
} while (ohdi->dma_req != -1);
|
||||
|
||||
return i-1;
|
||||
}
|
||||
|
||||
/**
|
||||
* _count_ocp_if_addr_spaces - count the number of address space entries for @oh
|
||||
* @oh: struct omap_hwmod *oh
|
||||
*
|
||||
* Count and return the number of address space ranges associated with
|
||||
* the hwmod @oh. Used to allocate struct resource data. Returns 0
|
||||
* if @oh is NULL.
|
||||
*/
|
||||
static int _count_ocp_if_addr_spaces(struct omap_hwmod_ocp_if *os)
|
||||
{
|
||||
struct omap_hwmod_addr_space *mem;
|
||||
int i = 0;
|
||||
|
||||
if (!os || !os->addr)
|
||||
return 0;
|
||||
|
||||
do {
|
||||
mem = &os->addr[i++];
|
||||
} while (mem->pa_start != mem->pa_end);
|
||||
|
||||
return i-1;
|
||||
}
|
||||
|
||||
/**
|
||||
* _get_mpu_irq_by_name - fetch MPU interrupt line number by name
|
||||
* @oh: struct omap_hwmod * to operate on
|
||||
* @name: pointer to the name of the MPU interrupt number to fetch (optional)
|
||||
* @irq: pointer to an unsigned int to store the MPU IRQ number to
|
||||
*
|
||||
* Retrieve a MPU hardware IRQ line number named by @name associated
|
||||
* with the IP block pointed to by @oh. The IRQ number will be filled
|
||||
* into the address pointed to by @dma. When @name is non-null, the
|
||||
* IRQ line number associated with the named entry will be returned.
|
||||
* If @name is null, the first matching entry will be returned. Data
|
||||
* order is not meaningful in hwmod data, so callers are strongly
|
||||
* encouraged to use a non-null @name whenever possible to avoid
|
||||
* unpredictable effects if hwmod data is later added that causes data
|
||||
* ordering to change. Returns 0 upon success or a negative error
|
||||
* code upon error.
|
||||
*/
|
||||
static int _get_mpu_irq_by_name(struct omap_hwmod *oh, const char *name,
|
||||
unsigned int *irq)
|
||||
{
|
||||
int i;
|
||||
bool found = false;
|
||||
|
||||
if (!oh->mpu_irqs)
|
||||
return -ENOENT;
|
||||
|
||||
i = 0;
|
||||
while (oh->mpu_irqs[i].irq != -1) {
|
||||
if (name == oh->mpu_irqs[i].name ||
|
||||
!strcmp(name, oh->mpu_irqs[i].name)) {
|
||||
found = true;
|
||||
break;
|
||||
}
|
||||
i++;
|
||||
}
|
||||
|
||||
if (!found)
|
||||
return -ENOENT;
|
||||
|
||||
*irq = oh->mpu_irqs[i].irq;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/**
|
||||
* _get_sdma_req_by_name - fetch SDMA request line ID by name
|
||||
* @oh: struct omap_hwmod * to operate on
|
||||
* @name: pointer to the name of the SDMA request line to fetch (optional)
|
||||
* @dma: pointer to an unsigned int to store the request line ID to
|
||||
*
|
||||
* Retrieve an SDMA request line ID named by @name on the IP block
|
||||
* pointed to by @oh. The ID will be filled into the address pointed
|
||||
* to by @dma. When @name is non-null, the request line ID associated
|
||||
* with the named entry will be returned. If @name is null, the first
|
||||
* matching entry will be returned. Data order is not meaningful in
|
||||
* hwmod data, so callers are strongly encouraged to use a non-null
|
||||
* @name whenever possible to avoid unpredictable effects if hwmod
|
||||
* data is later added that causes data ordering to change. Returns 0
|
||||
* upon success or a negative error code upon error.
|
||||
*/
|
||||
static int _get_sdma_req_by_name(struct omap_hwmod *oh, const char *name,
|
||||
unsigned int *dma)
|
||||
{
|
||||
int i;
|
||||
bool found = false;
|
||||
|
||||
if (!oh->sdma_reqs)
|
||||
return -ENOENT;
|
||||
|
||||
i = 0;
|
||||
while (oh->sdma_reqs[i].dma_req != -1) {
|
||||
if (name == oh->sdma_reqs[i].name ||
|
||||
!strcmp(name, oh->sdma_reqs[i].name)) {
|
||||
found = true;
|
||||
break;
|
||||
}
|
||||
i++;
|
||||
}
|
||||
|
||||
if (!found)
|
||||
return -ENOENT;
|
||||
|
||||
*dma = oh->sdma_reqs[i].dma_req;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/**
|
||||
* _get_addr_space_by_name - fetch address space start & end by name
|
||||
* @oh: struct omap_hwmod * to operate on
|
||||
* @name: pointer to the name of the address space to fetch (optional)
|
||||
* @pa_start: pointer to a u32 to store the starting address to
|
||||
* @pa_end: pointer to a u32 to store the ending address to
|
||||
*
|
||||
* Retrieve address space start and end addresses for the IP block
|
||||
* pointed to by @oh. The data will be filled into the addresses
|
||||
* pointed to by @pa_start and @pa_end. When @name is non-null, the
|
||||
* address space data associated with the named entry will be
|
||||
* returned. If @name is null, the first matching entry will be
|
||||
* returned. Data order is not meaningful in hwmod data, so callers
|
||||
* are strongly encouraged to use a non-null @name whenever possible
|
||||
* to avoid unpredictable effects if hwmod data is later added that
|
||||
* causes data ordering to change. Returns 0 upon success or a
|
||||
* negative error code upon error.
|
||||
*/
|
||||
static int _get_addr_space_by_name(struct omap_hwmod *oh, const char *name,
|
||||
u32 *pa_start, u32 *pa_end)
|
||||
{
|
||||
int j;
|
||||
struct omap_hwmod_ocp_if *os;
|
||||
bool found = false;
|
||||
|
||||
list_for_each_entry(os, &oh->slave_ports, node) {
|
||||
|
||||
if (!os->addr)
|
||||
return -ENOENT;
|
||||
|
||||
j = 0;
|
||||
while (os->addr[j].pa_start != os->addr[j].pa_end) {
|
||||
if (name == os->addr[j].name ||
|
||||
!strcmp(name, os->addr[j].name)) {
|
||||
found = true;
|
||||
break;
|
||||
}
|
||||
j++;
|
||||
}
|
||||
|
||||
if (found)
|
||||
break;
|
||||
}
|
||||
|
||||
if (!found)
|
||||
return -ENOENT;
|
||||
|
||||
*pa_start = os->addr[j].pa_start;
|
||||
*pa_end = os->addr[j].pa_end;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/**
|
||||
* _save_mpu_port_index - find and save the index to @oh's MPU port
|
||||
* @oh: struct omap_hwmod *
|
||||
@ -1360,32 +1151,6 @@ static struct omap_hwmod_ocp_if *_find_mpu_rt_port(struct omap_hwmod *oh)
|
||||
return oh->_mpu_port;
|
||||
};
|
||||
|
||||
/**
|
||||
* _find_mpu_rt_addr_space - return MPU register target address space for @oh
|
||||
* @oh: struct omap_hwmod *
|
||||
*
|
||||
* Returns a pointer to the struct omap_hwmod_addr_space record representing
|
||||
* the register target MPU address space; or returns NULL upon error.
|
||||
*/
|
||||
static struct omap_hwmod_addr_space * __init _find_mpu_rt_addr_space(struct omap_hwmod *oh)
|
||||
{
|
||||
struct omap_hwmod_ocp_if *os;
|
||||
struct omap_hwmod_addr_space *mem;
|
||||
int found = 0, i = 0;
|
||||
|
||||
os = _find_mpu_rt_port(oh);
|
||||
if (!os || !os->addr)
|
||||
return NULL;
|
||||
|
||||
do {
|
||||
mem = &os->addr[i++];
|
||||
if (mem->flags & ADDR_TYPE_RT)
|
||||
found = 1;
|
||||
} while (!found && mem->pa_start != mem->pa_end);
|
||||
|
||||
return (found) ? mem : NULL;
|
||||
}
|
||||
|
||||
/**
|
||||
* _enable_sysc - try to bring a module out of idle via OCP_SYSCONFIG
|
||||
* @oh: struct omap_hwmod *
|
||||
@ -2393,6 +2158,75 @@ static int of_dev_hwmod_lookup(struct device_node *np,
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
/**
|
||||
* omap_hwmod_parse_module_range - map module IO range from device tree
|
||||
* @oh: struct omap_hwmod *
|
||||
* @np: struct device_node *
|
||||
*
|
||||
* Parse the device tree range an interconnect target module provides
|
||||
* for it's child device IP blocks. This way we can support the old
|
||||
* "ti,hwmods" property with just dts data without a need for platform
|
||||
* data for IO resources. And we don't need all the child IP device
|
||||
* nodes available in the dts.
|
||||
*/
|
||||
int omap_hwmod_parse_module_range(struct omap_hwmod *oh,
|
||||
struct device_node *np,
|
||||
struct resource *res)
|
||||
{
|
||||
struct property *prop;
|
||||
const __be32 *ranges;
|
||||
const char *name;
|
||||
u32 nr_addr, nr_size;
|
||||
u64 base, size;
|
||||
int len, error;
|
||||
|
||||
if (!res)
|
||||
return -EINVAL;
|
||||
|
||||
ranges = of_get_property(np, "ranges", &len);
|
||||
if (!ranges)
|
||||
return -ENOENT;
|
||||
|
||||
len /= sizeof(*ranges);
|
||||
|
||||
if (len < 3)
|
||||
return -EINVAL;
|
||||
|
||||
of_property_for_each_string(np, "compatible", prop, name)
|
||||
if (!strncmp("ti,sysc-", name, 8))
|
||||
break;
|
||||
|
||||
if (!name)
|
||||
return -ENOENT;
|
||||
|
||||
error = of_property_read_u32(np, "#address-cells", &nr_addr);
|
||||
if (error)
|
||||
return -ENOENT;
|
||||
|
||||
error = of_property_read_u32(np, "#size-cells", &nr_size);
|
||||
if (error)
|
||||
return -ENOENT;
|
||||
|
||||
if (nr_addr != 1 || nr_size != 1) {
|
||||
pr_err("%s: invalid range for %s->%s\n", __func__,
|
||||
oh->name, np->name);
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
ranges++;
|
||||
base = of_translate_address(np, ranges++);
|
||||
size = be32_to_cpup(ranges);
|
||||
|
||||
pr_debug("omap_hwmod: %s %s at 0x%llx size 0x%llx\n",
|
||||
oh->name, np->name, base, size);
|
||||
|
||||
res->start = base;
|
||||
res->end = base + size - 1;
|
||||
res->flags = IORESOURCE_MEM;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/**
|
||||
* _init_mpu_rt_base - populate the virtual address for a hwmod
|
||||
* @oh: struct omap_hwmod * to locate the virtual address
|
||||
@ -2413,8 +2247,9 @@ static int of_dev_hwmod_lookup(struct device_node *np,
|
||||
static int __init _init_mpu_rt_base(struct omap_hwmod *oh, void *data,
|
||||
int index, struct device_node *np)
|
||||
{
|
||||
struct omap_hwmod_addr_space *mem;
|
||||
void __iomem *va_start = NULL;
|
||||
struct resource res;
|
||||
int error;
|
||||
|
||||
if (!oh)
|
||||
return -EINVAL;
|
||||
@ -2429,28 +2264,22 @@ static int __init _init_mpu_rt_base(struct omap_hwmod *oh, void *data,
|
||||
if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
|
||||
return -ENXIO;
|
||||
|
||||
mem = _find_mpu_rt_addr_space(oh);
|
||||
if (!mem) {
|
||||
pr_debug("omap_hwmod: %s: no MPU register target found\n",
|
||||
oh->name);
|
||||
|
||||
/* Extract the IO space from device tree blob */
|
||||
if (!np) {
|
||||
pr_err("omap_hwmod: %s: no dt node\n", oh->name);
|
||||
return -ENXIO;
|
||||
}
|
||||
|
||||
va_start = of_iomap(np, index + oh->mpu_rt_idx);
|
||||
} else {
|
||||
va_start = ioremap(mem->pa_start, mem->pa_end - mem->pa_start);
|
||||
if (!np) {
|
||||
pr_err("omap_hwmod: %s: no dt node\n", oh->name);
|
||||
return -ENXIO;
|
||||
}
|
||||
|
||||
/* Do we have a dts range for the interconnect target module? */
|
||||
error = omap_hwmod_parse_module_range(oh, np, &res);
|
||||
if (!error)
|
||||
va_start = ioremap(res.start, resource_size(&res));
|
||||
|
||||
/* No ranges, rely on device reg entry */
|
||||
if (!va_start)
|
||||
va_start = of_iomap(np, index + oh->mpu_rt_idx);
|
||||
if (!va_start) {
|
||||
if (mem)
|
||||
pr_err("omap_hwmod: %s: Could not ioremap\n", oh->name);
|
||||
else
|
||||
pr_err("omap_hwmod: %s: Missing dt reg%i for %pOF\n",
|
||||
oh->name, index, np);
|
||||
pr_err("omap_hwmod: %s: Missing dt reg%i for %pOF\n",
|
||||
oh->name, index, np);
|
||||
return -ENXIO;
|
||||
}
|
||||
|
||||
@ -3354,189 +3183,6 @@ int omap_hwmod_shutdown(struct omap_hwmod *oh)
|
||||
* IP block data retrieval functions
|
||||
*/
|
||||
|
||||
/**
|
||||
* omap_hwmod_count_resources - count number of struct resources needed by hwmod
|
||||
* @oh: struct omap_hwmod *
|
||||
* @flags: Type of resources to include when counting (IRQ/DMA/MEM)
|
||||
*
|
||||
* Count the number of struct resource array elements necessary to
|
||||
* contain omap_hwmod @oh resources. Intended to be called by code
|
||||
* that registers omap_devices. Intended to be used to determine the
|
||||
* size of a dynamically-allocated struct resource array, before
|
||||
* calling omap_hwmod_fill_resources(). Returns the number of struct
|
||||
* resource array elements needed.
|
||||
*
|
||||
* XXX This code is not optimized. It could attempt to merge adjacent
|
||||
* resource IDs.
|
||||
*
|
||||
*/
|
||||
int omap_hwmod_count_resources(struct omap_hwmod *oh, unsigned long flags)
|
||||
{
|
||||
int ret = 0;
|
||||
|
||||
if (flags & IORESOURCE_IRQ)
|
||||
ret += _count_mpu_irqs(oh);
|
||||
|
||||
if (flags & IORESOURCE_DMA)
|
||||
ret += _count_sdma_reqs(oh);
|
||||
|
||||
if (flags & IORESOURCE_MEM) {
|
||||
struct omap_hwmod_ocp_if *os;
|
||||
|
||||
list_for_each_entry(os, &oh->slave_ports, node)
|
||||
ret += _count_ocp_if_addr_spaces(os);
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
/**
|
||||
* omap_hwmod_fill_resources - fill struct resource array with hwmod data
|
||||
* @oh: struct omap_hwmod *
|
||||
* @res: pointer to the first element of an array of struct resource to fill
|
||||
*
|
||||
* Fill the struct resource array @res with resource data from the
|
||||
* omap_hwmod @oh. Intended to be called by code that registers
|
||||
* omap_devices. See also omap_hwmod_count_resources(). Returns the
|
||||
* number of array elements filled.
|
||||
*/
|
||||
int omap_hwmod_fill_resources(struct omap_hwmod *oh, struct resource *res)
|
||||
{
|
||||
struct omap_hwmod_ocp_if *os;
|
||||
int i, j, mpu_irqs_cnt, sdma_reqs_cnt, addr_cnt;
|
||||
int r = 0;
|
||||
|
||||
/* For each IRQ, DMA, memory area, fill in array.*/
|
||||
|
||||
mpu_irqs_cnt = _count_mpu_irqs(oh);
|
||||
for (i = 0; i < mpu_irqs_cnt; i++) {
|
||||
unsigned int irq;
|
||||
|
||||
if (oh->xlate_irq)
|
||||
irq = oh->xlate_irq((oh->mpu_irqs + i)->irq);
|
||||
else
|
||||
irq = (oh->mpu_irqs + i)->irq;
|
||||
(res + r)->name = (oh->mpu_irqs + i)->name;
|
||||
(res + r)->start = irq;
|
||||
(res + r)->end = irq;
|
||||
(res + r)->flags = IORESOURCE_IRQ;
|
||||
r++;
|
||||
}
|
||||
|
||||
sdma_reqs_cnt = _count_sdma_reqs(oh);
|
||||
for (i = 0; i < sdma_reqs_cnt; i++) {
|
||||
(res + r)->name = (oh->sdma_reqs + i)->name;
|
||||
(res + r)->start = (oh->sdma_reqs + i)->dma_req;
|
||||
(res + r)->end = (oh->sdma_reqs + i)->dma_req;
|
||||
(res + r)->flags = IORESOURCE_DMA;
|
||||
r++;
|
||||
}
|
||||
|
||||
list_for_each_entry(os, &oh->slave_ports, node) {
|
||||
addr_cnt = _count_ocp_if_addr_spaces(os);
|
||||
|
||||
for (j = 0; j < addr_cnt; j++) {
|
||||
(res + r)->name = (os->addr + j)->name;
|
||||
(res + r)->start = (os->addr + j)->pa_start;
|
||||
(res + r)->end = (os->addr + j)->pa_end;
|
||||
(res + r)->flags = IORESOURCE_MEM;
|
||||
r++;
|
||||
}
|
||||
}
|
||||
|
||||
return r;
|
||||
}
|
||||
|
||||
/**
|
||||
* omap_hwmod_fill_dma_resources - fill struct resource array with dma data
|
||||
* @oh: struct omap_hwmod *
|
||||
* @res: pointer to the array of struct resource to fill
|
||||
*
|
||||
* Fill the struct resource array @res with dma resource data from the
|
||||
* omap_hwmod @oh. Intended to be called by code that registers
|
||||
* omap_devices. See also omap_hwmod_count_resources(). Returns the
|
||||
* number of array elements filled.
|
||||
*/
|
||||
int omap_hwmod_fill_dma_resources(struct omap_hwmod *oh, struct resource *res)
|
||||
{
|
||||
int i, sdma_reqs_cnt;
|
||||
int r = 0;
|
||||
|
||||
sdma_reqs_cnt = _count_sdma_reqs(oh);
|
||||
for (i = 0; i < sdma_reqs_cnt; i++) {
|
||||
(res + r)->name = (oh->sdma_reqs + i)->name;
|
||||
(res + r)->start = (oh->sdma_reqs + i)->dma_req;
|
||||
(res + r)->end = (oh->sdma_reqs + i)->dma_req;
|
||||
(res + r)->flags = IORESOURCE_DMA;
|
||||
r++;
|
||||
}
|
||||
|
||||
return r;
|
||||
}
|
||||
|
||||
/**
|
||||
* omap_hwmod_get_resource_byname - fetch IP block integration data by name
|
||||
* @oh: struct omap_hwmod * to operate on
|
||||
* @type: one of the IORESOURCE_* constants from include/linux/ioport.h
|
||||
* @name: pointer to the name of the data to fetch (optional)
|
||||
* @rsrc: pointer to a struct resource, allocated by the caller
|
||||
*
|
||||
* Retrieve MPU IRQ, SDMA request line, or address space start/end
|
||||
* data for the IP block pointed to by @oh. The data will be filled
|
||||
* into a struct resource record pointed to by @rsrc. The struct
|
||||
* resource must be allocated by the caller. When @name is non-null,
|
||||
* the data associated with the matching entry in the IRQ/SDMA/address
|
||||
* space hwmod data arrays will be returned. If @name is null, the
|
||||
* first array entry will be returned. Data order is not meaningful
|
||||
* in hwmod data, so callers are strongly encouraged to use a non-null
|
||||
* @name whenever possible to avoid unpredictable effects if hwmod
|
||||
* data is later added that causes data ordering to change. This
|
||||
* function is only intended for use by OMAP core code. Device
|
||||
* drivers should not call this function - the appropriate bus-related
|
||||
* data accessor functions should be used instead. Returns 0 upon
|
||||
* success or a negative error code upon error.
|
||||
*/
|
||||
int omap_hwmod_get_resource_byname(struct omap_hwmod *oh, unsigned int type,
|
||||
const char *name, struct resource *rsrc)
|
||||
{
|
||||
int r;
|
||||
unsigned int irq, dma;
|
||||
u32 pa_start, pa_end;
|
||||
|
||||
if (!oh || !rsrc)
|
||||
return -EINVAL;
|
||||
|
||||
if (type == IORESOURCE_IRQ) {
|
||||
r = _get_mpu_irq_by_name(oh, name, &irq);
|
||||
if (r)
|
||||
return r;
|
||||
|
||||
rsrc->start = irq;
|
||||
rsrc->end = irq;
|
||||
} else if (type == IORESOURCE_DMA) {
|
||||
r = _get_sdma_req_by_name(oh, name, &dma);
|
||||
if (r)
|
||||
return r;
|
||||
|
||||
rsrc->start = dma;
|
||||
rsrc->end = dma;
|
||||
} else if (type == IORESOURCE_MEM) {
|
||||
r = _get_addr_space_by_name(oh, name, &pa_start, &pa_end);
|
||||
if (r)
|
||||
return r;
|
||||
|
||||
rsrc->start = pa_start;
|
||||
rsrc->end = pa_end;
|
||||
} else {
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
rsrc->flags = type;
|
||||
rsrc->name = name;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/**
|
||||
* omap_hwmod_get_pwrdm - return pointer to this module's main powerdomain
|
||||
* @oh: struct omap_hwmod *
|
||||
|
||||
@ -149,34 +149,6 @@ extern struct omap_hwmod_sysc_fields omap_hwmod_sysc_type3;
|
||||
#define DEBUG_AM33XXUART1_FLAGS DEBUG_OMAPUART_FLAGS
|
||||
#endif
|
||||
|
||||
/**
|
||||
* struct omap_hwmod_irq_info - MPU IRQs used by the hwmod
|
||||
* @name: name of the IRQ channel (module local name)
|
||||
* @irq: IRQ channel ID (should be non-negative except -1 = terminator)
|
||||
*
|
||||
* @name should be something short, e.g., "tx" or "rx". It is for use
|
||||
* by platform_get_resource_byname(). It is defined locally to the
|
||||
* hwmod.
|
||||
*/
|
||||
struct omap_hwmod_irq_info {
|
||||
const char *name;
|
||||
s16 irq;
|
||||
};
|
||||
|
||||
/**
|
||||
* struct omap_hwmod_dma_info - DMA channels used by the hwmod
|
||||
* @name: name of the DMA channel (module local name)
|
||||
* @dma_req: DMA request ID (should be non-negative except -1 = terminator)
|
||||
*
|
||||
* @name should be something short, e.g., "tx" or "rx". It is for use
|
||||
* by platform_get_resource_byname(). It is defined locally to the
|
||||
* hwmod.
|
||||
*/
|
||||
struct omap_hwmod_dma_info {
|
||||
const char *name;
|
||||
s16 dma_req;
|
||||
};
|
||||
|
||||
/**
|
||||
* struct omap_hwmod_rst_info - IPs reset lines use by hwmod
|
||||
* @name: name of the reset line (module local name)
|
||||
@ -226,34 +198,6 @@ struct omap_hwmod_omap2_firewall {
|
||||
u8 flags;
|
||||
};
|
||||
|
||||
|
||||
/*
|
||||
* omap_hwmod_addr_space.flags bits
|
||||
*
|
||||
* ADDR_MAP_ON_INIT: Map this address space during omap_hwmod init.
|
||||
* ADDR_TYPE_RT: Address space contains module register target data.
|
||||
*/
|
||||
#define ADDR_MAP_ON_INIT (1 << 0) /* XXX does not belong */
|
||||
#define ADDR_TYPE_RT (1 << 1)
|
||||
|
||||
/**
|
||||
* struct omap_hwmod_addr_space - address space handled by the hwmod
|
||||
* @name: name of the address space
|
||||
* @pa_start: starting physical address
|
||||
* @pa_end: ending physical address
|
||||
* @flags: (see omap_hwmod_addr_space.flags macros above)
|
||||
*
|
||||
* Address space doesn't necessarily follow physical interconnect
|
||||
* structure. GPMC is one example.
|
||||
*/
|
||||
struct omap_hwmod_addr_space {
|
||||
const char *name;
|
||||
u32 pa_start;
|
||||
u32 pa_end;
|
||||
u8 flags;
|
||||
};
|
||||
|
||||
|
||||
/*
|
||||
* omap_hwmod_ocp_if.user bits: these indicate the initiators that use this
|
||||
* interface to interact with the hwmod. Used to add sleep dependencies
|
||||
@ -612,8 +556,6 @@ struct omap_hwmod_class {
|
||||
* @name: name of the hwmod
|
||||
* @class: struct omap_hwmod_class * to the class of this hwmod
|
||||
* @od: struct omap_device currently associated with this hwmod (internal use)
|
||||
* @mpu_irqs: ptr to an array of MPU IRQs
|
||||
* @sdma_reqs: ptr to an array of System DMA request IDs
|
||||
* @prcm: PRCM data pertaining to this hwmod
|
||||
* @main_clk: main clock: OMAP clock name
|
||||
* @_clk: pointer to the main struct clk (filled in at runtime)
|
||||
@ -656,8 +598,6 @@ struct omap_hwmod {
|
||||
const char *name;
|
||||
struct omap_hwmod_class *class;
|
||||
struct omap_device *od;
|
||||
struct omap_hwmod_irq_info *mpu_irqs;
|
||||
struct omap_hwmod_dma_info *sdma_reqs;
|
||||
struct omap_hwmod_rst_info *rst_lines;
|
||||
union {
|
||||
struct omap_hwmod_omap2_prcm omap2;
|
||||
@ -676,7 +616,6 @@ struct omap_hwmod {
|
||||
struct lock_class_key hwmod_key; /* unique lock class */
|
||||
struct list_head node;
|
||||
struct omap_hwmod_ocp_if *_mpu_port;
|
||||
unsigned int (*xlate_irq)(unsigned int);
|
||||
u32 flags;
|
||||
u8 mpu_rt_idx;
|
||||
u8 response_lat;
|
||||
@ -690,11 +629,16 @@ struct omap_hwmod {
|
||||
struct omap_hwmod *parent_hwmod;
|
||||
};
|
||||
|
||||
struct device_node;
|
||||
|
||||
struct omap_hwmod *omap_hwmod_lookup(const char *name);
|
||||
int omap_hwmod_for_each(int (*fn)(struct omap_hwmod *oh, void *data),
|
||||
void *data);
|
||||
|
||||
int __init omap_hwmod_setup_one(const char *name);
|
||||
int omap_hwmod_parse_module_range(struct omap_hwmod *oh,
|
||||
struct device_node *np,
|
||||
struct resource *res);
|
||||
|
||||
int omap_hwmod_enable(struct omap_hwmod *oh);
|
||||
int omap_hwmod_idle(struct omap_hwmod *oh);
|
||||
@ -709,7 +653,6 @@ int omap_hwmod_softreset(struct omap_hwmod *oh);
|
||||
|
||||
int omap_hwmod_count_resources(struct omap_hwmod *oh, unsigned long flags);
|
||||
int omap_hwmod_fill_resources(struct omap_hwmod *oh, struct resource *res);
|
||||
int omap_hwmod_fill_dma_resources(struct omap_hwmod *oh, struct resource *res);
|
||||
int omap_hwmod_get_resource_byname(struct omap_hwmod *oh, unsigned int type,
|
||||
const char *name, struct resource *res);
|
||||
|
||||
|
||||
@ -155,7 +155,6 @@ static struct omap_dma_dev_attr dma_dev_attr = {
|
||||
static struct omap_hwmod omap2420_dma_system_hwmod = {
|
||||
.name = "dma",
|
||||
.class = &omap2xxx_dma_hwmod_class,
|
||||
.mpu_irqs = omap2_dma_system_irqs,
|
||||
.main_clk = "core_l3_ck",
|
||||
.dev_attr = &dma_dev_attr,
|
||||
.flags = HWMOD_NO_IDLEST,
|
||||
@ -371,7 +370,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_core__dma_system = {
|
||||
.master = &omap2xxx_l4_core_hwmod,
|
||||
.slave = &omap2420_dma_system_hwmod,
|
||||
.clk = "sdma_ick",
|
||||
.addr = omap2_dma_system_addrs,
|
||||
.user = OCP_USER_MPU | OCP_USER_SDMA,
|
||||
};
|
||||
|
||||
|
||||
@ -153,7 +153,6 @@ static struct omap_dma_dev_attr dma_dev_attr = {
|
||||
static struct omap_hwmod omap2430_dma_system_hwmod = {
|
||||
.name = "dma",
|
||||
.class = &omap2xxx_dma_hwmod_class,
|
||||
.mpu_irqs = omap2_dma_system_irqs,
|
||||
.main_clk = "core_l3_ck",
|
||||
.dev_attr = &dma_dev_attr,
|
||||
.flags = HWMOD_NO_IDLEST,
|
||||
@ -572,7 +571,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__dma_system = {
|
||||
.master = &omap2xxx_l4_core_hwmod,
|
||||
.slave = &omap2430_dma_system_hwmod,
|
||||
.clk = "sdma_ick",
|
||||
.addr = omap2_dma_system_addrs,
|
||||
.user = OCP_USER_MPU | OCP_USER_SDMA,
|
||||
};
|
||||
|
||||
|
||||
@ -1,27 +0,0 @@
|
||||
/*
|
||||
* omap_hwmod_2xxx_3xxx_interconnect_data.c - common interconnect data, OMAP2/3
|
||||
*
|
||||
* Copyright (C) 2009-2011 Nokia Corporation
|
||||
* Paul Walmsley
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*
|
||||
* XXX handle crossbar/shared link difference for L3?
|
||||
* XXX these should be marked initdata for multi-OMAP kernels
|
||||
*/
|
||||
#include <asm/sizes.h>
|
||||
|
||||
#include "omap_hwmod.h"
|
||||
|
||||
#include "omap_hwmod_common_data.h"
|
||||
|
||||
struct omap_hwmod_addr_space omap2_dma_system_addrs[] = {
|
||||
{
|
||||
.pa_start = 0x48056000,
|
||||
.pa_end = 0x48056000 + SZ_4K - 1,
|
||||
.flags = ADDR_TYPE_RT,
|
||||
},
|
||||
{ },
|
||||
};
|
||||
@ -65,21 +65,6 @@ struct omap_hwmod_class iva_hwmod_class = {
|
||||
.name = "iva",
|
||||
};
|
||||
|
||||
/* Common MPU IRQ line data */
|
||||
|
||||
struct omap_hwmod_irq_info omap2_dispc_irqs[] = {
|
||||
{ .irq = 25 + OMAP_INTC_START, },
|
||||
{ .irq = -1, },
|
||||
};
|
||||
|
||||
struct omap_hwmod_irq_info omap2_dma_system_irqs[] = {
|
||||
{ .name = "0", .irq = 12 + OMAP_INTC_START, }, /* INT_24XX_SDMA_IRQ0 */
|
||||
{ .name = "1", .irq = 13 + OMAP_INTC_START, }, /* INT_24XX_SDMA_IRQ1 */
|
||||
{ .name = "2", .irq = 14 + OMAP_INTC_START, }, /* INT_24XX_SDMA_IRQ2 */
|
||||
{ .name = "3", .irq = 15 + OMAP_INTC_START, }, /* INT_24XX_SDMA_IRQ3 */
|
||||
{ .irq = -1, },
|
||||
};
|
||||
|
||||
struct omap_hwmod_class_sysconfig omap2_hdq1w_sysc = {
|
||||
.rev_offs = 0x0,
|
||||
.sysc_offs = 0x14,
|
||||
|
||||
@ -20,11 +20,6 @@
|
||||
#include "prm-regbits-24xx.h"
|
||||
#include "wd_timer.h"
|
||||
|
||||
static struct omap_hwmod_dma_info omap2xxx_dss_sdma_chs[] = {
|
||||
{ .name = "dispc", .dma_req = 5 },
|
||||
{ .dma_req = -1, },
|
||||
};
|
||||
|
||||
/*
|
||||
* 'dispc' class
|
||||
* display controller
|
||||
@ -550,7 +545,6 @@ struct omap_hwmod omap2xxx_dss_core_hwmod = {
|
||||
.name = "dss_core",
|
||||
.class = &omap2_dss_hwmod_class,
|
||||
.main_clk = "dss1_fck", /* instead of dss_fck */
|
||||
.sdma_reqs = omap2xxx_dss_sdma_chs,
|
||||
.prcm = {
|
||||
.omap2 = {
|
||||
.prcm_reg_id = 1,
|
||||
|
||||
@ -159,54 +159,24 @@ struct omap_hwmod_ocp_if am33xx_l4_ls__elm = {
|
||||
.user = OCP_USER_MPU,
|
||||
};
|
||||
|
||||
static struct omap_hwmod_addr_space am33xx_epwmss0_addr_space[] = {
|
||||
{
|
||||
.pa_start = 0x48300000,
|
||||
.pa_end = 0x48300000 + SZ_16 - 1,
|
||||
.flags = ADDR_TYPE_RT
|
||||
},
|
||||
{ }
|
||||
};
|
||||
|
||||
struct omap_hwmod_ocp_if am33xx_l4_ls__epwmss0 = {
|
||||
.master = &am33xx_l4_ls_hwmod,
|
||||
.slave = &am33xx_epwmss0_hwmod,
|
||||
.clk = "l4ls_gclk",
|
||||
.addr = am33xx_epwmss0_addr_space,
|
||||
.user = OCP_USER_MPU,
|
||||
};
|
||||
|
||||
static struct omap_hwmod_addr_space am33xx_epwmss1_addr_space[] = {
|
||||
{
|
||||
.pa_start = 0x48302000,
|
||||
.pa_end = 0x48302000 + SZ_16 - 1,
|
||||
.flags = ADDR_TYPE_RT
|
||||
},
|
||||
{ }
|
||||
};
|
||||
|
||||
struct omap_hwmod_ocp_if am33xx_l4_ls__epwmss1 = {
|
||||
.master = &am33xx_l4_ls_hwmod,
|
||||
.slave = &am33xx_epwmss1_hwmod,
|
||||
.clk = "l4ls_gclk",
|
||||
.addr = am33xx_epwmss1_addr_space,
|
||||
.user = OCP_USER_MPU,
|
||||
};
|
||||
|
||||
static struct omap_hwmod_addr_space am33xx_epwmss2_addr_space[] = {
|
||||
{
|
||||
.pa_start = 0x48304000,
|
||||
.pa_end = 0x48304000 + SZ_16 - 1,
|
||||
.flags = ADDR_TYPE_RT
|
||||
},
|
||||
{ }
|
||||
};
|
||||
|
||||
struct omap_hwmod_ocp_if am33xx_l4_ls__epwmss2 = {
|
||||
.master = &am33xx_l4_ls_hwmod,
|
||||
.slave = &am33xx_epwmss2_hwmod,
|
||||
.clk = "l4ls_gclk",
|
||||
.addr = am33xx_epwmss2_addr_space,
|
||||
.user = OCP_USER_MPU,
|
||||
};
|
||||
|
||||
@ -250,38 +220,18 @@ struct omap_hwmod_ocp_if am33xx_l4_ls__spinlock = {
|
||||
};
|
||||
|
||||
/* l4 ls -> mcasp0 */
|
||||
static struct omap_hwmod_addr_space am33xx_mcasp0_addr_space[] = {
|
||||
{
|
||||
.pa_start = 0x48038000,
|
||||
.pa_end = 0x48038000 + SZ_8K - 1,
|
||||
.flags = ADDR_TYPE_RT
|
||||
},
|
||||
{ }
|
||||
};
|
||||
|
||||
struct omap_hwmod_ocp_if am33xx_l4_ls__mcasp0 = {
|
||||
.master = &am33xx_l4_ls_hwmod,
|
||||
.slave = &am33xx_mcasp0_hwmod,
|
||||
.clk = "l4ls_gclk",
|
||||
.addr = am33xx_mcasp0_addr_space,
|
||||
.user = OCP_USER_MPU,
|
||||
};
|
||||
|
||||
/* l4 ls -> mcasp1 */
|
||||
static struct omap_hwmod_addr_space am33xx_mcasp1_addr_space[] = {
|
||||
{
|
||||
.pa_start = 0x4803C000,
|
||||
.pa_end = 0x4803C000 + SZ_8K - 1,
|
||||
.flags = ADDR_TYPE_RT
|
||||
},
|
||||
{ }
|
||||
};
|
||||
|
||||
struct omap_hwmod_ocp_if am33xx_l4_ls__mcasp1 = {
|
||||
.master = &am33xx_l4_ls_hwmod,
|
||||
.slave = &am33xx_mcasp1_hwmod,
|
||||
.clk = "l4ls_gclk",
|
||||
.addr = am33xx_mcasp1_addr_space,
|
||||
.user = OCP_USER_MPU,
|
||||
};
|
||||
|
||||
@ -382,56 +332,26 @@ struct omap_hwmod_ocp_if am33xx_l3_main__tpcc = {
|
||||
};
|
||||
|
||||
/* l3 main -> tpcc0 */
|
||||
static struct omap_hwmod_addr_space am33xx_tptc0_addr_space[] = {
|
||||
{
|
||||
.pa_start = 0x49800000,
|
||||
.pa_end = 0x49800000 + SZ_8K - 1,
|
||||
.flags = ADDR_TYPE_RT,
|
||||
},
|
||||
{ }
|
||||
};
|
||||
|
||||
struct omap_hwmod_ocp_if am33xx_l3_main__tptc0 = {
|
||||
.master = &am33xx_l3_main_hwmod,
|
||||
.slave = &am33xx_tptc0_hwmod,
|
||||
.clk = "l3_gclk",
|
||||
.addr = am33xx_tptc0_addr_space,
|
||||
.user = OCP_USER_MPU,
|
||||
};
|
||||
|
||||
/* l3 main -> tpcc1 */
|
||||
static struct omap_hwmod_addr_space am33xx_tptc1_addr_space[] = {
|
||||
{
|
||||
.pa_start = 0x49900000,
|
||||
.pa_end = 0x49900000 + SZ_8K - 1,
|
||||
.flags = ADDR_TYPE_RT,
|
||||
},
|
||||
{ }
|
||||
};
|
||||
|
||||
struct omap_hwmod_ocp_if am33xx_l3_main__tptc1 = {
|
||||
.master = &am33xx_l3_main_hwmod,
|
||||
.slave = &am33xx_tptc1_hwmod,
|
||||
.clk = "l3_gclk",
|
||||
.addr = am33xx_tptc1_addr_space,
|
||||
.user = OCP_USER_MPU,
|
||||
};
|
||||
|
||||
/* l3 main -> tpcc2 */
|
||||
static struct omap_hwmod_addr_space am33xx_tptc2_addr_space[] = {
|
||||
{
|
||||
.pa_start = 0x49a00000,
|
||||
.pa_end = 0x49a00000 + SZ_8K - 1,
|
||||
.flags = ADDR_TYPE_RT,
|
||||
},
|
||||
{ }
|
||||
};
|
||||
|
||||
struct omap_hwmod_ocp_if am33xx_l3_main__tptc2 = {
|
||||
.master = &am33xx_l3_main_hwmod,
|
||||
.slave = &am33xx_tptc2_hwmod,
|
||||
.clk = "l3_gclk",
|
||||
.addr = am33xx_tptc2_addr_space,
|
||||
.user = OCP_USER_MPU,
|
||||
};
|
||||
|
||||
@ -483,38 +403,18 @@ struct omap_hwmod_ocp_if am33xx_l3_main__ocmc = {
|
||||
};
|
||||
|
||||
/* l3 main -> sha0 HIB2 */
|
||||
static struct omap_hwmod_addr_space am33xx_sha0_addrs[] = {
|
||||
{
|
||||
.pa_start = 0x53100000,
|
||||
.pa_end = 0x53100000 + SZ_512 - 1,
|
||||
.flags = ADDR_TYPE_RT
|
||||
},
|
||||
{ }
|
||||
};
|
||||
|
||||
struct omap_hwmod_ocp_if am33xx_l3_main__sha0 = {
|
||||
.master = &am33xx_l3_main_hwmod,
|
||||
.slave = &am33xx_sha0_hwmod,
|
||||
.clk = "sha0_fck",
|
||||
.addr = am33xx_sha0_addrs,
|
||||
.user = OCP_USER_MPU | OCP_USER_SDMA,
|
||||
};
|
||||
|
||||
/* l3 main -> AES0 HIB2 */
|
||||
static struct omap_hwmod_addr_space am33xx_aes0_addrs[] = {
|
||||
{
|
||||
.pa_start = 0x53500000,
|
||||
.pa_end = 0x53500000 + SZ_1M - 1,
|
||||
.flags = ADDR_TYPE_RT
|
||||
},
|
||||
{ }
|
||||
};
|
||||
|
||||
struct omap_hwmod_ocp_if am33xx_l3_main__aes0 = {
|
||||
.master = &am33xx_l3_main_hwmod,
|
||||
.slave = &am33xx_aes0_hwmod,
|
||||
.clk = "aes0_fck",
|
||||
.addr = am33xx_aes0_addrs,
|
||||
.user = OCP_USER_MPU | OCP_USER_SDMA,
|
||||
};
|
||||
|
||||
|
||||
@ -320,20 +320,11 @@ static struct omap_hwmod am33xx_usbss_hwmod = {
|
||||
* Interfaces
|
||||
*/
|
||||
|
||||
static struct omap_hwmod_addr_space am33xx_emif_addrs[] = {
|
||||
{
|
||||
.pa_start = 0x4c000000,
|
||||
.pa_end = 0x4c000fff,
|
||||
.flags = ADDR_TYPE_RT
|
||||
},
|
||||
{ }
|
||||
};
|
||||
/* l3 main -> emif */
|
||||
static struct omap_hwmod_ocp_if am33xx_l3_main__emif = {
|
||||
.master = &am33xx_l3_main_hwmod,
|
||||
.slave = &am33xx_emif_hwmod,
|
||||
.clk = "dpll_core_m4_ck",
|
||||
.addr = am33xx_emif_addrs,
|
||||
.user = OCP_USER_MPU | OCP_USER_SDMA,
|
||||
};
|
||||
|
||||
@ -370,20 +361,10 @@ static struct omap_hwmod_ocp_if am33xx_l4_hs__pruss = {
|
||||
};
|
||||
|
||||
/* l3_main -> debugss */
|
||||
static struct omap_hwmod_addr_space am33xx_debugss_addrs[] = {
|
||||
{
|
||||
.pa_start = 0x4b000000,
|
||||
.pa_end = 0x4b000000 + SZ_16M - 1,
|
||||
.flags = ADDR_TYPE_RT
|
||||
},
|
||||
{ }
|
||||
};
|
||||
|
||||
static struct omap_hwmod_ocp_if am33xx_l3_main__debugss = {
|
||||
.master = &am33xx_l3_main_hwmod,
|
||||
.slave = &am33xx_debugss_hwmod,
|
||||
.clk = "dpll_core_m4_ck",
|
||||
.addr = am33xx_debugss_addrs,
|
||||
.user = OCP_USER_MPU,
|
||||
};
|
||||
|
||||
@ -428,20 +409,10 @@ static struct omap_hwmod_ocp_if am33xx_l4_wkup__gpio0 = {
|
||||
};
|
||||
|
||||
/* L4 WKUP -> ADC_TSC */
|
||||
static struct omap_hwmod_addr_space am33xx_adc_tsc_addrs[] = {
|
||||
{
|
||||
.pa_start = 0x44E0D000,
|
||||
.pa_end = 0x44E0D000 + SZ_8K - 1,
|
||||
.flags = ADDR_TYPE_RT
|
||||
},
|
||||
{ }
|
||||
};
|
||||
|
||||
static struct omap_hwmod_ocp_if am33xx_l4_wkup__adc_tsc = {
|
||||
.master = &am33xx_l4_wkup_hwmod,
|
||||
.slave = &am33xx_adc_tsc_hwmod,
|
||||
.clk = "dpll_core_m4_div2_ck",
|
||||
.addr = am33xx_adc_tsc_addrs,
|
||||
.user = OCP_USER_MPU,
|
||||
};
|
||||
|
||||
@ -452,20 +423,10 @@ static struct omap_hwmod_ocp_if am33xx_l4_hs__cpgmac0 = {
|
||||
.user = OCP_USER_MPU,
|
||||
};
|
||||
|
||||
static struct omap_hwmod_addr_space am33xx_lcdc_addr_space[] = {
|
||||
{
|
||||
.pa_start = 0x4830E000,
|
||||
.pa_end = 0x4830E000 + SZ_8K - 1,
|
||||
.flags = ADDR_TYPE_RT,
|
||||
},
|
||||
{ }
|
||||
};
|
||||
|
||||
static struct omap_hwmod_ocp_if am33xx_l3_main__lcdc = {
|
||||
.master = &am33xx_l3_main_hwmod,
|
||||
.slave = &am33xx_lcdc_hwmod,
|
||||
.clk = "dpll_core_m4_ck",
|
||||
.addr = am33xx_lcdc_addr_space,
|
||||
.user = OCP_USER_MPU,
|
||||
};
|
||||
|
||||
|
||||
@ -565,12 +565,6 @@ static struct omap_hwmod_class i2c_class = {
|
||||
.reset = &omap_i2c_reset,
|
||||
};
|
||||
|
||||
static struct omap_hwmod_dma_info omap3xxx_dss_sdma_chs[] = {
|
||||
{ .name = "dispc", .dma_req = 5 },
|
||||
{ .name = "dsi1", .dma_req = 74 },
|
||||
{ .dma_req = -1, },
|
||||
};
|
||||
|
||||
/* dss */
|
||||
static struct omap_hwmod_opt_clk dss_opt_clks[] = {
|
||||
/*
|
||||
@ -587,7 +581,6 @@ static struct omap_hwmod omap3430es1_dss_core_hwmod = {
|
||||
.name = "dss_core",
|
||||
.class = &omap2_dss_hwmod_class,
|
||||
.main_clk = "dss1_alwon_fck", /* instead of dss_fck */
|
||||
.sdma_reqs = omap3xxx_dss_sdma_chs,
|
||||
.prcm = {
|
||||
.omap2 = {
|
||||
.prcm_reg_id = 1,
|
||||
@ -607,7 +600,6 @@ static struct omap_hwmod omap3xxx_dss_core_hwmod = {
|
||||
.flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
|
||||
.class = &omap2_dss_hwmod_class,
|
||||
.main_clk = "dss1_alwon_fck", /* instead of dss_fck */
|
||||
.sdma_reqs = omap3xxx_dss_sdma_chs,
|
||||
.prcm = {
|
||||
.omap2 = {
|
||||
.prcm_reg_id = 1,
|
||||
@ -647,7 +639,6 @@ static struct omap_hwmod_class omap3_dispc_hwmod_class = {
|
||||
static struct omap_hwmod omap3xxx_dss_dispc_hwmod = {
|
||||
.name = "dss_dispc",
|
||||
.class = &omap3_dispc_hwmod_class,
|
||||
.mpu_irqs = omap2_dispc_irqs,
|
||||
.main_clk = "dss1_alwon_fck",
|
||||
.prcm = {
|
||||
.omap2 = {
|
||||
@ -1017,7 +1008,6 @@ static struct omap_hwmod_class omap3xxx_dma_hwmod_class = {
|
||||
static struct omap_hwmod omap3xxx_dma_system_hwmod = {
|
||||
.name = "dma",
|
||||
.class = &omap3xxx_dma_hwmod_class,
|
||||
.mpu_irqs = omap2_dma_system_irqs,
|
||||
.main_clk = "core_l3_ick",
|
||||
.prcm = {
|
||||
.omap2 = {
|
||||
@ -2108,20 +2098,10 @@ static struct omap_hwmod_ocp_if omap3_l4_core__i2c3 = {
|
||||
};
|
||||
|
||||
/* L4 CORE -> SR1 interface */
|
||||
static struct omap_hwmod_addr_space omap3_sr1_addr_space[] = {
|
||||
{
|
||||
.pa_start = OMAP34XX_SR1_BASE,
|
||||
.pa_end = OMAP34XX_SR1_BASE + SZ_1K - 1,
|
||||
.flags = ADDR_TYPE_RT,
|
||||
},
|
||||
{ },
|
||||
};
|
||||
|
||||
static struct omap_hwmod_ocp_if omap34xx_l4_core__sr1 = {
|
||||
.master = &omap3xxx_l4_core_hwmod,
|
||||
.slave = &omap34xx_sr1_hwmod,
|
||||
.clk = "sr_l4_ick",
|
||||
.addr = omap3_sr1_addr_space,
|
||||
.user = OCP_USER_MPU,
|
||||
};
|
||||
|
||||
@ -2129,25 +2109,15 @@ static struct omap_hwmod_ocp_if omap36xx_l4_core__sr1 = {
|
||||
.master = &omap3xxx_l4_core_hwmod,
|
||||
.slave = &omap36xx_sr1_hwmod,
|
||||
.clk = "sr_l4_ick",
|
||||
.addr = omap3_sr1_addr_space,
|
||||
.user = OCP_USER_MPU,
|
||||
};
|
||||
|
||||
/* L4 CORE -> SR1 interface */
|
||||
static struct omap_hwmod_addr_space omap3_sr2_addr_space[] = {
|
||||
{
|
||||
.pa_start = OMAP34XX_SR2_BASE,
|
||||
.pa_end = OMAP34XX_SR2_BASE + SZ_1K - 1,
|
||||
.flags = ADDR_TYPE_RT,
|
||||
},
|
||||
{ },
|
||||
};
|
||||
/* L4 CORE -> SR2 interface */
|
||||
|
||||
static struct omap_hwmod_ocp_if omap34xx_l4_core__sr2 = {
|
||||
.master = &omap3xxx_l4_core_hwmod,
|
||||
.slave = &omap34xx_sr2_hwmod,
|
||||
.clk = "sr_l4_ick",
|
||||
.addr = omap3_sr2_addr_space,
|
||||
.user = OCP_USER_MPU,
|
||||
};
|
||||
|
||||
@ -2155,7 +2125,6 @@ static struct omap_hwmod_ocp_if omap36xx_l4_core__sr2 = {
|
||||
.master = &omap3xxx_l4_core_hwmod,
|
||||
.slave = &omap36xx_sr2_hwmod,
|
||||
.clk = "sr_l4_ick",
|
||||
.addr = omap3_sr2_addr_space,
|
||||
.user = OCP_USER_MPU,
|
||||
};
|
||||
|
||||
@ -2524,21 +2493,11 @@ static struct omap_hwmod_ocp_if omap3xxx_dma_system__l3 = {
|
||||
.user = OCP_USER_MPU | OCP_USER_SDMA,
|
||||
};
|
||||
|
||||
static struct omap_hwmod_addr_space omap3xxx_dma_system_addrs[] = {
|
||||
{
|
||||
.pa_start = 0x48056000,
|
||||
.pa_end = 0x48056fff,
|
||||
.flags = ADDR_TYPE_RT,
|
||||
},
|
||||
{ },
|
||||
};
|
||||
|
||||
/* l4_cfg -> dma_system */
|
||||
static struct omap_hwmod_ocp_if omap3xxx_l4_core__dma_system = {
|
||||
.master = &omap3xxx_l4_core_hwmod,
|
||||
.slave = &omap3xxx_dma_system_hwmod,
|
||||
.clk = "core_l4_ick",
|
||||
.addr = omap3xxx_dma_system_addrs,
|
||||
.user = OCP_USER_MPU | OCP_USER_SDMA,
|
||||
};
|
||||
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
@ -275,20 +275,10 @@ static struct omap_dma_dev_attr dma_dev_attr = {
|
||||
};
|
||||
|
||||
/* dma_system */
|
||||
static struct omap_hwmod_irq_info omap54xx_dma_system_irqs[] = {
|
||||
{ .name = "0", .irq = 12 + OMAP54XX_IRQ_GIC_START },
|
||||
{ .name = "1", .irq = 13 + OMAP54XX_IRQ_GIC_START },
|
||||
{ .name = "2", .irq = 14 + OMAP54XX_IRQ_GIC_START },
|
||||
{ .name = "3", .irq = 15 + OMAP54XX_IRQ_GIC_START },
|
||||
{ .irq = -1 }
|
||||
};
|
||||
|
||||
static struct omap_hwmod omap54xx_dma_system_hwmod = {
|
||||
.name = "dma_system",
|
||||
.class = &omap54xx_dma_hwmod_class,
|
||||
.clkdm_name = "dma_clkdm",
|
||||
.mpu_irqs = omap54xx_dma_system_irqs,
|
||||
.xlate_irq = omap4_xlate_irq,
|
||||
.main_clk = "l3_iclk_div",
|
||||
.prcm = {
|
||||
.omap4 = {
|
||||
@ -2255,21 +2245,11 @@ static struct omap_hwmod_ocp_if omap54xx_l4_wkup__counter_32k = {
|
||||
.user = OCP_USER_MPU | OCP_USER_SDMA,
|
||||
};
|
||||
|
||||
static struct omap_hwmod_addr_space omap54xx_dma_system_addrs[] = {
|
||||
{
|
||||
.pa_start = 0x4a056000,
|
||||
.pa_end = 0x4a056fff,
|
||||
.flags = ADDR_TYPE_RT
|
||||
},
|
||||
{ }
|
||||
};
|
||||
|
||||
/* l4_cfg -> dma_system */
|
||||
static struct omap_hwmod_ocp_if omap54xx_l4_cfg__dma_system = {
|
||||
.master = &omap54xx_l4_cfg_hwmod,
|
||||
.slave = &omap54xx_dma_system_hwmod,
|
||||
.clk = "l4_root_clk_div",
|
||||
.addr = omap54xx_dma_system_addrs,
|
||||
.user = OCP_USER_MPU | OCP_USER_SDMA,
|
||||
};
|
||||
|
||||
|
||||
@ -572,11 +572,6 @@ static struct omap_hwmod_class dra7xx_dss_hwmod_class = {
|
||||
};
|
||||
|
||||
/* dss */
|
||||
static struct omap_hwmod_dma_info dra7xx_dss_sdma_reqs[] = {
|
||||
{ .dma_req = 75 + DRA7XX_DMA_REQ_START },
|
||||
{ .dma_req = -1 }
|
||||
};
|
||||
|
||||
static struct omap_hwmod_opt_clk dss_opt_clks[] = {
|
||||
{ .role = "dss_clk", .clk = "dss_dss_clk" },
|
||||
{ .role = "hdmi_phy_clk", .clk = "dss_48mhz_clk" },
|
||||
@ -592,7 +587,6 @@ static struct omap_hwmod dra7xx_dss_hwmod = {
|
||||
.class = &dra7xx_dss_hwmod_class,
|
||||
.clkdm_name = "dss_clkdm",
|
||||
.flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
|
||||
.sdma_reqs = dra7xx_dss_sdma_reqs,
|
||||
.main_clk = "dss_dss_clk",
|
||||
.prcm = {
|
||||
.omap4 = {
|
||||
@ -2995,21 +2989,11 @@ static struct omap_hwmod_ocp_if dra7xx_l4_per2__dcan2 = {
|
||||
.user = OCP_USER_MPU | OCP_USER_SDMA,
|
||||
};
|
||||
|
||||
static struct omap_hwmod_addr_space dra7xx_dma_system_addrs[] = {
|
||||
{
|
||||
.pa_start = 0x4a056000,
|
||||
.pa_end = 0x4a056fff,
|
||||
.flags = ADDR_TYPE_RT
|
||||
},
|
||||
{ }
|
||||
};
|
||||
|
||||
/* l4_cfg -> dma_system */
|
||||
static struct omap_hwmod_ocp_if dra7xx_l4_cfg__dma_system = {
|
||||
.master = &dra7xx_l4_cfg_hwmod,
|
||||
.slave = &dra7xx_dma_system_hwmod,
|
||||
.clk = "l3_iclk_div",
|
||||
.addr = dra7xx_dma_system_addrs,
|
||||
.user = OCP_USER_MPU | OCP_USER_SDMA,
|
||||
};
|
||||
|
||||
@ -3253,21 +3237,11 @@ static struct omap_hwmod_ocp_if dra7xx_l3_main_1__gpmc = {
|
||||
.user = OCP_USER_MPU | OCP_USER_SDMA,
|
||||
};
|
||||
|
||||
static struct omap_hwmod_addr_space dra7xx_hdq1w_addrs[] = {
|
||||
{
|
||||
.pa_start = 0x480b2000,
|
||||
.pa_end = 0x480b201f,
|
||||
.flags = ADDR_TYPE_RT
|
||||
},
|
||||
{ }
|
||||
};
|
||||
|
||||
/* l4_per1 -> hdq1w */
|
||||
static struct omap_hwmod_ocp_if dra7xx_l4_per1__hdq1w = {
|
||||
.master = &dra7xx_l4_per1_hwmod,
|
||||
.slave = &dra7xx_hdq1w_hwmod,
|
||||
.clk = "l3_iclk_div",
|
||||
.addr = dra7xx_hdq1w_addrs,
|
||||
.user = OCP_USER_MPU | OCP_USER_SDMA,
|
||||
};
|
||||
|
||||
@ -3551,58 +3525,27 @@ static struct omap_hwmod_ocp_if dra7xx_l4_per3__rtcss = {
|
||||
.user = OCP_USER_MPU | OCP_USER_SDMA,
|
||||
};
|
||||
|
||||
static struct omap_hwmod_addr_space dra7xx_sata_addrs[] = {
|
||||
{
|
||||
.name = "sysc",
|
||||
.pa_start = 0x4a141100,
|
||||
.pa_end = 0x4a141107,
|
||||
.flags = ADDR_TYPE_RT
|
||||
},
|
||||
{ }
|
||||
};
|
||||
|
||||
/* l4_cfg -> sata */
|
||||
static struct omap_hwmod_ocp_if dra7xx_l4_cfg__sata = {
|
||||
.master = &dra7xx_l4_cfg_hwmod,
|
||||
.slave = &dra7xx_sata_hwmod,
|
||||
.clk = "l3_iclk_div",
|
||||
.addr = dra7xx_sata_addrs,
|
||||
.user = OCP_USER_MPU | OCP_USER_SDMA,
|
||||
};
|
||||
|
||||
static struct omap_hwmod_addr_space dra7xx_smartreflex_core_addrs[] = {
|
||||
{
|
||||
.pa_start = 0x4a0dd000,
|
||||
.pa_end = 0x4a0dd07f,
|
||||
.flags = ADDR_TYPE_RT
|
||||
},
|
||||
{ }
|
||||
};
|
||||
|
||||
/* l4_cfg -> smartreflex_core */
|
||||
static struct omap_hwmod_ocp_if dra7xx_l4_cfg__smartreflex_core = {
|
||||
.master = &dra7xx_l4_cfg_hwmod,
|
||||
.slave = &dra7xx_smartreflex_core_hwmod,
|
||||
.clk = "l4_root_clk_div",
|
||||
.addr = dra7xx_smartreflex_core_addrs,
|
||||
.user = OCP_USER_MPU | OCP_USER_SDMA,
|
||||
};
|
||||
|
||||
static struct omap_hwmod_addr_space dra7xx_smartreflex_mpu_addrs[] = {
|
||||
{
|
||||
.pa_start = 0x4a0d9000,
|
||||
.pa_end = 0x4a0d907f,
|
||||
.flags = ADDR_TYPE_RT
|
||||
},
|
||||
{ }
|
||||
};
|
||||
|
||||
/* l4_cfg -> smartreflex_mpu */
|
||||
static struct omap_hwmod_ocp_if dra7xx_l4_cfg__smartreflex_mpu = {
|
||||
.master = &dra7xx_l4_cfg_hwmod,
|
||||
.slave = &dra7xx_smartreflex_mpu_hwmod,
|
||||
.clk = "l4_root_clk_div",
|
||||
.addr = dra7xx_smartreflex_mpu_addrs,
|
||||
.user = OCP_USER_MPU | OCP_USER_SDMA,
|
||||
};
|
||||
|
||||
|
||||
@ -1260,15 +1260,6 @@ static struct omap_hwmod_ocp_if dm81xx_alwon_l3_fast__tpcc = {
|
||||
.user = OCP_USER_MPU,
|
||||
};
|
||||
|
||||
static struct omap_hwmod_addr_space dm81xx_tptc0_addr_space[] = {
|
||||
{
|
||||
.pa_start = 0x49800000,
|
||||
.pa_end = 0x49800000 + SZ_8K - 1,
|
||||
.flags = ADDR_TYPE_RT,
|
||||
},
|
||||
{ },
|
||||
};
|
||||
|
||||
static struct omap_hwmod_class dm81xx_tptc0_hwmod_class = {
|
||||
.name = "tptc0",
|
||||
};
|
||||
@ -1290,7 +1281,6 @@ static struct omap_hwmod_ocp_if dm81xx_alwon_l3_fast__tptc0 = {
|
||||
.master = &dm81xx_alwon_l3_fast_hwmod,
|
||||
.slave = &dm81xx_tptc0_hwmod,
|
||||
.clk = "sysclk4_ck",
|
||||
.addr = dm81xx_tptc0_addr_space,
|
||||
.user = OCP_USER_MPU,
|
||||
};
|
||||
|
||||
@ -1298,19 +1288,9 @@ static struct omap_hwmod_ocp_if dm81xx_tptc0__alwon_l3_fast = {
|
||||
.master = &dm81xx_tptc0_hwmod,
|
||||
.slave = &dm81xx_alwon_l3_fast_hwmod,
|
||||
.clk = "sysclk4_ck",
|
||||
.addr = dm81xx_tptc0_addr_space,
|
||||
.user = OCP_USER_MPU,
|
||||
};
|
||||
|
||||
static struct omap_hwmod_addr_space dm81xx_tptc1_addr_space[] = {
|
||||
{
|
||||
.pa_start = 0x49900000,
|
||||
.pa_end = 0x49900000 + SZ_8K - 1,
|
||||
.flags = ADDR_TYPE_RT,
|
||||
},
|
||||
{ },
|
||||
};
|
||||
|
||||
static struct omap_hwmod_class dm81xx_tptc1_hwmod_class = {
|
||||
.name = "tptc1",
|
||||
};
|
||||
@ -1332,7 +1312,6 @@ static struct omap_hwmod_ocp_if dm81xx_alwon_l3_fast__tptc1 = {
|
||||
.master = &dm81xx_alwon_l3_fast_hwmod,
|
||||
.slave = &dm81xx_tptc1_hwmod,
|
||||
.clk = "sysclk4_ck",
|
||||
.addr = dm81xx_tptc1_addr_space,
|
||||
.user = OCP_USER_MPU,
|
||||
};
|
||||
|
||||
@ -1340,19 +1319,9 @@ static struct omap_hwmod_ocp_if dm81xx_tptc1__alwon_l3_fast = {
|
||||
.master = &dm81xx_tptc1_hwmod,
|
||||
.slave = &dm81xx_alwon_l3_fast_hwmod,
|
||||
.clk = "sysclk4_ck",
|
||||
.addr = dm81xx_tptc1_addr_space,
|
||||
.user = OCP_USER_MPU,
|
||||
};
|
||||
|
||||
static struct omap_hwmod_addr_space dm81xx_tptc2_addr_space[] = {
|
||||
{
|
||||
.pa_start = 0x49a00000,
|
||||
.pa_end = 0x49a00000 + SZ_8K - 1,
|
||||
.flags = ADDR_TYPE_RT,
|
||||
},
|
||||
{ },
|
||||
};
|
||||
|
||||
static struct omap_hwmod_class dm81xx_tptc2_hwmod_class = {
|
||||
.name = "tptc2",
|
||||
};
|
||||
@ -1374,7 +1343,6 @@ static struct omap_hwmod_ocp_if dm81xx_alwon_l3_fast__tptc2 = {
|
||||
.master = &dm81xx_alwon_l3_fast_hwmod,
|
||||
.slave = &dm81xx_tptc2_hwmod,
|
||||
.clk = "sysclk4_ck",
|
||||
.addr = dm81xx_tptc2_addr_space,
|
||||
.user = OCP_USER_MPU,
|
||||
};
|
||||
|
||||
@ -1382,19 +1350,9 @@ static struct omap_hwmod_ocp_if dm81xx_tptc2__alwon_l3_fast = {
|
||||
.master = &dm81xx_tptc2_hwmod,
|
||||
.slave = &dm81xx_alwon_l3_fast_hwmod,
|
||||
.clk = "sysclk4_ck",
|
||||
.addr = dm81xx_tptc2_addr_space,
|
||||
.user = OCP_USER_MPU,
|
||||
};
|
||||
|
||||
static struct omap_hwmod_addr_space dm81xx_tptc3_addr_space[] = {
|
||||
{
|
||||
.pa_start = 0x49b00000,
|
||||
.pa_end = 0x49b00000 + SZ_8K - 1,
|
||||
.flags = ADDR_TYPE_RT,
|
||||
},
|
||||
{ },
|
||||
};
|
||||
|
||||
static struct omap_hwmod_class dm81xx_tptc3_hwmod_class = {
|
||||
.name = "tptc3",
|
||||
};
|
||||
@ -1416,7 +1374,6 @@ static struct omap_hwmod_ocp_if dm81xx_alwon_l3_fast__tptc3 = {
|
||||
.master = &dm81xx_alwon_l3_fast_hwmod,
|
||||
.slave = &dm81xx_tptc3_hwmod,
|
||||
.clk = "sysclk4_ck",
|
||||
.addr = dm81xx_tptc3_addr_space,
|
||||
.user = OCP_USER_MPU,
|
||||
};
|
||||
|
||||
@ -1424,7 +1381,6 @@ static struct omap_hwmod_ocp_if dm81xx_tptc3__alwon_l3_fast = {
|
||||
.master = &dm81xx_tptc3_hwmod,
|
||||
.slave = &dm81xx_alwon_l3_fast_hwmod,
|
||||
.clk = "sysclk4_ck",
|
||||
.addr = dm81xx_tptc3_addr_space,
|
||||
.user = OCP_USER_MPU,
|
||||
};
|
||||
|
||||
|
||||
@ -18,9 +18,6 @@
|
||||
#include "common.h"
|
||||
#include "display.h"
|
||||
|
||||
/* Common address space across OMAP2xxx/3xxx */
|
||||
extern struct omap_hwmod_addr_space omap2_dma_system_addrs[];
|
||||
|
||||
/* Common IP block data across OMAP2xxx */
|
||||
extern struct omap_gpio_dev_attr omap2xxx_gpio_dev_attr;
|
||||
extern struct omap_hwmod omap2xxx_l3_main_hwmod;
|
||||
@ -89,44 +86,6 @@ extern struct omap_hwmod_ocp_if omap2xxx_l4_core__rng;
|
||||
extern struct omap_hwmod_ocp_if omap2xxx_l4_core__sham;
|
||||
extern struct omap_hwmod_ocp_if omap2xxx_l4_core__aes;
|
||||
|
||||
/* Common IP block data */
|
||||
extern struct omap_hwmod_dma_info omap2_uart1_sdma_reqs[];
|
||||
extern struct omap_hwmod_dma_info omap2_uart2_sdma_reqs[];
|
||||
extern struct omap_hwmod_dma_info omap2_uart3_sdma_reqs[];
|
||||
extern struct omap_hwmod_dma_info omap2_i2c1_sdma_reqs[];
|
||||
extern struct omap_hwmod_dma_info omap2_i2c2_sdma_reqs[];
|
||||
extern struct omap_hwmod_dma_info omap2_mcspi1_sdma_reqs[];
|
||||
extern struct omap_hwmod_dma_info omap2_mcspi2_sdma_reqs[];
|
||||
extern struct omap_hwmod_dma_info omap2_mcbsp1_sdma_reqs[];
|
||||
extern struct omap_hwmod_dma_info omap2_mcbsp2_sdma_reqs[];
|
||||
|
||||
/* Common IP block data on OMAP2430/OMAP3 */
|
||||
extern struct omap_hwmod_dma_info omap2_mcbsp3_sdma_reqs[];
|
||||
|
||||
/* Common IP block data across OMAP2/3 */
|
||||
extern struct omap_hwmod_irq_info omap2_timer1_mpu_irqs[];
|
||||
extern struct omap_hwmod_irq_info omap2_timer2_mpu_irqs[];
|
||||
extern struct omap_hwmod_irq_info omap2_timer3_mpu_irqs[];
|
||||
extern struct omap_hwmod_irq_info omap2_timer4_mpu_irqs[];
|
||||
extern struct omap_hwmod_irq_info omap2_timer5_mpu_irqs[];
|
||||
extern struct omap_hwmod_irq_info omap2_timer6_mpu_irqs[];
|
||||
extern struct omap_hwmod_irq_info omap2_timer7_mpu_irqs[];
|
||||
extern struct omap_hwmod_irq_info omap2_timer8_mpu_irqs[];
|
||||
extern struct omap_hwmod_irq_info omap2_timer9_mpu_irqs[];
|
||||
extern struct omap_hwmod_irq_info omap2_timer10_mpu_irqs[];
|
||||
extern struct omap_hwmod_irq_info omap2_timer11_mpu_irqs[];
|
||||
extern struct omap_hwmod_irq_info omap2_uart1_mpu_irqs[];
|
||||
extern struct omap_hwmod_irq_info omap2_uart2_mpu_irqs[];
|
||||
extern struct omap_hwmod_irq_info omap2_uart3_mpu_irqs[];
|
||||
extern struct omap_hwmod_irq_info omap2_dispc_irqs[];
|
||||
extern struct omap_hwmod_irq_info omap2_i2c1_mpu_irqs[];
|
||||
extern struct omap_hwmod_irq_info omap2_i2c2_mpu_irqs[];
|
||||
extern struct omap_hwmod_irq_info omap2_dma_system_irqs[];
|
||||
extern struct omap_hwmod_irq_info omap2_mcspi1_mpu_irqs[];
|
||||
extern struct omap_hwmod_irq_info omap2_mcspi2_mpu_irqs[];
|
||||
extern struct omap_hwmod_addr_space omap2xxx_timer12_addrs[];
|
||||
extern struct omap_hwmod_irq_info omap2_hdq1w_mpu_irqs[];
|
||||
|
||||
/* OMAP hwmod classes - forward declarations */
|
||||
extern struct omap_hwmod_class l3_hwmod_class;
|
||||
extern struct omap_hwmod_class l4_hwmod_class;
|
||||
|
||||
@ -506,7 +506,6 @@ struct omap_prcm_irq_setup {
|
||||
u8 nr_irqs;
|
||||
const struct omap_prcm_irq *irqs;
|
||||
int irq;
|
||||
unsigned int (*xlate_irq)(unsigned int);
|
||||
void (*read_pending_irqs)(unsigned long *events);
|
||||
void (*ocp_barrier)(void);
|
||||
void (*save_and_clear_irqen)(u32 *saved_mask);
|
||||
|
||||
@ -29,11 +29,9 @@ int omap2_prcm_base_init(void);
|
||||
*
|
||||
* PRM_HAS_IO_WAKEUP: has IO wakeup capability
|
||||
* PRM_HAS_VOLTAGE: has voltage domains
|
||||
* PRM_IRQ_DEFAULT: use default irq number for PRM irq
|
||||
*/
|
||||
#define PRM_HAS_IO_WAKEUP BIT(0)
|
||||
#define PRM_HAS_VOLTAGE BIT(1)
|
||||
#define PRM_IRQ_DEFAULT BIT(2)
|
||||
|
||||
/*
|
||||
* MAX_MODULE_SOFTRESET_WAIT: Maximum microseconds to wait for OMAP
|
||||
|
||||
@ -704,12 +704,18 @@ static int omap3xxx_prm_late_init(void)
|
||||
omap3430_pre_es3_1_reconfigure_io_chain;
|
||||
|
||||
np = of_find_matching_node(NULL, omap3_prm_dt_match_table);
|
||||
if (np) {
|
||||
irq_num = of_irq_get(np, 0);
|
||||
if (irq_num > 0)
|
||||
omap3_prcm_irq_setup.irq = irq_num;
|
||||
if (!np) {
|
||||
pr_err("PRM: no device tree node for interrupt?\n");
|
||||
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
irq_num = of_irq_get(np, 0);
|
||||
if (irq_num == -EPROBE_DEFER)
|
||||
return irq_num;
|
||||
|
||||
omap3_prcm_irq_setup.irq = irq_num;
|
||||
|
||||
omap3xxx_prm_enable_io_wakeup();
|
||||
|
||||
return omap_prcm_register_chain_handler(&omap3_prcm_irq_setup);
|
||||
|
||||
@ -50,8 +50,6 @@ static struct omap_prcm_irq_setup omap4_prcm_irq_setup = {
|
||||
.nr_regs = 2,
|
||||
.irqs = omap4_prcm_irqs,
|
||||
.nr_irqs = ARRAY_SIZE(omap4_prcm_irqs),
|
||||
.irq = 11 + OMAP44XX_IRQ_GIC_START,
|
||||
.xlate_irq = omap4_xlate_irq,
|
||||
.read_pending_irqs = &omap44xx_prm_read_pending_irqs,
|
||||
.ocp_barrier = &omap44xx_prm_ocp_barrier,
|
||||
.save_and_clear_irqen = &omap44xx_prm_save_and_clear_irqen,
|
||||
@ -743,23 +741,10 @@ static int omap44xx_prm_late_init(void)
|
||||
return 0;
|
||||
|
||||
irq_num = of_irq_get(prm_init_data->np, 0);
|
||||
/*
|
||||
* Already have OMAP4 IRQ num. For all other platforms, we need
|
||||
* IRQ numbers from DT
|
||||
*/
|
||||
if (irq_num <= 0 && !(prm_init_data->flags & PRM_IRQ_DEFAULT)) {
|
||||
if (irq_num == -EPROBE_DEFER)
|
||||
return irq_num;
|
||||
if (irq_num == -EPROBE_DEFER)
|
||||
return irq_num;
|
||||
|
||||
/* Have nothing to do */
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* Once OMAP4 DT is filled as well */
|
||||
if (irq_num > 0) {
|
||||
omap4_prcm_irq_setup.irq = irq_num;
|
||||
omap4_prcm_irq_setup.xlate_irq = NULL;
|
||||
}
|
||||
omap4_prcm_irq_setup.irq = irq_num;
|
||||
|
||||
omap44xx_prm_enable_io_wakeup();
|
||||
|
||||
|
||||
@ -218,10 +218,7 @@ void omap_prcm_irq_cleanup(void)
|
||||
kfree(prcm_irq_setup->priority_mask);
|
||||
prcm_irq_setup->priority_mask = NULL;
|
||||
|
||||
if (prcm_irq_setup->xlate_irq)
|
||||
irq = prcm_irq_setup->xlate_irq(prcm_irq_setup->irq);
|
||||
else
|
||||
irq = prcm_irq_setup->irq;
|
||||
irq = prcm_irq_setup->irq;
|
||||
irq_set_chained_handler(irq, NULL);
|
||||
|
||||
if (prcm_irq_setup->base_irq > 0)
|
||||
@ -307,10 +304,7 @@ int omap_prcm_register_chain_handler(struct omap_prcm_irq_setup *irq_setup)
|
||||
1 << (offset & 0x1f);
|
||||
}
|
||||
|
||||
if (irq_setup->xlate_irq)
|
||||
irq = irq_setup->xlate_irq(irq_setup->irq);
|
||||
else
|
||||
irq = irq_setup->irq;
|
||||
irq = irq_setup->irq;
|
||||
irq_set_chained_handler(irq, omap_prcm_irq_handler);
|
||||
|
||||
irq_setup->base_irq = irq_alloc_descs(-1, 0, irq_setup->nr_regs * 32,
|
||||
@ -671,7 +665,7 @@ static struct omap_prcm_init_data omap4_prm_data __initdata = {
|
||||
.index = TI_CLKM_PRM,
|
||||
.init = omap44xx_prm_init,
|
||||
.device_inst_offset = OMAP4430_PRM_DEVICE_INST,
|
||||
.flags = PRM_HAS_IO_WAKEUP | PRM_HAS_VOLTAGE | PRM_IRQ_DEFAULT,
|
||||
.flags = PRM_HAS_IO_WAKEUP | PRM_HAS_VOLTAGE,
|
||||
};
|
||||
#endif
|
||||
|
||||
|
||||
@ -157,6 +157,13 @@ config TEGRA_GMI
|
||||
Driver for the Tegra Generic Memory Interface bus which can be used
|
||||
to attach devices such as NOR, UART, FPGA and more.
|
||||
|
||||
config TI_SYSC
|
||||
bool "TI sysc interconnect target module driver"
|
||||
depends on ARCH_OMAP2PLUS
|
||||
help
|
||||
Generic driver for Texas Instruments interconnect target module
|
||||
found on many TI SoCs.
|
||||
|
||||
config UNIPHIER_SYSTEM_BUS
|
||||
tristate "UniPhier System Bus driver"
|
||||
depends on ARCH_UNIPHIER && OF
|
||||
|
||||
@ -20,6 +20,7 @@ obj-$(CONFIG_SUNXI_RSB) += sunxi-rsb.o
|
||||
obj-$(CONFIG_SIMPLE_PM_BUS) += simple-pm-bus.o
|
||||
obj-$(CONFIG_TEGRA_ACONNECT) += tegra-aconnect.o
|
||||
obj-$(CONFIG_TEGRA_GMI) += tegra-gmi.o
|
||||
obj-$(CONFIG_TI_SYSC) += ti-sysc.o
|
||||
obj-$(CONFIG_UNIPHIER_SYSTEM_BUS) += uniphier-system-bus.o
|
||||
obj-$(CONFIG_VEXPRESS_CONFIG) += vexpress-config.o
|
||||
|
||||
|
||||
583
drivers/bus/ti-sysc.c
Normal file
583
drivers/bus/ti-sysc.c
Normal file
@ -0,0 +1,583 @@
|
||||
/*
|
||||
* ti-sysc.c - Texas Instruments sysc interconnect target driver
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*
|
||||
* This program is distributed "as is" WITHOUT ANY WARRANTY of any
|
||||
* kind, whether express or implied; without even the implied warranty
|
||||
* of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*/
|
||||
|
||||
#include <linux/io.h>
|
||||
#include <linux/clk.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/pm_runtime.h>
|
||||
#include <linux/of_address.h>
|
||||
#include <linux/of_platform.h>
|
||||
|
||||
enum sysc_registers {
|
||||
SYSC_REVISION,
|
||||
SYSC_SYSCONFIG,
|
||||
SYSC_SYSSTATUS,
|
||||
SYSC_MAX_REGS,
|
||||
};
|
||||
|
||||
static const char * const reg_names[] = { "rev", "sysc", "syss", };
|
||||
|
||||
enum sysc_clocks {
|
||||
SYSC_FCK,
|
||||
SYSC_ICK,
|
||||
SYSC_MAX_CLOCKS,
|
||||
};
|
||||
|
||||
static const char * const clock_names[] = { "fck", "ick", };
|
||||
|
||||
/**
|
||||
* struct sysc - TI sysc interconnect target module registers and capabilities
|
||||
* @dev: struct device pointer
|
||||
* @module_pa: physical address of the interconnect target module
|
||||
* @module_size: size of the interconnect target module
|
||||
* @module_va: virtual address of the interconnect target module
|
||||
* @offsets: register offsets from module base
|
||||
* @clocks: clocks used by the interconnect target module
|
||||
* @legacy_mode: configured for legacy mode if set
|
||||
*/
|
||||
struct sysc {
|
||||
struct device *dev;
|
||||
u64 module_pa;
|
||||
u32 module_size;
|
||||
void __iomem *module_va;
|
||||
int offsets[SYSC_MAX_REGS];
|
||||
struct clk *clocks[SYSC_MAX_CLOCKS];
|
||||
const char *legacy_mode;
|
||||
};
|
||||
|
||||
static u32 sysc_read_revision(struct sysc *ddata)
|
||||
{
|
||||
return readl_relaxed(ddata->module_va +
|
||||
ddata->offsets[SYSC_REVISION]);
|
||||
}
|
||||
|
||||
static int sysc_get_one_clock(struct sysc *ddata,
|
||||
enum sysc_clocks index)
|
||||
{
|
||||
const char *name;
|
||||
int error;
|
||||
|
||||
switch (index) {
|
||||
case SYSC_FCK:
|
||||
break;
|
||||
case SYSC_ICK:
|
||||
break;
|
||||
default:
|
||||
return -EINVAL;
|
||||
}
|
||||
name = clock_names[index];
|
||||
|
||||
ddata->clocks[index] = devm_clk_get(ddata->dev, name);
|
||||
if (IS_ERR(ddata->clocks[index])) {
|
||||
if (PTR_ERR(ddata->clocks[index]) == -ENOENT)
|
||||
return 0;
|
||||
|
||||
dev_err(ddata->dev, "clock get error for %s: %li\n",
|
||||
name, PTR_ERR(ddata->clocks[index]));
|
||||
|
||||
return PTR_ERR(ddata->clocks[index]);
|
||||
}
|
||||
|
||||
error = clk_prepare(ddata->clocks[index]);
|
||||
if (error) {
|
||||
dev_err(ddata->dev, "clock prepare error for %s: %i\n",
|
||||
name, error);
|
||||
|
||||
return error;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int sysc_get_clocks(struct sysc *ddata)
|
||||
{
|
||||
int i, error;
|
||||
|
||||
if (ddata->legacy_mode)
|
||||
return 0;
|
||||
|
||||
for (i = 0; i < SYSC_MAX_CLOCKS; i++) {
|
||||
error = sysc_get_one_clock(ddata, i);
|
||||
if (error && error != -ENOENT)
|
||||
return error;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/**
|
||||
* sysc_parse_and_check_child_range - parses module IO region from ranges
|
||||
* @ddata: device driver data
|
||||
*
|
||||
* In general we only need rev, syss, and sysc registers and not the whole
|
||||
* module range. But we do want the offsets for these registers from the
|
||||
* module base. This allows us to check them against the legacy hwmod
|
||||
* platform data. Let's also check the ranges are configured properly.
|
||||
*/
|
||||
static int sysc_parse_and_check_child_range(struct sysc *ddata)
|
||||
{
|
||||
struct device_node *np = ddata->dev->of_node;
|
||||
const __be32 *ranges;
|
||||
u32 nr_addr, nr_size;
|
||||
int len, error;
|
||||
|
||||
ranges = of_get_property(np, "ranges", &len);
|
||||
if (!ranges) {
|
||||
dev_err(ddata->dev, "missing ranges for %pOF\n", np);
|
||||
|
||||
return -ENOENT;
|
||||
}
|
||||
|
||||
len /= sizeof(*ranges);
|
||||
|
||||
if (len < 3) {
|
||||
dev_err(ddata->dev, "incomplete ranges for %pOF\n", np);
|
||||
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
error = of_property_read_u32(np, "#address-cells", &nr_addr);
|
||||
if (error)
|
||||
return -ENOENT;
|
||||
|
||||
error = of_property_read_u32(np, "#size-cells", &nr_size);
|
||||
if (error)
|
||||
return -ENOENT;
|
||||
|
||||
if (nr_addr != 1 || nr_size != 1) {
|
||||
dev_err(ddata->dev, "invalid ranges for %pOF\n", np);
|
||||
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
ranges++;
|
||||
ddata->module_pa = of_translate_address(np, ranges++);
|
||||
ddata->module_size = be32_to_cpup(ranges);
|
||||
|
||||
dev_dbg(ddata->dev, "interconnect target 0x%llx size 0x%x for %pOF\n",
|
||||
ddata->module_pa, ddata->module_size, np);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/**
|
||||
* sysc_check_one_child - check child configuration
|
||||
* @ddata: device driver data
|
||||
* @np: child device node
|
||||
*
|
||||
* Let's avoid messy situations where we have new interconnect target
|
||||
* node but children have "ti,hwmods". These belong to the interconnect
|
||||
* target node and are managed by this driver.
|
||||
*/
|
||||
static int sysc_check_one_child(struct sysc *ddata,
|
||||
struct device_node *np)
|
||||
{
|
||||
const char *name;
|
||||
|
||||
name = of_get_property(np, "ti,hwmods", NULL);
|
||||
if (name)
|
||||
dev_warn(ddata->dev, "really a child ti,hwmods property?");
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int sysc_check_children(struct sysc *ddata)
|
||||
{
|
||||
struct device_node *child;
|
||||
int error;
|
||||
|
||||
for_each_child_of_node(ddata->dev->of_node, child) {
|
||||
error = sysc_check_one_child(ddata, child);
|
||||
if (error)
|
||||
return error;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/**
|
||||
* sysc_parse_one - parses the interconnect target module registers
|
||||
* @ddata: device driver data
|
||||
* @reg: register to parse
|
||||
*/
|
||||
static int sysc_parse_one(struct sysc *ddata, enum sysc_registers reg)
|
||||
{
|
||||
struct resource *res;
|
||||
const char *name;
|
||||
|
||||
switch (reg) {
|
||||
case SYSC_REVISION:
|
||||
case SYSC_SYSCONFIG:
|
||||
case SYSC_SYSSTATUS:
|
||||
name = reg_names[reg];
|
||||
break;
|
||||
default:
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
res = platform_get_resource_byname(to_platform_device(ddata->dev),
|
||||
IORESOURCE_MEM, name);
|
||||
if (!res) {
|
||||
dev_dbg(ddata->dev, "has no %s register\n", name);
|
||||
ddata->offsets[reg] = -ENODEV;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
ddata->offsets[reg] = res->start - ddata->module_pa;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int sysc_parse_registers(struct sysc *ddata)
|
||||
{
|
||||
int i, error;
|
||||
|
||||
for (i = 0; i < SYSC_MAX_REGS; i++) {
|
||||
error = sysc_parse_one(ddata, i);
|
||||
if (error)
|
||||
return error;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/**
|
||||
* sysc_check_registers - check for misconfigured register overlaps
|
||||
* @ddata: device driver data
|
||||
*/
|
||||
static int sysc_check_registers(struct sysc *ddata)
|
||||
{
|
||||
int i, j, nr_regs = 0, nr_matches = 0;
|
||||
|
||||
for (i = 0; i < SYSC_MAX_REGS; i++) {
|
||||
if (ddata->offsets[i] < 0)
|
||||
continue;
|
||||
|
||||
if (ddata->offsets[i] > (ddata->module_size - 4)) {
|
||||
dev_err(ddata->dev, "register outside module range");
|
||||
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
for (j = 0; j < SYSC_MAX_REGS; j++) {
|
||||
if (ddata->offsets[j] < 0)
|
||||
continue;
|
||||
|
||||
if (ddata->offsets[i] == ddata->offsets[j])
|
||||
nr_matches++;
|
||||
}
|
||||
nr_regs++;
|
||||
}
|
||||
|
||||
if (nr_regs < 1) {
|
||||
dev_err(ddata->dev, "missing registers\n");
|
||||
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
if (nr_matches > nr_regs) {
|
||||
dev_err(ddata->dev, "overlapping registers: (%i/%i)",
|
||||
nr_regs, nr_matches);
|
||||
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/**
|
||||
* syc_ioremap - ioremap register space for the interconnect target module
|
||||
* @ddata: deviec driver data
|
||||
*
|
||||
* Note that the interconnect target module registers can be anywhere
|
||||
* within the first child device address space. For example, SGX has
|
||||
* them at offset 0x1fc00 in the 32MB module address space. We just
|
||||
* what we need around the interconnect target module registers.
|
||||
*/
|
||||
static int sysc_ioremap(struct sysc *ddata)
|
||||
{
|
||||
u32 size = 0;
|
||||
|
||||
if (ddata->offsets[SYSC_SYSSTATUS] >= 0)
|
||||
size = ddata->offsets[SYSC_SYSSTATUS];
|
||||
else if (ddata->offsets[SYSC_SYSCONFIG] >= 0)
|
||||
size = ddata->offsets[SYSC_SYSCONFIG];
|
||||
else if (ddata->offsets[SYSC_REVISION] >= 0)
|
||||
size = ddata->offsets[SYSC_REVISION];
|
||||
else
|
||||
return -EINVAL;
|
||||
|
||||
size &= 0xfff00;
|
||||
size += SZ_256;
|
||||
|
||||
ddata->module_va = devm_ioremap(ddata->dev,
|
||||
ddata->module_pa,
|
||||
size);
|
||||
if (!ddata->module_va)
|
||||
return -EIO;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/**
|
||||
* sysc_map_and_check_registers - ioremap and check device registers
|
||||
* @ddata: device driver data
|
||||
*/
|
||||
static int sysc_map_and_check_registers(struct sysc *ddata)
|
||||
{
|
||||
int error;
|
||||
|
||||
error = sysc_parse_and_check_child_range(ddata);
|
||||
if (error)
|
||||
return error;
|
||||
|
||||
error = sysc_check_children(ddata);
|
||||
if (error)
|
||||
return error;
|
||||
|
||||
error = sysc_parse_registers(ddata);
|
||||
if (error)
|
||||
return error;
|
||||
|
||||
error = sysc_ioremap(ddata);
|
||||
if (error)
|
||||
return error;
|
||||
|
||||
error = sysc_check_registers(ddata);
|
||||
if (error)
|
||||
return error;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/**
|
||||
* sysc_show_rev - read and show interconnect target module revision
|
||||
* @bufp: buffer to print the information to
|
||||
* @ddata: device driver data
|
||||
*/
|
||||
static int sysc_show_rev(char *bufp, struct sysc *ddata)
|
||||
{
|
||||
int error, len;
|
||||
|
||||
if (ddata->offsets[SYSC_REVISION] < 0)
|
||||
return sprintf(bufp, ":NA");
|
||||
|
||||
error = pm_runtime_get_sync(ddata->dev);
|
||||
if (error < 0) {
|
||||
pm_runtime_put_noidle(ddata->dev);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
len = sprintf(bufp, ":%08x", sysc_read_revision(ddata));
|
||||
|
||||
pm_runtime_mark_last_busy(ddata->dev);
|
||||
pm_runtime_put_autosuspend(ddata->dev);
|
||||
|
||||
return len;
|
||||
}
|
||||
|
||||
static int sysc_show_reg(struct sysc *ddata,
|
||||
char *bufp, enum sysc_registers reg)
|
||||
{
|
||||
if (ddata->offsets[reg] < 0)
|
||||
return sprintf(bufp, ":NA");
|
||||
|
||||
return sprintf(bufp, ":%x", ddata->offsets[reg]);
|
||||
}
|
||||
|
||||
/**
|
||||
* sysc_show_registers - show information about interconnect target module
|
||||
* @ddata: device driver data
|
||||
*/
|
||||
static void sysc_show_registers(struct sysc *ddata)
|
||||
{
|
||||
char buf[128];
|
||||
char *bufp = buf;
|
||||
int i;
|
||||
|
||||
for (i = 0; i < SYSC_MAX_REGS; i++)
|
||||
bufp += sysc_show_reg(ddata, bufp, i);
|
||||
|
||||
bufp += sysc_show_rev(bufp, ddata);
|
||||
|
||||
dev_dbg(ddata->dev, "%llx:%x%s\n",
|
||||
ddata->module_pa, ddata->module_size,
|
||||
buf);
|
||||
}
|
||||
|
||||
static int __maybe_unused sysc_runtime_suspend(struct device *dev)
|
||||
{
|
||||
struct sysc *ddata;
|
||||
int i;
|
||||
|
||||
ddata = dev_get_drvdata(dev);
|
||||
|
||||
if (ddata->legacy_mode)
|
||||
return 0;
|
||||
|
||||
for (i = 0; i < SYSC_MAX_CLOCKS; i++) {
|
||||
if (IS_ERR_OR_NULL(ddata->clocks[i]))
|
||||
continue;
|
||||
clk_disable(ddata->clocks[i]);
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int __maybe_unused sysc_runtime_resume(struct device *dev)
|
||||
{
|
||||
struct sysc *ddata;
|
||||
int i, error;
|
||||
|
||||
ddata = dev_get_drvdata(dev);
|
||||
|
||||
if (ddata->legacy_mode)
|
||||
return 0;
|
||||
|
||||
for (i = 0; i < SYSC_MAX_CLOCKS; i++) {
|
||||
if (IS_ERR_OR_NULL(ddata->clocks[i]))
|
||||
continue;
|
||||
error = clk_enable(ddata->clocks[i]);
|
||||
if (error)
|
||||
return error;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static const struct dev_pm_ops sysc_pm_ops = {
|
||||
SET_RUNTIME_PM_OPS(sysc_runtime_suspend,
|
||||
sysc_runtime_resume,
|
||||
NULL)
|
||||
};
|
||||
|
||||
static void sysc_unprepare(struct sysc *ddata)
|
||||
{
|
||||
int i;
|
||||
|
||||
for (i = 0; i < SYSC_MAX_CLOCKS; i++) {
|
||||
if (!IS_ERR_OR_NULL(ddata->clocks[i]))
|
||||
clk_unprepare(ddata->clocks[i]);
|
||||
}
|
||||
}
|
||||
|
||||
static int sysc_probe(struct platform_device *pdev)
|
||||
{
|
||||
struct device_node *np = pdev->dev.of_node;
|
||||
struct sysc *ddata;
|
||||
int error;
|
||||
|
||||
ddata = devm_kzalloc(&pdev->dev, sizeof(*ddata), GFP_KERNEL);
|
||||
if (!ddata)
|
||||
return -ENOMEM;
|
||||
|
||||
ddata->dev = &pdev->dev;
|
||||
ddata->legacy_mode = of_get_property(np, "ti,hwmods", NULL);
|
||||
|
||||
error = sysc_get_clocks(ddata);
|
||||
if (error)
|
||||
return error;
|
||||
|
||||
error = sysc_map_and_check_registers(ddata);
|
||||
if (error)
|
||||
goto unprepare;
|
||||
|
||||
platform_set_drvdata(pdev, ddata);
|
||||
|
||||
pm_runtime_enable(ddata->dev);
|
||||
error = pm_runtime_get_sync(ddata->dev);
|
||||
if (error < 0) {
|
||||
pm_runtime_put_noidle(ddata->dev);
|
||||
pm_runtime_disable(ddata->dev);
|
||||
goto unprepare;
|
||||
}
|
||||
|
||||
pm_runtime_use_autosuspend(ddata->dev);
|
||||
|
||||
sysc_show_registers(ddata);
|
||||
|
||||
error = of_platform_populate(ddata->dev->of_node,
|
||||
NULL, NULL, ddata->dev);
|
||||
if (error)
|
||||
goto err;
|
||||
|
||||
pm_runtime_mark_last_busy(ddata->dev);
|
||||
pm_runtime_put_autosuspend(ddata->dev);
|
||||
|
||||
return 0;
|
||||
|
||||
err:
|
||||
pm_runtime_dont_use_autosuspend(&pdev->dev);
|
||||
pm_runtime_put_sync(&pdev->dev);
|
||||
pm_runtime_disable(&pdev->dev);
|
||||
unprepare:
|
||||
sysc_unprepare(ddata);
|
||||
|
||||
return error;
|
||||
}
|
||||
|
||||
static int sysc_remove(struct platform_device *pdev)
|
||||
{
|
||||
struct sysc *ddata = platform_get_drvdata(pdev);
|
||||
int error;
|
||||
|
||||
error = pm_runtime_get_sync(ddata->dev);
|
||||
if (error < 0) {
|
||||
pm_runtime_put_noidle(ddata->dev);
|
||||
pm_runtime_disable(ddata->dev);
|
||||
goto unprepare;
|
||||
}
|
||||
|
||||
of_platform_depopulate(&pdev->dev);
|
||||
|
||||
pm_runtime_dont_use_autosuspend(&pdev->dev);
|
||||
pm_runtime_put_sync(&pdev->dev);
|
||||
pm_runtime_disable(&pdev->dev);
|
||||
|
||||
unprepare:
|
||||
sysc_unprepare(ddata);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static const struct of_device_id sysc_match[] = {
|
||||
{ .compatible = "ti,sysc-omap2" },
|
||||
{ .compatible = "ti,sysc-omap4" },
|
||||
{ .compatible = "ti,sysc-omap4-simple" },
|
||||
{ .compatible = "ti,sysc-omap3430-sr" },
|
||||
{ .compatible = "ti,sysc-omap3630-sr" },
|
||||
{ .compatible = "ti,sysc-omap4-sr" },
|
||||
{ .compatible = "ti,sysc-omap3-sham" },
|
||||
{ .compatible = "ti,sysc-omap-aes" },
|
||||
{ .compatible = "ti,sysc-mcasp" },
|
||||
{ .compatible = "ti,sysc-usb-host-fs" },
|
||||
{ },
|
||||
};
|
||||
MODULE_DEVICE_TABLE(of, sysc_match);
|
||||
|
||||
static struct platform_driver sysc_driver = {
|
||||
.probe = sysc_probe,
|
||||
.remove = sysc_remove,
|
||||
.driver = {
|
||||
.name = "ti-sysc",
|
||||
.of_match_table = sysc_match,
|
||||
.pm = &sysc_pm_ops,
|
||||
},
|
||||
};
|
||||
module_platform_driver(sysc_driver);
|
||||
|
||||
MODULE_DESCRIPTION("TI sysc interconnect target driver");
|
||||
MODULE_LICENSE("GPL v2");
|
||||
Loading…
Reference in New Issue
Block a user