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thermal: intel: hfi: Enable notification interrupt
When hardware wants to inform the operating system about updates in the HFI table, it issues a package-level thermal event interrupt. For this, hardware has new interrupt and status bits in the IA32_PACKAGE_THERM_ INTERRUPT and IA32_PACKAGE_THERM_STATUS registers. The existing thermal throttle driver already handles thermal event interrupts: it initializes the thermal vector of the local APIC as well as per-CPU and package-level interrupt reporting. It also provides routines to service such interrupts. Extend its functionality to also handle HFI interrupts. The frequency of the thermal HFI interrupt is specific to each processor model. On some processors, a single interrupt happens as soon as the HFI is enabled and hardware will never update HFI capabilities afterwards. On other processors, thermal and power constraints may cause thermal HFI interrupts every tens of milliseconds. To not overwhelm consumers of the HFI data, use delayed work to throttle the rate at which HFI updates are processed. Use a dedicated workqueue to not overload system_wq if hardware issues many HFI updates. Reviewed-by: Len Brown <len.brown@intel.com> Signed-off-by: Ricardo Neri <ricardo.neri-calderon@linux.intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
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@ -26,20 +26,28 @@
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#include <linux/cpumask.h>
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#include <linux/gfp.h>
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#include <linux/io.h>
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#include <linux/kernel.h>
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#include <linux/math.h>
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#include <linux/mutex.h>
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#include <linux/percpu-defs.h>
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#include <linux/printk.h>
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#include <linux/processor.h>
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#include <linux/slab.h>
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#include <linux/spinlock.h>
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#include <linux/string.h>
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#include <linux/topology.h>
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#include <linux/workqueue.h>
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#include <asm/msr.h>
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#include "intel_hfi.h"
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#define THERM_STATUS_CLEAR_PKG_MASK (BIT(1) | BIT(3) | BIT(5) | BIT(7) | \
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BIT(9) | BIT(11) | BIT(26))
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/* Hardware Feedback Interface MSR configuration bits */
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#define HW_FEEDBACK_PTR_VALID_BIT BIT(0)
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#define HW_FEEDBACK_CONFIG_HFI_ENABLE_BIT BIT(0)
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/* CPUID detection and enumeration definitions for HFI */
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@ -98,6 +106,9 @@ struct hfi_hdr {
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* @data: Base address of the data of the local table
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* @cpus: CPUs represented in this HFI table instance
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* @hw_table: Pointer to the HFI table of this instance
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* @update_work: Delayed work to process HFI updates
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* @table_lock: Lock to protect acceses to the table of this instance
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* @event_lock: Lock to process HFI interrupts
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*
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* A set of parameters to parse and navigate a specific HFI table.
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*/
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@ -110,6 +121,9 @@ struct hfi_instance {
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void *data;
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cpumask_var_t cpus;
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void *hw_table;
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struct delayed_work update_work;
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raw_spinlock_t table_lock;
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raw_spinlock_t event_lock;
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};
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/**
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@ -147,6 +161,86 @@ static struct hfi_instance *hfi_instances;
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static struct hfi_features hfi_features;
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static DEFINE_MUTEX(hfi_instance_lock);
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static struct workqueue_struct *hfi_updates_wq;
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#define HFI_UPDATE_INTERVAL HZ
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static void hfi_update_work_fn(struct work_struct *work)
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{
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struct hfi_instance *hfi_instance;
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hfi_instance = container_of(to_delayed_work(work), struct hfi_instance,
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update_work);
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if (!hfi_instance)
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return;
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/* TODO: Consume update here. */
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}
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void intel_hfi_process_event(__u64 pkg_therm_status_msr_val)
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{
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struct hfi_instance *hfi_instance;
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int cpu = smp_processor_id();
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struct hfi_cpu_info *info;
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u64 new_timestamp;
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if (!pkg_therm_status_msr_val)
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return;
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info = &per_cpu(hfi_cpu_info, cpu);
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if (!info)
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return;
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/*
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* A CPU is linked to its HFI instance before the thermal vector in the
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* local APIC is unmasked. Hence, info->hfi_instance cannot be NULL
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* when receiving an HFI event.
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*/
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hfi_instance = info->hfi_instance;
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if (unlikely(!hfi_instance)) {
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pr_debug("Received event on CPU %d but instance was null", cpu);
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return;
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}
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/*
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* On most systems, all CPUs in the package receive a package-level
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* thermal interrupt when there is an HFI update. It is sufficient to
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* let a single CPU to acknowledge the update and queue work to
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* process it. The remaining CPUs can resume their work.
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*/
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if (!raw_spin_trylock(&hfi_instance->event_lock))
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return;
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/* Skip duplicated updates. */
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new_timestamp = *(u64 *)hfi_instance->hw_table;
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if (*hfi_instance->timestamp == new_timestamp) {
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raw_spin_unlock(&hfi_instance->event_lock);
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return;
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}
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raw_spin_lock(&hfi_instance->table_lock);
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/*
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* Copy the updated table into our local copy. This includes the new
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* timestamp.
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*/
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memcpy(hfi_instance->local_table, hfi_instance->hw_table,
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hfi_features.nr_table_pages << PAGE_SHIFT);
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raw_spin_unlock(&hfi_instance->table_lock);
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raw_spin_unlock(&hfi_instance->event_lock);
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/*
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* Let hardware know that we are done reading the HFI table and it is
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* free to update it again.
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*/
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pkg_therm_status_msr_val &= THERM_STATUS_CLEAR_PKG_MASK &
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~PACKAGE_THERM_STATUS_HFI_UPDATED;
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wrmsrl(MSR_IA32_PACKAGE_THERM_STATUS, pkg_therm_status_msr_val);
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queue_delayed_work(hfi_updates_wq, &hfi_instance->update_work,
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HFI_UPDATE_INTERVAL);
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}
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static void init_hfi_cpu_index(struct hfi_cpu_info *info)
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{
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union cpuid6_edx edx;
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@ -258,8 +352,20 @@ void intel_hfi_online(unsigned int cpu)
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init_hfi_instance(hfi_instance);
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INIT_DELAYED_WORK(&hfi_instance->update_work, hfi_update_work_fn);
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raw_spin_lock_init(&hfi_instance->table_lock);
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raw_spin_lock_init(&hfi_instance->event_lock);
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cpumask_set_cpu(cpu, hfi_instance->cpus);
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/*
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* Enable the hardware feedback interface and never disable it. See
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* comment on programming the address of the table.
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*/
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rdmsrl(MSR_IA32_HW_FEEDBACK_CONFIG, msr_val);
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msr_val |= HW_FEEDBACK_CONFIG_HFI_ENABLE_BIT;
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wrmsrl(MSR_IA32_HW_FEEDBACK_CONFIG, msr_val);
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unlock:
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mutex_unlock(&hfi_instance_lock);
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return;
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@ -373,6 +479,10 @@ void __init intel_hfi_init(void)
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goto err_nomem;
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}
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hfi_updates_wq = create_singlethread_workqueue("hfi-updates");
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if (!hfi_updates_wq)
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goto err_nomem;
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return;
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err_nomem:
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@ -6,10 +6,12 @@
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void __init intel_hfi_init(void);
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void intel_hfi_online(unsigned int cpu);
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void intel_hfi_offline(unsigned int cpu);
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void intel_hfi_process_event(__u64 pkg_therm_status_msr_val);
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#else
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static inline void intel_hfi_init(void) { }
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static inline void intel_hfi_online(unsigned int cpu) { }
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static inline void intel_hfi_offline(unsigned int cpu) { }
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static inline void intel_hfi_process_event(__u64 pkg_therm_status_msr_val) { }
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#endif /* CONFIG_INTEL_HFI_THERMAL */
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#endif /* _INTEL_HFI_H */
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@ -620,6 +620,10 @@ void intel_thermal_interrupt(void)
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PACKAGE_THERM_STATUS_POWER_LIMIT,
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POWER_LIMIT_EVENT,
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PACKAGE_LEVEL);
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if (this_cpu_has(X86_FEATURE_HFI))
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intel_hfi_process_event(msr_val &
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PACKAGE_THERM_STATUS_HFI_UPDATED);
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}
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}
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@ -729,6 +733,12 @@ void intel_init_thermal(struct cpuinfo_x86 *c)
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wrmsr(MSR_IA32_PACKAGE_THERM_INTERRUPT,
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l | (PACKAGE_THERM_INT_LOW_ENABLE
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| PACKAGE_THERM_INT_HIGH_ENABLE), h);
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if (cpu_has(c, X86_FEATURE_HFI)) {
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rdmsr(MSR_IA32_PACKAGE_THERM_INTERRUPT, l, h);
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wrmsr(MSR_IA32_PACKAGE_THERM_INTERRUPT,
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l | PACKAGE_THERM_INT_HFI_ENABLE, h);
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}
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}
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rdmsr(MSR_IA32_MISC_ENABLE, l, h);
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