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ASoC: rsnd: remove default division of clock out

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Current adg has default division for BRRA/BRRB, but it was created at
very beginning of the driver implementation, and is now an unnecessary
settings.

Because it has this default division, unexpected clockout might
be selected. For example if it requests only 44.1kHz base clockout,
unrequested 48kHz base clockout also will be selected.

This patch remove default division of clock out

Reported-by: Vincenzo De Michele <vincenzo.michele@davinci.de>
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Link: https://lore.kernel.org/r/87il96zlep.wl-kuninori.morimoto.gx@renesas.com
Signed-off-by: Mark Brown <broonie@kernel.org>
This commit is contained in:
Kuninori Morimoto 2023-08-22 23:50:54 +00:00 committed by Mark Brown
parent 80d4984f38
commit ab0233747f
No known key found for this signature in database
GPG Key ID: 24D68B725D5487D0
1 changed files with 6 additions and 9 deletions
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15
sound/soc/sh/rcar/adg.c
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@ -485,7 +485,6 @@ static int rsnd_adg_get_clkout(struct rsnd_priv *priv)
struct device_node *np = dev->of_node;
struct property *prop;
u32 ckr, brgx, brga, brgb;
u32 rate, div;
u32 req_rate[ADG_HZ_SIZE] = {};
uint32_t count = 0;
unsigned long req_Hz[ADG_HZ_SIZE];
@ -559,6 +558,8 @@ static int rsnd_adg_get_clkout(struct rsnd_priv *priv)
* clock-frequency = <22579200 24576000>;
*/
for_each_rsnd_clkin(clk, adg, i) {
u32 rate, div;
rate = clk_get_rate(clk);
if (0 == rate) /* not used */
@ -569,10 +570,8 @@ static int rsnd_adg_get_clkout(struct rsnd_priv *priv)
if (i == CLKI)
/* see [APPROXIMATE] */
rate = (clk_get_rate(clk) / req_Hz[ADG_HZ_441]) * req_Hz[ADG_HZ_441];
if (!adg->brg_rate[ADG_HZ_441] && (0 == rate % 44100)) {
div = 6;
if (req_Hz[ADG_HZ_441])
div = rate / req_Hz[ADG_HZ_441];
if (!adg->brg_rate[ADG_HZ_441] && req_Hz[ADG_HZ_441] && (0 == rate % 44100)) {
div = rate / req_Hz[ADG_HZ_441];
brgx = rsnd_adg_calculate_brgx(div);
if (BRRx_MASK(brgx) == brgx) {
brga = brgx;
@ -590,10 +589,8 @@ static int rsnd_adg_get_clkout(struct rsnd_priv *priv)
if (i == CLKI)
/* see [APPROXIMATE] */
rate = (clk_get_rate(clk) / req_Hz[ADG_HZ_48]) * req_Hz[ADG_HZ_48];
if (!adg->brg_rate[ADG_HZ_48] && (0 == rate % 48000)) {
div = 6;
if (req_Hz[ADG_HZ_48])
div = rate / req_Hz[ADG_HZ_48];
if (!adg->brg_rate[ADG_HZ_48] && req_Hz[ADG_HZ_48] && (0 == rate % 48000)) {
div = rate / req_Hz[ADG_HZ_48];
brgx = rsnd_adg_calculate_brgx(div);
if (BRRx_MASK(brgx) == brgx) {
brgb = brgx;