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ARM: shmobile: Kill off sh73a0 scu_base_addr() function
Replace scu_base_addr() with a static shmobile_scu_base variable and introduce SH73A0_SCU_BASE. Later in the series the shmobile_scu_base variable will be made into a global variable so this is preparation only. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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@ -39,13 +39,12 @@
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#define PSTR_SHUTDOWN_MODE 3
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static void __iomem *scu_base_addr(void)
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{
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return (void __iomem *)0xf0000000;
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}
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#define SH73A0_SCU_BASE IOMEM(0xf0000000)
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static void __iomem *shmobile_scu_base;
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#ifdef CONFIG_HAVE_ARM_TWD
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static DEFINE_TWD_LOCAL_TIMER(twd_local_timer, 0xf0000600, 29);
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static DEFINE_TWD_LOCAL_TIMER(twd_local_timer, SH73A0_SCU_BASE + 0x600, 29);
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void __init sh73a0_register_twd(void)
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{
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twd_local_timer_register(&twd_local_timer);
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@ -71,21 +70,22 @@ static int __cpuinit sh73a0_boot_secondary(unsigned int cpu, struct task_struct
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static void __init sh73a0_smp_prepare_cpus(unsigned int max_cpus)
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{
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scu_enable(scu_base_addr());
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scu_enable(shmobile_scu_base);
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/* Map the reset vector (in headsmp-sh73a0.S) */
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__raw_writel(0, APARMBAREA); /* 4k */
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__raw_writel(__pa(sh73a0_secondary_vector), SBAR);
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/* enable cache coherency on booting CPU */
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scu_power_mode(scu_base_addr(), SCU_PM_NORMAL);
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scu_power_mode(shmobile_scu_base, SCU_PM_NORMAL);
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}
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static void __init sh73a0_smp_init_cpus(void)
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{
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unsigned int ncores = scu_get_core_count(scu_base_addr());
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/* setup sh73a0 specific SCU base */
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shmobile_scu_base = SH73A0_SCU_BASE;
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shmobile_smp_init_cpus(ncores);
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shmobile_smp_init_cpus(scu_get_core_count(shmobile_scu_base));
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}
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#ifdef CONFIG_HOTPLUG_CPU
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@ -121,7 +121,7 @@ static void sh73a0_cpu_die(unsigned int cpu)
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flush_cache_all();
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/* Set power off mode. This takes the CPU out of the MP cluster */
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scu_power_mode(scu_base_addr(), SCU_PM_POWEROFF);
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scu_power_mode(shmobile_scu_base, SCU_PM_POWEROFF);
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/* Enter shutdown mode */
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cpu_do_idle();
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