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Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound-2.6
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound-2.6: ALSA: hda - Fix a copmile warning ASoC: ak4642: fixup snd_soc_update_bits mask for PW_MGMT2 ALSA: hda - Change all ADCs for dual-adc switching mode for Realtek ASoC: Manage WM8731 ACTIVE bit as a supply widget ASoC: Don't set invalid name string to snd_card->driver field ASoC: Ensure we delay long enough for WM8994 FLL to lock when starting ASoC: Tegra: I2S: Ensure clock is enabled when writing regs ASoC: Fix Blackfin I2S _pointer() implementation return in bounds values ASoC: tlv320aic3x: Do soft reset to codec when going to bias off state ASoC: tlv320aic3x: Don't sync first two registers from register cache audio: tlv320aic26: fix PLL register configuration
This commit is contained in:
commit
aa4c495e3d
@ -2715,17 +2715,30 @@ typedef int (*getput_call_t)(struct snd_kcontrol *kcontrol,
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static int alc_cap_getput_caller(struct snd_kcontrol *kcontrol,
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struct snd_ctl_elem_value *ucontrol,
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getput_call_t func)
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getput_call_t func, bool check_adc_switch)
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{
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struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
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struct alc_spec *spec = codec->spec;
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unsigned int adc_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
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int err;
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int i, err = 0;
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mutex_lock(&codec->control_mutex);
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kcontrol->private_value = HDA_COMPOSE_AMP_VAL(spec->adc_nids[adc_idx],
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3, 0, HDA_INPUT);
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err = func(kcontrol, ucontrol);
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if (check_adc_switch && spec->dual_adc_switch) {
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for (i = 0; i < spec->num_adc_nids; i++) {
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kcontrol->private_value =
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HDA_COMPOSE_AMP_VAL(spec->adc_nids[i],
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3, 0, HDA_INPUT);
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err = func(kcontrol, ucontrol);
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if (err < 0)
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goto error;
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}
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} else {
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i = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
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kcontrol->private_value =
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HDA_COMPOSE_AMP_VAL(spec->adc_nids[i],
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3, 0, HDA_INPUT);
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err = func(kcontrol, ucontrol);
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}
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error:
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mutex_unlock(&codec->control_mutex);
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return err;
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}
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@ -2734,14 +2747,14 @@ static int alc_cap_vol_get(struct snd_kcontrol *kcontrol,
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struct snd_ctl_elem_value *ucontrol)
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{
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return alc_cap_getput_caller(kcontrol, ucontrol,
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snd_hda_mixer_amp_volume_get);
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snd_hda_mixer_amp_volume_get, false);
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}
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static int alc_cap_vol_put(struct snd_kcontrol *kcontrol,
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struct snd_ctl_elem_value *ucontrol)
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{
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return alc_cap_getput_caller(kcontrol, ucontrol,
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snd_hda_mixer_amp_volume_put);
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snd_hda_mixer_amp_volume_put, true);
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}
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/* capture mixer elements */
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@ -2751,14 +2764,14 @@ static int alc_cap_sw_get(struct snd_kcontrol *kcontrol,
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struct snd_ctl_elem_value *ucontrol)
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{
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return alc_cap_getput_caller(kcontrol, ucontrol,
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snd_hda_mixer_amp_switch_get);
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snd_hda_mixer_amp_switch_get, false);
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}
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static int alc_cap_sw_put(struct snd_kcontrol *kcontrol,
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struct snd_ctl_elem_value *ucontrol)
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{
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return alc_cap_getput_caller(kcontrol, ucontrol,
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snd_hda_mixer_amp_switch_put);
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snd_hda_mixer_amp_switch_put, true);
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}
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#define _DEFINE_CAPMIX(num) \
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@ -138,11 +138,20 @@ static snd_pcm_uframes_t bf5xx_pcm_pointer(struct snd_pcm_substream *substream)
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pr_debug("%s enter\n", __func__);
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if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
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diff = sport_curr_offset_tx(sport);
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frames = bytes_to_frames(substream->runtime, diff);
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} else {
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diff = sport_curr_offset_rx(sport);
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frames = bytes_to_frames(substream->runtime, diff);
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}
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/*
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* TX at least can report one frame beyond the end of the
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* buffer if we hit the wraparound case - clamp to within the
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* buffer as the ALSA APIs require.
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*/
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if (diff == snd_pcm_lib_buffer_bytes(substream))
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diff = 0;
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frames = bytes_to_frames(substream->runtime, diff);
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return frames;
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}
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@ -357,7 +357,7 @@ static int ak4642_dai_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
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default:
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return -EINVAL;
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}
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snd_soc_update_bits(codec, PW_MGMT2, MS, data);
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snd_soc_update_bits(codec, PW_MGMT2, MS | MCKO | PMPLL, data);
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snd_soc_update_bits(codec, MD_CTL1, BCKO_MASK, bcko);
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/* format type */
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@ -161,10 +161,18 @@ static int aic26_hw_params(struct snd_pcm_substream *substream,
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dev_dbg(&aic26->spi->dev, "bad format\n"); return -EINVAL;
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}
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/* Configure PLL */
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/**
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* Configure PLL
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* fsref = (mclk * PLLM) / 2048
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* where PLLM = J.DDDD (DDDD register ranges from 0 to 9999, decimal)
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*/
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pval = 1;
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jval = (fsref == 44100) ? 7 : 8;
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dval = (fsref == 44100) ? 5264 : 1920;
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/* compute J portion of multiplier */
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jval = fsref / (aic26->mclk / 2048);
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/* compute fractional DDDD component of multiplier */
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dval = fsref - (jval * (aic26->mclk / 2048));
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dval = (10000 * dval) / (aic26->mclk / 2048);
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dev_dbg(&aic26->spi->dev, "Setting PLLM to %d.%04d\n", jval, dval);
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qval = 0;
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reg = 0x8000 | qval << 11 | pval << 8 | jval << 2;
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aic26_reg_write(codec, AIC26_REG_PLL_PROG1, reg);
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@ -1114,12 +1114,19 @@ static int aic3x_set_power(struct snd_soc_codec *codec, int power)
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/* Sync reg_cache with the hardware */
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codec->cache_only = 0;
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for (i = 0; i < ARRAY_SIZE(aic3x_reg); i++)
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for (i = AIC3X_SAMPLE_RATE_SEL_REG; i < ARRAY_SIZE(aic3x_reg); i++)
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snd_soc_write(codec, i, cache[i]);
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if (aic3x->model == AIC3X_MODEL_3007)
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aic3x_init_3007(codec);
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codec->cache_sync = 0;
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} else {
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/*
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* Do soft reset to this codec instance in order to clear
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* possible VDD leakage currents in case the supply regulators
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* remain on
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*/
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snd_soc_write(codec, AIC3X_RESET, SOFT_RESET);
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codec->cache_sync = 1;
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aic3x->power = 0;
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/* HW writes are needless when bias is off */
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codec->cache_only = 1;
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@ -175,6 +175,7 @@ static const struct snd_kcontrol_new wm8731_input_mux_controls =
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SOC_DAPM_ENUM("Input Select", wm8731_insel_enum);
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static const struct snd_soc_dapm_widget wm8731_dapm_widgets[] = {
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SND_SOC_DAPM_SUPPLY("ACTIVE",WM8731_ACTIVE, 0, 0, NULL, 0),
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SND_SOC_DAPM_SUPPLY("OSC", WM8731_PWR, 5, 1, NULL, 0),
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SND_SOC_DAPM_MIXER("Output Mixer", WM8731_PWR, 4, 1,
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&wm8731_output_mixer_controls[0],
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@ -204,6 +205,8 @@ static int wm8731_check_osc(struct snd_soc_dapm_widget *source,
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static const struct snd_soc_dapm_route wm8731_intercon[] = {
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{"DAC", NULL, "OSC", wm8731_check_osc},
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{"ADC", NULL, "OSC", wm8731_check_osc},
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{"DAC", NULL, "ACTIVE"},
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{"ADC", NULL, "ACTIVE"},
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/* output mixer */
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{"Output Mixer", "Line Bypass Switch", "Line Input"},
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@ -315,29 +318,6 @@ static int wm8731_hw_params(struct snd_pcm_substream *substream,
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return 0;
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}
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static int wm8731_pcm_prepare(struct snd_pcm_substream *substream,
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struct snd_soc_dai *dai)
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{
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struct snd_soc_codec *codec = dai->codec;
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/* set active */
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snd_soc_write(codec, WM8731_ACTIVE, 0x0001);
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return 0;
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}
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static void wm8731_shutdown(struct snd_pcm_substream *substream,
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struct snd_soc_dai *dai)
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{
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struct snd_soc_codec *codec = dai->codec;
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/* deactivate */
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if (!codec->active) {
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udelay(50);
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snd_soc_write(codec, WM8731_ACTIVE, 0x0);
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}
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}
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static int wm8731_mute(struct snd_soc_dai *dai, int mute)
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{
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struct snd_soc_codec *codec = dai->codec;
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@ -480,7 +460,6 @@ static int wm8731_set_bias_level(struct snd_soc_codec *codec,
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snd_soc_write(codec, WM8731_PWR, reg | 0x0040);
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break;
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case SND_SOC_BIAS_OFF:
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snd_soc_write(codec, WM8731_ACTIVE, 0x0);
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snd_soc_write(codec, WM8731_PWR, 0xffff);
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regulator_bulk_disable(ARRAY_SIZE(wm8731->supplies),
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wm8731->supplies);
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@ -496,9 +475,7 @@ static int wm8731_set_bias_level(struct snd_soc_codec *codec,
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SNDRV_PCM_FMTBIT_S24_LE)
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static struct snd_soc_dai_ops wm8731_dai_ops = {
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.prepare = wm8731_pcm_prepare,
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.hw_params = wm8731_hw_params,
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.shutdown = wm8731_shutdown,
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.digital_mute = wm8731_mute,
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.set_sysclk = wm8731_set_dai_sysclk,
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.set_fmt = wm8731_set_dai_fmt,
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@ -1713,6 +1713,8 @@ static int _wm8994_set_fll(struct snd_soc_codec *codec, int id, int src,
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snd_soc_update_bits(codec, WM8994_FLL1_CONTROL_1 + reg_offset,
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WM8994_FLL1_ENA | WM8994_FLL1_FRAC,
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reg);
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msleep(5);
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}
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wm8994->fll[id].in = freq_in;
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@ -1929,8 +1929,9 @@ static void snd_soc_instantiate_card(struct snd_soc_card *card)
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"%s", card->name);
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snprintf(card->snd_card->longname, sizeof(card->snd_card->longname),
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"%s", card->long_name ? card->long_name : card->name);
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snprintf(card->snd_card->driver, sizeof(card->snd_card->driver),
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"%s", card->driver_name ? card->driver_name : card->name);
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if (card->driver_name)
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strlcpy(card->snd_card->driver, card->driver_name,
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sizeof(card->snd_card->driver));
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if (card->late_probe) {
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ret = card->late_probe(card);
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@ -222,12 +222,18 @@ static int tegra_i2s_hw_params(struct snd_pcm_substream *substream,
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if (i2sclock % (2 * srate))
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reg |= TEGRA_I2S_TIMING_NON_SYM_ENABLE;
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if (!i2s->clk_refs)
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clk_enable(i2s->clk_i2s);
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tegra_i2s_write(i2s, TEGRA_I2S_TIMING, reg);
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tegra_i2s_write(i2s, TEGRA_I2S_FIFO_SCR,
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TEGRA_I2S_FIFO_SCR_FIFO2_ATN_LVL_FOUR_SLOTS |
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TEGRA_I2S_FIFO_SCR_FIFO1_ATN_LVL_FOUR_SLOTS);
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if (!i2s->clk_refs)
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clk_disable(i2s->clk_i2s);
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return 0;
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}
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