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ARM: tegra: Add memory controller support for Tegra30
Collapses the old memory-controller and IOMMU device tree nodes into a single node to more accurately describe the hardware. While this is an incompatible change there are no users of the IOMMU on Tegra, even though a driver has existed for some time. Signed-off-by: Thierry Reding <treding@nvidia.com>
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parent
49727d30ea
commit
a9fe468f1b
@ -623,23 +623,15 @@
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clock-names = "pclk", "clk32k_in";
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};
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memory-controller@7000f000 {
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mc: memory-controller@7000f000 {
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compatible = "nvidia,tegra30-mc";
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reg = <0x7000f000 0x010
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0x7000f03c 0x1b4
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0x7000f200 0x028
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0x7000f284 0x17c>;
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interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
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};
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reg = <0x7000f000 0x400>;
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clocks = <&tegra_car TEGRA30_CLK_MC>;
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clock-names = "mc";
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iommu@7000f010 {
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compatible = "nvidia,tegra30-smmu";
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reg = <0x7000f010 0x02c
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0x7000f1f0 0x010
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0x7000f228 0x05c>;
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nvidia,#asids = <4>; /* # of ASIDs */
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dma-window = <0 0x40000000>; /* IOVA start & length */
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nvidia,ahb = <&ahb>;
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interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
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#iommu-cells = <1>;
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};
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fuse@7000f800 {
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