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i2c: at91: manage unexpected RXRDY flag when starting a transfer
In some cases, we could start a new i2c transfer with the RXRDY flag
set. It is not a clean state and it leads to print annoying error
messages even if there no real issue. The cause is only having garbage
data in the Receive Holding Register because of a weird behavior of the
RXRDY flag.
Reported-by: Peter Rosin <peda@lysator.liu.se>
Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com>
Tested-by: Peter Rosin <peda@lysator.liu.se>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
Fixes: 93563a6a71
("i2c: at91: fix a race condition when using the DMA controller")
Cc: stable@vger.kernel.org #4.1
This commit is contained in:
parent
43e9f2aa77
commit
a9bed6b10b
@ -347,8 +347,14 @@ error:
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static void at91_twi_read_next_byte(struct at91_twi_dev *dev)
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{
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if (!dev->buf_len)
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/*
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* If we are in this case, it means there is garbage data in RHR, so
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* delete them.
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*/
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if (!dev->buf_len) {
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at91_twi_read(dev, AT91_TWI_RHR);
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return;
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}
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/* 8bit read works with and without FIFO */
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*dev->buf = readb_relaxed(dev->base + AT91_TWI_RHR);
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@ -465,6 +471,24 @@ static irqreturn_t atmel_twi_interrupt(int irq, void *dev_id)
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if (!irqstatus)
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return IRQ_NONE;
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/*
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* In reception, the behavior of the twi device (before sama5d2) is
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* weird. There is some magic about RXRDY flag! When a data has been
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* almost received, the reception of a new one is anticipated if there
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* is no stop command to send. That is the reason why ask for sending
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* the stop command not on the last data but on the second last one.
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*
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* Unfortunately, we could still have the RXRDY flag set even if the
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* transfer is done and we have read the last data. It might happen
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* when the i2c slave device sends too quickly data after receiving the
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* ack from the master. The data has been almost received before having
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* the order to send stop. In this case, sending the stop command could
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* cause a RXRDY interrupt with a TXCOMP one. It is better to manage
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* the RXRDY interrupt first in order to not keep garbage data in the
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* Receive Holding Register for the next transfer.
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*/
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if (irqstatus & AT91_TWI_RXRDY)
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at91_twi_read_next_byte(dev);
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/*
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* When a NACK condition is detected, the I2C controller sets the NACK,
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@ -507,8 +531,6 @@ static irqreturn_t atmel_twi_interrupt(int irq, void *dev_id)
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if (irqstatus & (AT91_TWI_TXCOMP | AT91_TWI_NACK)) {
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at91_disable_twi_interrupts(dev);
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complete(&dev->cmd_complete);
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} else if (irqstatus & AT91_TWI_RXRDY) {
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at91_twi_read_next_byte(dev);
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} else if (irqstatus & AT91_TWI_TXRDY) {
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at91_twi_write_next_byte(dev);
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}
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@ -525,7 +547,6 @@ static int at91_do_twi_transfer(struct at91_twi_dev *dev)
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unsigned long time_left;
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bool has_unre_flag = dev->pdata->has_unre_flag;
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bool has_alt_cmd = dev->pdata->has_alt_cmd;
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unsigned sr;
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/*
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* WARNING: the TXCOMP bit in the Status Register is NOT a clear on
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@ -577,7 +598,7 @@ static int at91_do_twi_transfer(struct at91_twi_dev *dev)
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dev->transfer_status = 0;
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/* Clear pending interrupts, such as NACK. */
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sr = at91_twi_read(dev, AT91_TWI_SR);
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at91_twi_read(dev, AT91_TWI_SR);
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if (dev->fifo_size) {
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unsigned fifo_mr = at91_twi_read(dev, AT91_TWI_FMR);
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@ -600,11 +621,6 @@ static int at91_do_twi_transfer(struct at91_twi_dev *dev)
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} else if (dev->msg->flags & I2C_M_RD) {
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unsigned start_flags = AT91_TWI_START;
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if (sr & AT91_TWI_RXRDY) {
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dev_err(dev->dev, "RXRDY still set!");
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at91_twi_read(dev, AT91_TWI_RHR);
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}
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/* if only one byte is to be read, immediately stop transfer */
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if (!has_alt_cmd && dev->buf_len <= 1 &&
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!(dev->msg->flags & I2C_M_RECV_LEN))
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