From 7ed609b0020fd1db5acde66248f5623328834b72 Mon Sep 17 00:00:00 2001 From: Alexandre Belloni Date: Fri, 10 Jan 2020 23:27:44 +0100 Subject: [PATCH 01/35] ARM: dts: at91: sama5d3: switch to new clock bindings Switch sama5d3 boards to the new PMC clock bindings. This prevents the wb50n to use the out of spec rate for USART1. Link: https://lore.kernel.org/r/20200110222744.1261464-1-alexandre.belloni@bootlin.com Signed-off-by: Alexandre Belloni --- arch/arm/boot/dts/at91-dvk_su60_somc.dtsi | 2 +- arch/arm/boot/dts/at91-wb50n.dtsi | 4 - arch/arm/boot/dts/sama5d3.dtsi | 424 ++-------------------- arch/arm/boot/dts/sama5d3_can.dtsi | 20 +- arch/arm/boot/dts/sama5d3_emac.dtsi | 8 +- arch/arm/boot/dts/sama5d3_gmac.dtsi | 11 +- arch/arm/boot/dts/sama5d3_lcd.dtsi | 19 +- arch/arm/boot/dts/sama5d3_mci2.dtsi | 11 +- arch/arm/boot/dts/sama5d3_tcb1.dtsi | 12 +- arch/arm/boot/dts/sama5d3_uart.dtsi | 20 +- arch/arm/boot/dts/sama5d3xmb.dtsi | 6 +- arch/arm/boot/dts/sama5d3xmb_cmp.dtsi | 6 +- 12 files changed, 56 insertions(+), 487 deletions(-) diff --git a/arch/arm/boot/dts/at91-dvk_su60_somc.dtsi b/arch/arm/boot/dts/at91-dvk_su60_somc.dtsi index 21876da7c442..c1c8650dafce 100644 --- a/arch/arm/boot/dts/at91-dvk_su60_somc.dtsi +++ b/arch/arm/boot/dts/at91-dvk_su60_somc.dtsi @@ -62,7 +62,7 @@ wm8904: wm8904@1a { compatible = "wlf,wm8904"; reg = <0x1a>; - clocks = <&pck2>; + clocks = <&pmc PMC_TYPE_SYSTEM 10>; clock-names = "mclk"; }; }; diff --git a/arch/arm/boot/dts/at91-wb50n.dtsi b/arch/arm/boot/dts/at91-wb50n.dtsi index 4ed8500a5cb8..1487b893cfa7 100644 --- a/arch/arm/boot/dts/at91-wb50n.dtsi +++ b/arch/arm/boot/dts/at91-wb50n.dtsi @@ -46,10 +46,6 @@ atmel,osc-bypass; }; -&usart1_clk { - atmel,clk-output-range = <0 132000000>; -}; - &mmc0 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_mmc0_clk_cmd_dat0 &pinctrl_mmc0_dat1_3 &pinctrl_mmc0_cd>; diff --git a/arch/arm/boot/dts/sama5d3.dtsi b/arch/arm/boot/dts/sama5d3.dtsi index f11b018e9173..f3ce561b46ab 100644 --- a/arch/arm/boot/dts/sama5d3.dtsi +++ b/arch/arm/boot/dts/sama5d3.dtsi @@ -108,7 +108,7 @@ status = "disabled"; #address-cells = <1>; #size-cells = <0>; - clocks = <&mci0_clk>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 21>; clock-names = "mci_clk"; }; @@ -123,7 +123,7 @@ dma-names = "tx", "rx"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_spi0>; - clocks = <&spi0_clk>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 24>; clock-names = "spi_clk"; status = "disabled"; }; @@ -137,7 +137,7 @@ dma-names = "tx", "rx"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>; - clocks = <&ssc0_clk>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 38>; clock-names = "pclk"; status = "disabled"; }; @@ -148,7 +148,7 @@ #size-cells = <0>; reg = <0xf0010000 0x100>; interrupts = <26 IRQ_TYPE_LEVEL_HIGH 0>; - clocks = <&tcb0_clk>, <&clk32k>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 26>, <&clk32k>; clock-names = "t0_clk", "slow_clk"; }; @@ -166,7 +166,7 @@ scl-gpios = <&pioA 31 GPIO_ACTIVE_HIGH>; #address-cells = <1>; #size-cells = <0>; - clocks = <&twi0_clk>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 18>; status = "disabled"; }; @@ -184,7 +184,7 @@ scl-gpios = <&pioC 27 GPIO_ACTIVE_HIGH>; #address-cells = <1>; #size-cells = <0>; - clocks = <&twi1_clk>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 19>; status = "disabled"; }; @@ -197,7 +197,7 @@ dma-names = "tx", "rx"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usart0>; - clocks = <&usart0_clk>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 12>; clock-names = "usart"; status = "disabled"; }; @@ -211,7 +211,7 @@ dma-names = "tx", "rx"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usart1>; - clocks = <&usart1_clk>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 13>; clock-names = "usart"; status = "disabled"; }; @@ -222,7 +222,7 @@ interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart0>; - clocks = <&uart0_clk>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 16>; clock-names = "usart"; status = "disabled"; }; @@ -232,7 +232,7 @@ reg = <0xf002c000 0x300>; interrupts = <28 IRQ_TYPE_LEVEL_HIGH 4>; #pwm-cells = <3>; - clocks = <&pwm_clk>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 28>; status = "disabled"; }; @@ -242,7 +242,7 @@ interrupts = <37 IRQ_TYPE_LEVEL_HIGH 5>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_isi_data_0_7>; - clocks = <&isi_clk>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 37>; clock-names = "isi_clk"; status = "disabled"; port { @@ -267,7 +267,7 @@ status = "disabled"; #address-cells = <1>; #size-cells = <0>; - clocks = <&mci1_clk>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 22>; clock-names = "mci_clk"; }; @@ -282,7 +282,7 @@ dma-names = "tx", "rx"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_spi1>; - clocks = <&spi1_clk>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 25>; clock-names = "spi_clk"; status = "disabled"; }; @@ -296,7 +296,7 @@ dma-names = "tx", "rx"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>; - clocks = <&ssc1_clk>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 39>; clock-names = "pclk"; status = "disabled"; }; @@ -323,7 +323,7 @@ &pinctrl_adc0_ad10 &pinctrl_adc0_ad11 >; - clocks = <&adc_clk>, + clocks = <&pmc PMC_TYPE_PERIPHERAL 29>, <&adc_op_clk>; clock-names = "adc_clk", "adc_op_clk"; atmel,adc-channels-used = <0xfff>; @@ -370,7 +370,7 @@ scl-gpios = <&pioA 19 GPIO_ACTIVE_HIGH>; #address-cells = <1>; #size-cells = <0>; - clocks = <&twi2_clk>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 20>; status = "disabled"; }; @@ -383,7 +383,7 @@ dma-names = "tx", "rx"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usart2>; - clocks = <&usart2_clk>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 14>; clock-names = "usart"; status = "disabled"; }; @@ -397,7 +397,7 @@ dma-names = "tx", "rx"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usart3>; - clocks = <&usart3_clk>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 15>; clock-names = "usart"; status = "disabled"; }; @@ -408,7 +408,7 @@ interrupts = <42 IRQ_TYPE_LEVEL_HIGH 0>; dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(17)>; dma-names = "tx"; - clocks = <&sha_clk>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 42>; clock-names = "sha_clk"; }; @@ -419,7 +419,7 @@ dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(18)>, <&dma1 2 AT91_DMA_CFG_PER_ID(19)>; dma-names = "tx", "rx"; - clocks = <&aes_clk>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 43>; clock-names = "aes_clk"; }; @@ -430,7 +430,7 @@ dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(20)>, <&dma1 2 AT91_DMA_CFG_PER_ID(21)>; dma-names = "tx", "rx"; - clocks = <&tdes_clk>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 44>; clock-names = "tdes_clk"; }; @@ -438,14 +438,14 @@ compatible = "atmel,at91sam9g45-trng"; reg = <0xf8040000 0x100>; interrupts = <45 IRQ_TYPE_LEVEL_HIGH 0>; - clocks = <&trng_clk>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 45>; }; hsmc: hsmc@ffffc000 { compatible = "atmel,sama5d3-smc", "syscon", "simple-mfd"; reg = <0xffffc000 0x1000>; interrupts = <5 IRQ_TYPE_LEVEL_HIGH 6>; - clocks = <&hsmc_clk>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 5>; #address-cells = <1>; #size-cells = <1>; ranges; @@ -462,7 +462,7 @@ reg = <0xffffe600 0x200>; interrupts = <30 IRQ_TYPE_LEVEL_HIGH 0>; #dma-cells = <2>; - clocks = <&dma0_clk>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 30>; clock-names = "dma_clk"; }; @@ -471,14 +471,14 @@ reg = <0xffffe800 0x200>; interrupts = <31 IRQ_TYPE_LEVEL_HIGH 0>; #dma-cells = <2>; - clocks = <&dma1_clk>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 31>; clock-names = "dma_clk"; }; ramc0: ramc@ffffea00 { compatible = "atmel,sama5d3-ddramc"; reg = <0xffffea00 0x200>; - clocks = <&ddrck>, <&mpddr_clk>; + clocks = <&pmc PMC_TYPE_SYSTEM 2>, <&pmc PMC_TYPE_PERIPHERAL 49>; clock-names = "ddrck", "mpddr"; }; @@ -491,7 +491,7 @@ dma-names = "tx", "rx"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_dbgu>; - clocks = <&dbgu_clk>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 2>; clock-names = "usart"; status = "disabled"; }; @@ -967,7 +967,7 @@ gpio-controller; interrupt-controller; #interrupt-cells = <2>; - clocks = <&pioA_clk>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 6>; }; pioB: gpio@fffff400 { @@ -978,7 +978,7 @@ gpio-controller; interrupt-controller; #interrupt-cells = <2>; - clocks = <&pioB_clk>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 7>; }; pioC: gpio@fffff600 { @@ -989,7 +989,7 @@ gpio-controller; interrupt-controller; #interrupt-cells = <2>; - clocks = <&pioC_clk>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 8>; }; pioD: gpio@fffff800 { @@ -1000,7 +1000,7 @@ gpio-controller; interrupt-controller; #interrupt-cells = <2>; - clocks = <&pioD_clk>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 9>; }; pioE: gpio@fffffa00 { @@ -1011,7 +1011,7 @@ gpio-controller; interrupt-controller; #interrupt-cells = <2>; - clocks = <&pioE_clk>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 10>; }; }; @@ -1019,353 +1019,9 @@ compatible = "atmel,sama5d3-pmc", "syscon"; reg = <0xfffffc00 0x120>; interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; - interrupt-controller; - #address-cells = <1>; - #size-cells = <0>; - #interrupt-cells = <1>; - - main_rc_osc: main_rc_osc { - compatible = "atmel,at91sam9x5-clk-main-rc-osc"; - #clock-cells = <0>; - interrupt-parent = <&pmc>; - interrupts = ; - clock-frequency = <12000000>; - clock-accuracy = <50000000>; - }; - - main_osc: main_osc { - compatible = "atmel,at91rm9200-clk-main-osc"; - #clock-cells = <0>; - interrupt-parent = <&pmc>; - interrupts = ; - clocks = <&main_xtal>; - }; - - main: mainck { - compatible = "atmel,at91sam9x5-clk-main"; - #clock-cells = <0>; - interrupt-parent = <&pmc>; - interrupts = ; - clocks = <&main_rc_osc &main_osc>; - }; - - plla: pllack { - compatible = "atmel,sama5d3-clk-pll"; - #clock-cells = <0>; - interrupt-parent = <&pmc>; - interrupts = ; - clocks = <&main>; - reg = <0>; - atmel,clk-input-range = <8000000 50000000>; - #atmel,pll-clk-output-range-cells = <4>; - atmel,pll-clk-output-ranges = <400000000 1000000000 0 0>; - }; - - plladiv: plladivck { - compatible = "atmel,at91sam9x5-clk-plldiv"; - #clock-cells = <0>; - clocks = <&plla>; - }; - - utmi: utmick { - compatible = "atmel,at91sam9x5-clk-utmi"; - #clock-cells = <0>; - interrupt-parent = <&pmc>; - interrupts = ; - clocks = <&main>; - }; - - mck: masterck { - compatible = "atmel,at91sam9x5-clk-master"; - #clock-cells = <0>; - interrupt-parent = <&pmc>; - interrupts = ; - clocks = <&clk32k>, <&main>, <&plladiv>, <&utmi>; - atmel,clk-output-range = <0 166000000>; - atmel,clk-divisors = <1 2 4 3>; - }; - - usb: usbck { - compatible = "atmel,at91sam9x5-clk-usb"; - #clock-cells = <0>; - clocks = <&plladiv>, <&utmi>; - }; - - prog: progck { - compatible = "atmel,at91sam9x5-clk-programmable"; - #address-cells = <1>; - #size-cells = <0>; - interrupt-parent = <&pmc>; - clocks = <&clk32k>, <&main>, <&plladiv>, <&utmi>, <&mck>; - - prog0: prog0 { - #clock-cells = <0>; - reg = <0>; - interrupts = ; - }; - - prog1: prog1 { - #clock-cells = <0>; - reg = <1>; - interrupts = ; - }; - - prog2: prog2 { - #clock-cells = <0>; - reg = <2>; - interrupts = ; - }; - }; - - smd: smdclk { - compatible = "atmel,at91sam9x5-clk-smd"; - #clock-cells = <0>; - clocks = <&plladiv>, <&utmi>; - }; - - systemck { - compatible = "atmel,at91rm9200-clk-system"; - #address-cells = <1>; - #size-cells = <0>; - - ddrck: ddrck { - #clock-cells = <0>; - reg = <2>; - clocks = <&mck>; - }; - - smdck: smdck { - #clock-cells = <0>; - reg = <4>; - clocks = <&smd>; - }; - - uhpck: uhpck { - #clock-cells = <0>; - reg = <6>; - clocks = <&usb>; - }; - - udpck: udpck { - #clock-cells = <0>; - reg = <7>; - clocks = <&usb>; - }; - - pck0: pck0 { - #clock-cells = <0>; - reg = <8>; - clocks = <&prog0>; - }; - - pck1: pck1 { - #clock-cells = <0>; - reg = <9>; - clocks = <&prog1>; - }; - - pck2: pck2 { - #clock-cells = <0>; - reg = <10>; - clocks = <&prog2>; - }; - }; - - periphck { - compatible = "atmel,at91sam9x5-clk-peripheral"; - #address-cells = <1>; - #size-cells = <0>; - clocks = <&mck>; - - dbgu_clk: dbgu_clk { - #clock-cells = <0>; - reg = <2>; - }; - - hsmc_clk: hsmc_clk { - #clock-cells = <0>; - reg = <5>; - }; - - pioA_clk: pioA_clk { - #clock-cells = <0>; - reg = <6>; - }; - - pioB_clk: pioB_clk { - #clock-cells = <0>; - reg = <7>; - }; - - pioC_clk: pioC_clk { - #clock-cells = <0>; - reg = <8>; - }; - - pioD_clk: pioD_clk { - #clock-cells = <0>; - reg = <9>; - }; - - pioE_clk: pioE_clk { - #clock-cells = <0>; - reg = <10>; - }; - - usart0_clk: usart0_clk { - #clock-cells = <0>; - reg = <12>; - atmel,clk-output-range = <0 83000000>; - }; - - usart1_clk: usart1_clk { - #clock-cells = <0>; - reg = <13>; - atmel,clk-output-range = <0 83000000>; - }; - - usart2_clk: usart2_clk { - #clock-cells = <0>; - reg = <14>; - atmel,clk-output-range = <0 83000000>; - }; - - usart3_clk: usart3_clk { - #clock-cells = <0>; - reg = <15>; - atmel,clk-output-range = <0 83000000>; - }; - - uart0_clk: uart0_clk { - #clock-cells = <0>; - reg = <16>; - atmel,clk-output-range = <0 83000000>; - }; - - twi0_clk: twi0_clk { - reg = <18>; - #clock-cells = <0>; - atmel,clk-output-range = <0 41500000>; - }; - - twi1_clk: twi1_clk { - #clock-cells = <0>; - reg = <19>; - atmel,clk-output-range = <0 41500000>; - }; - - twi2_clk: twi2_clk { - #clock-cells = <0>; - reg = <20>; - atmel,clk-output-range = <0 41500000>; - }; - - mci0_clk: mci0_clk { - #clock-cells = <0>; - reg = <21>; - }; - - mci1_clk: mci1_clk { - #clock-cells = <0>; - reg = <22>; - }; - - spi0_clk: spi0_clk { - #clock-cells = <0>; - reg = <24>; - atmel,clk-output-range = <0 166000000>; - }; - - spi1_clk: spi1_clk { - #clock-cells = <0>; - reg = <25>; - atmel,clk-output-range = <0 166000000>; - }; - - tcb0_clk: tcb0_clk { - #clock-cells = <0>; - reg = <26>; - atmel,clk-output-range = <0 166000000>; - }; - - pwm_clk: pwm_clk { - #clock-cells = <0>; - reg = <28>; - }; - - adc_clk: adc_clk { - #clock-cells = <0>; - reg = <29>; - atmel,clk-output-range = <0 83000000>; - }; - - dma0_clk: dma0_clk { - #clock-cells = <0>; - reg = <30>; - }; - - dma1_clk: dma1_clk { - #clock-cells = <0>; - reg = <31>; - }; - - uhphs_clk: uhphs_clk { - #clock-cells = <0>; - reg = <32>; - }; - - udphs_clk: udphs_clk { - #clock-cells = <0>; - reg = <33>; - }; - - isi_clk: isi_clk { - #clock-cells = <0>; - reg = <37>; - }; - - ssc0_clk: ssc0_clk { - #clock-cells = <0>; - reg = <38>; - atmel,clk-output-range = <0 83000000>; - }; - - ssc1_clk: ssc1_clk { - #clock-cells = <0>; - reg = <39>; - atmel,clk-output-range = <0 83000000>; - }; - - sha_clk: sha_clk { - #clock-cells = <0>; - reg = <42>; - }; - - aes_clk: aes_clk { - #clock-cells = <0>; - reg = <43>; - }; - - tdes_clk: tdes_clk { - #clock-cells = <0>; - reg = <44>; - }; - - trng_clk: trng_clk { - #clock-cells = <0>; - reg = <45>; - }; - - fuse_clk: fuse_clk { - #clock-cells = <0>; - reg = <48>; - }; - - mpddr_clk: mpddr_clk { - #clock-cells = <0>; - reg = <49>; - }; - }; + #clock-cells = <2>; + clocks = <&clk32k>, <&main_xtal>; + clock-names = "slow_clk", "main_xtal"; }; reset_controller: rstc@fffffe00 { @@ -1384,7 +1040,7 @@ compatible = "atmel,at91sam9260-pit"; reg = <0xfffffe30 0xf>; interrupts = <3 IRQ_TYPE_LEVEL_HIGH 5>; - clocks = <&mck>; + clocks = <&pmc PMC_TYPE_CORE PMC_MCK>; }; watchdog: watchdog@fffffe40 { @@ -1426,7 +1082,7 @@ reg = <0x00500000 0x100000 0xf8030000 0x4000>; interrupts = <33 IRQ_TYPE_LEVEL_HIGH 2>; - clocks = <&udphs_clk>, <&utmi>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 33>, <&pmc PMC_TYPE_CORE PMC_UTMI>; clock-names = "pclk", "hclk"; status = "disabled"; @@ -1540,7 +1196,7 @@ compatible = "atmel,at91rm9200-ohci", "usb-ohci"; reg = <0x00600000 0x100000>; interrupts = <32 IRQ_TYPE_LEVEL_HIGH 2>; - clocks = <&uhphs_clk>, <&uhphs_clk>, <&uhpck>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 32>, <&pmc PMC_TYPE_PERIPHERAL 32>, <&pmc PMC_TYPE_SYSTEM 6>; clock-names = "ohci_clk", "hclk", "uhpck"; status = "disabled"; }; @@ -1549,7 +1205,7 @@ compatible = "atmel,at91sam9g45-ehci", "usb-ehci"; reg = <0x00700000 0x100000>; interrupts = <32 IRQ_TYPE_LEVEL_HIGH 2>; - clocks = <&utmi>, <&uhphs_clk>; + clocks = <&pmc PMC_TYPE_CORE PMC_UTMI>, <&pmc PMC_TYPE_PERIPHERAL 32>; clock-names = "usb_clk", "ehci_clk"; status = "disabled"; }; @@ -1565,7 +1221,7 @@ 0x1 0x0 0x40000000 0x10000000 0x2 0x0 0x50000000 0x10000000 0x3 0x0 0x60000000 0x10000000>; - clocks = <&mck>; + clocks = <&pmc PMC_TYPE_CORE PMC_MCK>; status = "disabled"; nand_controller: nand-controller { diff --git a/arch/arm/boot/dts/sama5d3_can.dtsi b/arch/arm/boot/dts/sama5d3_can.dtsi index 2470dd3fff25..9ac29bf3f933 100644 --- a/arch/arm/boot/dts/sama5d3_can.dtsi +++ b/arch/arm/boot/dts/sama5d3_can.dtsi @@ -31,29 +31,13 @@ }; - pmc: pmc@fffffc00 { - periphck { - can0_clk: can0_clk { - #clock-cells = <0>; - reg = <40>; - atmel,clk-output-range = <0 83000000>; - }; - - can1_clk: can1_clk { - #clock-cells = <0>; - reg = <41>; - atmel,clk-output-range = <0 83000000>; - }; - }; - }; - can0: can@f000c000 { compatible = "atmel,at91sam9x5-can"; reg = <0xf000c000 0x300>; interrupts = <40 IRQ_TYPE_LEVEL_HIGH 3>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_can0_rx_tx>; - clocks = <&can0_clk>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 40>; clock-names = "can_clk"; status = "disabled"; }; @@ -64,7 +48,7 @@ interrupts = <41 IRQ_TYPE_LEVEL_HIGH 3>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_can1_rx_tx>; - clocks = <&can1_clk>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 41>; clock-names = "can_clk"; status = "disabled"; }; diff --git a/arch/arm/boot/dts/sama5d3_emac.dtsi b/arch/arm/boot/dts/sama5d3_emac.dtsi index 9aef414bcd2e..45226108850d 100644 --- a/arch/arm/boot/dts/sama5d3_emac.dtsi +++ b/arch/arm/boot/dts/sama5d3_emac.dtsi @@ -31,12 +31,6 @@ }; pmc: pmc@fffffc00 { - periphck { - macb1_clk: macb1_clk { - #clock-cells = <0>; - reg = <35>; - }; - }; }; macb1: ethernet@f802c000 { @@ -45,7 +39,7 @@ interrupts = <35 IRQ_TYPE_LEVEL_HIGH 3>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_macb1_rmii>; - clocks = <&macb1_clk>, <&macb1_clk>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 35>, <&pmc PMC_TYPE_PERIPHERAL 35>; clock-names = "hclk", "pclk"; status = "disabled"; }; diff --git a/arch/arm/boot/dts/sama5d3_gmac.dtsi b/arch/arm/boot/dts/sama5d3_gmac.dtsi index 3667765a138b..884df7a54dbb 100644 --- a/arch/arm/boot/dts/sama5d3_gmac.dtsi +++ b/arch/arm/boot/dts/sama5d3_gmac.dtsi @@ -63,22 +63,13 @@ }; }; - pmc: pmc@fffffc00 { - periphck { - macb0_clk: macb0_clk { - #clock-cells = <0>; - reg = <34>; - }; - }; - }; - macb0: ethernet@f0028000 { compatible = "atmel,sama5d3-gem"; reg = <0xf0028000 0x100>; interrupts = <34 IRQ_TYPE_LEVEL_HIGH 3>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_macb0_data_rgmii &pinctrl_macb0_signal_rgmii>; - clocks = <&macb0_clk>, <&macb0_clk>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 34>, <&pmc PMC_TYPE_PERIPHERAL 34>; clock-names = "hclk", "pclk"; status = "disabled"; }; diff --git a/arch/arm/boot/dts/sama5d3_lcd.dtsi b/arch/arm/boot/dts/sama5d3_lcd.dtsi index 2cf046cd4e99..308d2fc276d6 100644 --- a/arch/arm/boot/dts/sama5d3_lcd.dtsi +++ b/arch/arm/boot/dts/sama5d3_lcd.dtsi @@ -16,7 +16,7 @@ compatible = "atmel,sama5d3-hlcdc"; reg = <0xf0030000 0x2000>; interrupts = <36 IRQ_TYPE_LEVEL_HIGH 0>; - clocks = <&lcdc_clk>, <&lcdck>, <&clk32k>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 36>, <&pmc PMC_TYPE_SYSTEM 3>, <&clk32k>; clock-names = "periph_clk","sys_clk", "slow_clk"; status = "disabled"; @@ -192,23 +192,6 @@ }; }; }; - - pmc: pmc@fffffc00 { - periphck { - lcdc_clk: lcdc_clk { - #clock-cells = <0>; - reg = <36>; - }; - }; - - systemck { - lcdck: lcdck { - #clock-cells = <0>; - reg = <3>; - clocks = <&mck>; - }; - }; - }; }; }; }; diff --git a/arch/arm/boot/dts/sama5d3_mci2.dtsi b/arch/arm/boot/dts/sama5d3_mci2.dtsi index 3c83c1c36ac8..7141ee97ec3e 100644 --- a/arch/arm/boot/dts/sama5d3_mci2.dtsi +++ b/arch/arm/boot/dts/sama5d3_mci2.dtsi @@ -30,15 +30,6 @@ }; }; - pmc: pmc@fffffc00 { - periphck { - mci2_clk: mci2_clk { - #clock-cells = <0>; - reg = <23>; - }; - }; - }; - mmc2: mmc@f8004000 { compatible = "atmel,hsmci"; reg = <0xf8004000 0x600>; @@ -47,7 +38,7 @@ dma-names = "rxtx"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_mmc2_clk_cmd_dat0 &pinctrl_mmc2_dat1_3>; - clocks = <&mci2_clk>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 23>; clock-names = "mci_clk"; status = "disabled"; #address-cells = <1>; diff --git a/arch/arm/boot/dts/sama5d3_tcb1.dtsi b/arch/arm/boot/dts/sama5d3_tcb1.dtsi index 215802b8db30..2b18c5c2cc03 100644 --- a/arch/arm/boot/dts/sama5d3_tcb1.dtsi +++ b/arch/arm/boot/dts/sama5d3_tcb1.dtsi @@ -17,23 +17,13 @@ ahb { apb { - pmc: pmc@fffffc00 { - periphck { - tcb1_clk: tcb1_clk { - #clock-cells = <0>; - reg = <27>; - atmel,clk-output-range = <0 166000000>; - }; - }; - }; - tcb1: timer@f8014000 { compatible = "atmel,at91sam9x5-tcb", "simple-mfd", "syscon"; #address-cells = <1>; #size-cells = <0>; reg = <0xf8014000 0x100>; interrupts = <27 IRQ_TYPE_LEVEL_HIGH 0>; - clocks = <&tcb1_clk>, <&clk32k>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 27>, <&clk32k>; clock-names = "t0_clk", "slow_clk"; }; }; diff --git a/arch/arm/boot/dts/sama5d3_uart.dtsi b/arch/arm/boot/dts/sama5d3_uart.dtsi index cb62adbd28ed..a3eaba995cf4 100644 --- a/arch/arm/boot/dts/sama5d3_uart.dtsi +++ b/arch/arm/boot/dts/sama5d3_uart.dtsi @@ -36,29 +36,13 @@ }; }; - pmc: pmc@fffffc00 { - periphck { - uart0_clk: uart0_clk { - #clock-cells = <0>; - reg = <16>; - atmel,clk-output-range = <0 83000000>; - }; - - uart1_clk: uart1_clk { - #clock-cells = <0>; - reg = <17>; - atmel,clk-output-range = <0 83000000>; - }; - }; - }; - uart0: serial@f0024000 { compatible = "atmel,at91sam9260-usart"; reg = <0xf0024000 0x100>; interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart0>; - clocks = <&uart0_clk>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 16>; clock-names = "usart"; status = "disabled"; }; @@ -69,7 +53,7 @@ interrupts = <17 IRQ_TYPE_LEVEL_HIGH 5>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart1>; - clocks = <&uart1_clk>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 17>; clock-names = "usart"; status = "disabled"; }; diff --git a/arch/arm/boot/dts/sama5d3xmb.dtsi b/arch/arm/boot/dts/sama5d3xmb.dtsi index 35031bbc7e70..a499de8a7a64 100644 --- a/arch/arm/boot/dts/sama5d3xmb.dtsi +++ b/arch/arm/boot/dts/sama5d3xmb.dtsi @@ -46,7 +46,7 @@ wm8904: wm8904@1a { compatible = "wlf,wm8904"; reg = <0x1a>; - clocks = <&pck0>; + clocks = <&pmc PMC_TYPE_SYSTEM 8>; clock-names = "mclk"; }; }; @@ -60,9 +60,9 @@ resetb-gpios = <&pioE 24 GPIO_ACTIVE_LOW>; pwdn-gpios = <&pioE 29 GPIO_ACTIVE_HIGH>; /* use pck1 for the master clock of ov2640 */ - clocks = <&pck1>; + clocks = <&pmc PMC_TYPE_SYSTEM 9>; clock-names = "xvclk"; - assigned-clocks = <&pck1>; + assigned-clocks = <&pmc PMC_TYPE_SYSTEM 9>; assigned-clock-rates = <25000000>; port { diff --git a/arch/arm/boot/dts/sama5d3xmb_cmp.dtsi b/arch/arm/boot/dts/sama5d3xmb_cmp.dtsi index 8a6916a69da4..fa9e5e2a745d 100644 --- a/arch/arm/boot/dts/sama5d3xmb_cmp.dtsi +++ b/arch/arm/boot/dts/sama5d3xmb_cmp.dtsi @@ -45,7 +45,7 @@ wm8904: wm8904@1a { compatible = "wlf,wm8904"; reg = <0x1a>; - clocks = <&pck0>; + clocks = <&pmc PMC_TYPE_SYSTEM 8>; clock-names = "mclk"; }; }; @@ -59,9 +59,9 @@ resetb-gpios = <&pioE 24 GPIO_ACTIVE_LOW>; pwdn-gpios = <&pioE 29 GPIO_ACTIVE_HIGH>; /* use pck1 for the master clock of ov2640 */ - clocks = <&pck1>; + clocks = <&pmc PMC_TYPE_SYSTEM 9>; clock-names = "xvclk"; - assigned-clocks = <&pck1>; + assigned-clocks = <&pmc PMC_TYPE_SYSTEM 9>; assigned-clock-rates = <25000000>; port { From 82a5df83e444d4a8aef01c1ba81c38f5bb66b06a Mon Sep 17 00:00:00 2001 From: Alexandre Belloni Date: Thu, 16 Jan 2020 18:35:10 +0100 Subject: [PATCH 02/35] ARM: dts: at91: at91sam9n12: switch to new clock bindings Switch at91sam9n12 boards to the new PMC clock bindings. Link: https://lore.kernel.org/r/20200116173510.427403-1-alexandre.belloni@bootlin.com Signed-off-by: Alexandre Belloni --- arch/arm/boot/dts/at91sam9n12.dtsi | 324 +++------------------------- arch/arm/boot/dts/at91sam9n12ek.dts | 2 +- 2 files changed, 29 insertions(+), 297 deletions(-) diff --git a/arch/arm/boot/dts/at91sam9n12.dtsi b/arch/arm/boot/dts/at91sam9n12.dtsi index ea675174432e..a994d076dc7e 100644 --- a/arch/arm/boot/dts/at91sam9n12.dtsi +++ b/arch/arm/boot/dts/at91sam9n12.dtsi @@ -104,7 +104,7 @@ ramc0: ramc@ffffe800 { compatible = "atmel,at91sam9g45-ddramc"; reg = <0xffffe800 0x200>; - clocks = <&ddrck>; + clocks = <&pmc PMC_TYPE_SYSTEM 2>; clock-names = "ddrck"; }; @@ -116,278 +116,10 @@ pmc: pmc@fffffc00 { compatible = "atmel,at91sam9n12-pmc", "syscon"; reg = <0xfffffc00 0x200>; + #clock-cells = <2>; + clocks = <&clk32k>, <&main_xtal>; + clock-names = "slow_clk", "main_xtal"; interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; - interrupt-controller; - #address-cells = <1>; - #size-cells = <0>; - #interrupt-cells = <1>; - - main_rc_osc: main_rc_osc { - compatible = "atmel,at91sam9x5-clk-main-rc-osc"; - #clock-cells = <0>; - interrupts-extended = <&pmc AT91_PMC_MOSCRCS>; - clock-frequency = <12000000>; - clock-accuracy = <50000000>; - }; - - main_osc: main_osc { - compatible = "atmel,at91rm9200-clk-main-osc"; - #clock-cells = <0>; - interrupts-extended = <&pmc AT91_PMC_MOSCS>; - clocks = <&main_xtal>; - }; - - main: mainck { - compatible = "atmel,at91sam9x5-clk-main"; - #clock-cells = <0>; - interrupts-extended = <&pmc AT91_PMC_MOSCSELS>; - clocks = <&main_rc_osc>, <&main_osc>; - }; - - plla: pllack { - compatible = "atmel,at91rm9200-clk-pll"; - #clock-cells = <0>; - interrupts-extended = <&pmc AT91_PMC_LOCKA>; - clocks = <&main>; - reg = <0>; - atmel,clk-input-range = <2000000 32000000>; - #atmel,pll-clk-output-range-cells = <4>; - atmel,pll-clk-output-ranges = <745000000 800000000 0 0>, - <695000000 750000000 1 0>, - <645000000 700000000 2 0>, - <595000000 650000000 3 0>, - <545000000 600000000 0 1>, - <495000000 555000000 1 1>, - <445000000 500000000 2 1>, - <400000000 450000000 3 1>; - }; - - plladiv: plladivck { - compatible = "atmel,at91sam9x5-clk-plldiv"; - #clock-cells = <0>; - clocks = <&plla>; - }; - - pllb: pllbck { - compatible = "atmel,at91rm9200-clk-pll"; - #clock-cells = <0>; - interrupts-extended = <&pmc AT91_PMC_LOCKB>; - clocks = <&main>; - reg = <1>; - atmel,clk-input-range = <2000000 32000000>; - #atmel,pll-clk-output-range-cells = <3>; - atmel,pll-clk-output-ranges = <30000000 100000000 0>; - }; - - mck: masterck { - compatible = "atmel,at91sam9x5-clk-master"; - #clock-cells = <0>; - interrupts-extended = <&pmc AT91_PMC_MCKRDY>; - clocks = <&clk32k>, <&main>, <&plladiv>, <&pllb>; - atmel,clk-output-range = <0 133333333>; - atmel,clk-divisors = <1 2 4 3>; - atmel,master-clk-have-div3-pres; - }; - - usb: usbck { - compatible = "atmel,at91sam9n12-clk-usb"; - #clock-cells = <0>; - clocks = <&pllb>; - }; - - prog: progck { - compatible = "atmel,at91sam9x5-clk-programmable"; - #address-cells = <1>; - #size-cells = <0>; - interrupt-parent = <&pmc>; - clocks = <&clk32k>, <&main>, <&plladiv>, <&pllb>, <&mck>; - - prog0: prog0 { - #clock-cells = <0>; - reg = <0>; - interrupts = ; - }; - - prog1: prog1 { - #clock-cells = <0>; - reg = <1>; - interrupts = ; - }; - }; - - systemck { - compatible = "atmel,at91rm9200-clk-system"; - #address-cells = <1>; - #size-cells = <0>; - - ddrck: ddrck { - #clock-cells = <0>; - reg = <2>; - clocks = <&mck>; - }; - - lcdck: lcdck { - #clock-cells = <0>; - reg = <3>; - clocks = <&mck>; - }; - - uhpck: uhpck { - #clock-cells = <0>; - reg = <6>; - clocks = <&usb>; - }; - - udpck: udpck { - #clock-cells = <0>; - reg = <7>; - clocks = <&usb>; - }; - - pck0: pck0 { - #clock-cells = <0>; - reg = <8>; - clocks = <&prog0>; - }; - - pck1: pck1 { - #clock-cells = <0>; - reg = <9>; - clocks = <&prog1>; - }; - }; - - periphck { - compatible = "atmel,at91sam9x5-clk-peripheral"; - #address-cells = <1>; - #size-cells = <0>; - clocks = <&mck>; - - pioAB_clk: pioAB_clk { - #clock-cells = <0>; - reg = <2>; - }; - - pioCD_clk: pioCD_clk { - #clock-cells = <0>; - reg = <3>; - }; - - fuse_clk: fuse_clk { - #clock-cells = <0>; - reg = <4>; - }; - - usart0_clk: usart0_clk { - #clock-cells = <0>; - reg = <5>; - }; - - usart1_clk: usart1_clk { - #clock-cells = <0>; - reg = <6>; - }; - - usart2_clk: usart2_clk { - #clock-cells = <0>; - reg = <7>; - }; - - usart3_clk: usart3_clk { - #clock-cells = <0>; - reg = <8>; - }; - - twi0_clk: twi0_clk { - reg = <9>; - #clock-cells = <0>; - }; - - twi1_clk: twi1_clk { - #clock-cells = <0>; - reg = <10>; - }; - - mci0_clk: mci0_clk { - #clock-cells = <0>; - reg = <12>; - }; - - spi0_clk: spi0_clk { - #clock-cells = <0>; - reg = <13>; - }; - - spi1_clk: spi1_clk { - #clock-cells = <0>; - reg = <14>; - }; - - uart0_clk: uart0_clk { - #clock-cells = <0>; - reg = <15>; - }; - - uart1_clk: uart1_clk { - #clock-cells = <0>; - reg = <16>; - }; - - tcb_clk: tcb_clk { - #clock-cells = <0>; - reg = <17>; - }; - - pwm_clk: pwm_clk { - #clock-cells = <0>; - reg = <18>; - }; - - adc_clk: adc_clk { - #clock-cells = <0>; - reg = <19>; - }; - - dma0_clk: dma0_clk { - #clock-cells = <0>; - reg = <20>; - }; - - uhphs_clk: uhphs_clk { - #clock-cells = <0>; - reg = <22>; - }; - - udphs_clk: udphs_clk { - #clock-cells = <0>; - reg = <23>; - }; - - lcdc_clk: lcdc_clk { - #clock-cells = <0>; - reg = <25>; - }; - - sha_clk: sha_clk { - #clock-cells = <0>; - reg = <27>; - }; - - ssc0_clk: ssc0_clk { - #clock-cells = <0>; - reg = <28>; - }; - - aes_clk: aes_clk { - #clock-cells = <0>; - reg = <29>; - }; - - trng_clk: trng_clk { - #clock-cells = <0>; - reg = <30>; - }; - }; }; rstc@fffffe00 { @@ -400,7 +132,7 @@ compatible = "atmel,at91sam9260-pit"; reg = <0xfffffe30 0xf>; interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; - clocks = <&mck>; + clocks = <&pmc PMC_TYPE_CORE PMC_MCK>; }; shdwc@fffffe10 { @@ -439,7 +171,7 @@ interrupts = <12 IRQ_TYPE_LEVEL_HIGH 0>; dmas = <&dma 1 AT91_DMA_CFG_PER_ID(0)>; dma-names = "rxtx"; - clocks = <&mci0_clk>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 12>; clock-names = "mci_clk"; #address-cells = <1>; #size-cells = <0>; @@ -452,7 +184,7 @@ #size-cells = <0>; reg = <0xf8008000 0x100>; interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>; - clocks = <&tcb_clk>, <&clk32k>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 17>, <&clk32k>; clock-names = "t0_clk", "slow_clk"; }; @@ -462,7 +194,7 @@ #size-cells = <0>; reg = <0xf800c000 0x100>; interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>; - clocks = <&tcb_clk>, <&clk32k>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 17>, <&clk32k>; clock-names = "t0_clk", "slow_clk"; }; @@ -470,7 +202,7 @@ compatible = "atmel,at91sam9n12-hlcdc"; reg = <0xf8038000 0x2000>; interrupts = <25 IRQ_TYPE_LEVEL_HIGH 0>; - clocks = <&lcdc_clk>, <&lcdck>, <&clk32k>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 25>, <&pmc PMC_TYPE_SYSTEM 3>, <&clk32k>; clock-names = "periph_clk", "sys_clk", "slow_clk"; status = "disabled"; @@ -499,7 +231,7 @@ reg = <0xffffec00 0x200>; interrupts = <20 IRQ_TYPE_LEVEL_HIGH 0>; #dma-cells = <2>; - clocks = <&dma0_clk>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 20>; clock-names = "dma_clk"; }; @@ -817,7 +549,7 @@ gpio-controller; interrupt-controller; #interrupt-cells = <2>; - clocks = <&pioAB_clk>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 2>; }; pioB: gpio@fffff600 { @@ -828,7 +560,7 @@ gpio-controller; interrupt-controller; #interrupt-cells = <2>; - clocks = <&pioAB_clk>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 2>; }; pioC: gpio@fffff800 { @@ -839,7 +571,7 @@ gpio-controller; interrupt-controller; #interrupt-cells = <2>; - clocks = <&pioCD_clk>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 3>; }; pioD: gpio@fffffa00 { @@ -850,7 +582,7 @@ gpio-controller; interrupt-controller; #interrupt-cells = <2>; - clocks = <&pioCD_clk>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 3>; }; }; @@ -860,7 +592,7 @@ interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_dbgu>; - clocks = <&mck>; + clocks = <&pmc PMC_TYPE_CORE PMC_MCK>; clock-names = "usart"; status = "disabled"; }; @@ -874,7 +606,7 @@ dma-names = "tx", "rx"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>; - clocks = <&ssc0_clk>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 28>; clock-names = "pclk"; status = "disabled"; }; @@ -885,7 +617,7 @@ interrupts = <5 IRQ_TYPE_LEVEL_HIGH 5>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usart0>; - clocks = <&usart0_clk>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 5>; clock-names = "usart"; status = "disabled"; }; @@ -896,7 +628,7 @@ interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usart1>; - clocks = <&usart1_clk>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 6>; clock-names = "usart"; status = "disabled"; }; @@ -907,7 +639,7 @@ interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usart2>; - clocks = <&usart2_clk>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 7>; clock-names = "usart"; status = "disabled"; }; @@ -918,7 +650,7 @@ interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usart3>; - clocks = <&usart3_clk>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 8>; clock-names = "usart"; status = "disabled"; }; @@ -934,7 +666,7 @@ #size-cells = <0>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_i2c0>; - clocks = <&twi0_clk>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 9>; status = "disabled"; }; @@ -949,7 +681,7 @@ #size-cells = <0>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_i2c1>; - clocks = <&twi1_clk>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 10>; status = "disabled"; }; @@ -964,7 +696,7 @@ dma-names = "tx", "rx"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_spi0>; - clocks = <&spi0_clk>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 13>; clock-names = "spi_clk"; status = "disabled"; }; @@ -980,7 +712,7 @@ dma-names = "tx", "rx"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_spi1>; - clocks = <&spi1_clk>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 14>; clock-names = "spi_clk"; status = "disabled"; }; @@ -1009,7 +741,7 @@ reg = <0xf8034000 0x300>; interrupts = <18 IRQ_TYPE_LEVEL_HIGH 4>; #pwm-cells = <3>; - clocks = <&pwm_clk>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 18>; status = "disabled"; }; @@ -1017,7 +749,7 @@ compatible = "atmel,at91sam9260-udc"; reg = <0xf803c000 0x4000>; interrupts = <23 IRQ_TYPE_LEVEL_HIGH 2>; - clocks = <&udphs_clk>, <&udpck>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 23>, <&pmc PMC_TYPE_SYSTEM 7>; clock-names = "pclk", "hclk"; status = "disabled"; }; @@ -1027,7 +759,7 @@ compatible = "atmel,at91rm9200-ohci", "usb-ohci"; reg = <0x00500000 0x00100000>; interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>; - clocks = <&uhphs_clk>, <&uhphs_clk>, <&uhpck>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 22>, <&pmc PMC_TYPE_PERIPHERAL 22>, <&pmc PMC_TYPE_SYSTEM 6>; clock-names = "ohci_clk", "hclk", "uhpck"; status = "disabled"; }; @@ -1045,7 +777,7 @@ 0x3 0x0 0x40000000 0x10000000 0x4 0x0 0x50000000 0x10000000 0x5 0x0 0x60000000 0x10000000>; - clocks = <&mck>; + clocks = <&pmc PMC_TYPE_CORE PMC_MCK>; status = "disabled"; nand_controller: nand-controller { diff --git a/arch/arm/boot/dts/at91sam9n12ek.dts b/arch/arm/boot/dts/at91sam9n12ek.dts index d36e162a8817..870b83ff6b97 100644 --- a/arch/arm/boot/dts/at91sam9n12ek.dts +++ b/arch/arm/boot/dts/at91sam9n12ek.dts @@ -59,7 +59,7 @@ wm8904: codec@1a { compatible = "wlf,wm8904"; reg = <0x1a>; - clocks = <&pck0>; + clocks = <&pmc PMC_TYPE_SYSTEM 8>; clock-names = "mclk"; }; From 15090390cac613ab2d0db416e3e5f1699bf21547 Mon Sep 17 00:00:00 2001 From: Alexandre Belloni Date: Fri, 17 Jan 2020 22:06:19 +0100 Subject: [PATCH 03/35] ARM: dts: at91: at91sam9g45: switch to new clock bindings Switch at91sam9g45 boards to the new PMC clock bindings. Link: https://lore.kernel.org/r/20200117210619.17768-1-alexandre.belloni@bootlin.com Signed-off-by: Alexandre Belloni --- arch/arm/boot/dts/at91sam9g45.dtsi | 338 +++---------------------- arch/arm/boot/dts/at91sam9m10g45ek.dts | 4 +- 2 files changed, 40 insertions(+), 302 deletions(-) diff --git a/arch/arm/boot/dts/at91sam9g45.dtsi b/arch/arm/boot/dts/at91sam9g45.dtsi index fd179097a4bf..3034c23e697d 100644 --- a/arch/arm/boot/dts/at91sam9g45.dtsi +++ b/arch/arm/boot/dts/at91sam9g45.dtsi @@ -103,14 +103,14 @@ ramc0: ramc@ffffe400 { compatible = "atmel,at91sam9g45-ddramc"; reg = <0xffffe400 0x200>; - clocks = <&ddrck>; + clocks = <&pmc PMC_TYPE_SYSTEM 2>; clock-names = "ddrck"; }; ramc1: ramc@ffffe600 { compatible = "atmel,at91sam9g45-ddramc"; reg = <0xffffe600 0x200>; - clocks = <&ddrck>; + clocks = <&pmc PMC_TYPE_SYSTEM 2>; clock-names = "ddrck"; }; @@ -128,271 +128,9 @@ compatible = "atmel,at91sam9g45-pmc", "syscon"; reg = <0xfffffc00 0x100>; interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; - interrupt-controller; - #address-cells = <1>; - #size-cells = <0>; - #interrupt-cells = <1>; - - main_osc: main_osc { - compatible = "atmel,at91rm9200-clk-main-osc"; - #clock-cells = <0>; - interrupts-extended = <&pmc AT91_PMC_MOSCS>; - clocks = <&main_xtal>; - }; - - main: mainck { - compatible = "atmel,at91rm9200-clk-main"; - #clock-cells = <0>; - clocks = <&main_osc>; - }; - - plla: pllack { - compatible = "atmel,at91rm9200-clk-pll"; - #clock-cells = <0>; - interrupts-extended = <&pmc AT91_PMC_LOCKA>; - clocks = <&main>; - reg = <0>; - atmel,clk-input-range = <2000000 32000000>; - #atmel,pll-clk-output-range-cells = <4>; - atmel,pll-clk-output-ranges = <745000000 800000000 0 0 - 695000000 750000000 1 0 - 645000000 700000000 2 0 - 595000000 650000000 3 0 - 545000000 600000000 0 1 - 495000000 555000000 1 1 - 445000000 500000000 2 1 - 400000000 450000000 3 1>; - }; - - plladiv: plladivck { - compatible = "atmel,at91sam9x5-clk-plldiv"; - #clock-cells = <0>; - clocks = <&plla>; - }; - - utmi: utmick { - compatible = "atmel,at91sam9x5-clk-utmi"; - #clock-cells = <0>; - interrupts-extended = <&pmc AT91_PMC_LOCKU>; - clocks = <&main>; - }; - - mck: masterck { - compatible = "atmel,at91rm9200-clk-master"; - #clock-cells = <0>; - interrupts-extended = <&pmc AT91_PMC_MCKRDY>; - clocks = <&clk32k>, <&main>, <&plladiv>, <&utmi>; - atmel,clk-output-range = <0 133333333>; - atmel,clk-divisors = <1 2 4 3>; - }; - - usb: usbck { - compatible = "atmel,at91sam9x5-clk-usb"; - #clock-cells = <0>; - clocks = <&plladiv>, <&utmi>; - }; - - prog: progck { - compatible = "atmel,at91sam9g45-clk-programmable"; - #address-cells = <1>; - #size-cells = <0>; - interrupt-parent = <&pmc>; - clocks = <&clk32k>, <&main>, <&plladiv>, <&utmi>, <&mck>; - - prog0: prog0 { - #clock-cells = <0>; - reg = <0>; - interrupts = ; - }; - - prog1: prog1 { - #clock-cells = <0>; - reg = <1>; - interrupts = ; - }; - }; - - systemck { - compatible = "atmel,at91rm9200-clk-system"; - #address-cells = <1>; - #size-cells = <0>; - - ddrck: ddrck { - #clock-cells = <0>; - reg = <2>; - clocks = <&mck>; - }; - - uhpck: uhpck { - #clock-cells = <0>; - reg = <6>; - clocks = <&usb>; - }; - - pck0: pck0 { - #clock-cells = <0>; - reg = <8>; - clocks = <&prog0>; - }; - - pck1: pck1 { - #clock-cells = <0>; - reg = <9>; - clocks = <&prog1>; - }; - }; - - periphck { - compatible = "atmel,at91rm9200-clk-peripheral"; - #address-cells = <1>; - #size-cells = <0>; - clocks = <&mck>; - - pioA_clk: pioA_clk { - #clock-cells = <0>; - reg = <2>; - }; - - pioB_clk: pioB_clk { - #clock-cells = <0>; - reg = <3>; - }; - - pioC_clk: pioC_clk { - #clock-cells = <0>; - reg = <4>; - }; - - pioDE_clk: pioDE_clk { - #clock-cells = <0>; - reg = <5>; - }; - - trng_clk: trng_clk { - #clock-cells = <0>; - reg = <6>; - }; - - usart0_clk: usart0_clk { - #clock-cells = <0>; - reg = <7>; - }; - - usart1_clk: usart1_clk { - #clock-cells = <0>; - reg = <8>; - }; - - usart2_clk: usart2_clk { - #clock-cells = <0>; - reg = <9>; - }; - - usart3_clk: usart3_clk { - #clock-cells = <0>; - reg = <10>; - }; - - mci0_clk: mci0_clk { - #clock-cells = <0>; - reg = <11>; - }; - - twi0_clk: twi0_clk { - #clock-cells = <0>; - reg = <12>; - }; - - twi1_clk: twi1_clk { - #clock-cells = <0>; - reg = <13>; - }; - - spi0_clk: spi0_clk { - #clock-cells = <0>; - reg = <14>; - }; - - spi1_clk: spi1_clk { - #clock-cells = <0>; - reg = <15>; - }; - - ssc0_clk: ssc0_clk { - #clock-cells = <0>; - reg = <16>; - }; - - ssc1_clk: ssc1_clk { - #clock-cells = <0>; - reg = <17>; - }; - - tcb0_clk: tcb0_clk { - #clock-cells = <0>; - reg = <18>; - }; - - pwm_clk: pwm_clk { - #clock-cells = <0>; - reg = <19>; - }; - - adc_clk: adc_clk { - #clock-cells = <0>; - reg = <20>; - }; - - dma0_clk: dma0_clk { - #clock-cells = <0>; - reg = <21>; - }; - - uhphs_clk: uhphs_clk { - #clock-cells = <0>; - reg = <22>; - }; - - lcd_clk: lcd_clk { - #clock-cells = <0>; - reg = <23>; - }; - - ac97_clk: ac97_clk { - #clock-cells = <0>; - reg = <24>; - }; - - macb0_clk: macb0_clk { - #clock-cells = <0>; - reg = <25>; - }; - - isi_clk: isi_clk { - #clock-cells = <0>; - reg = <26>; - }; - - udphs_clk: udphs_clk { - #clock-cells = <0>; - reg = <27>; - }; - - aestdessha_clk: aestdessha_clk { - #clock-cells = <0>; - reg = <28>; - }; - - mci1_clk: mci1_clk { - #clock-cells = <0>; - reg = <29>; - }; - - vdec_clk: vdec_clk { - #clock-cells = <0>; - reg = <30>; - }; - }; + #clock-cells = <2>; + clocks = <&clk32k>, <&main_xtal>; + clock-names = "slow_clk", "main_xtal"; }; rstc@fffffd00 { @@ -405,7 +143,7 @@ compatible = "atmel,at91sam9260-pit"; reg = <0xfffffd30 0xf>; interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; - clocks = <&mck>; + clocks = <&pmc PMC_TYPE_CORE PMC_MCK>; }; @@ -421,7 +159,7 @@ #size-cells = <0>; reg = <0xfff7c000 0x100>; interrupts = <18 IRQ_TYPE_LEVEL_HIGH 0>; - clocks = <&tcb0_clk>, <&tcb0_clk>, <&tcb0_clk>, <&clk32k>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 18>, <&pmc PMC_TYPE_PERIPHERAL 18>, <&pmc PMC_TYPE_PERIPHERAL 18>, <&clk32k>; clock-names = "t0_clk", "t1_clk", "t2_clk", "slow_clk"; }; @@ -431,7 +169,7 @@ #size-cells = <0>; reg = <0xfffd4000 0x100>; interrupts = <18 IRQ_TYPE_LEVEL_HIGH 0>; - clocks = <&tcb0_clk>, <&tcb0_clk>, <&tcb0_clk>, <&clk32k>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 18>, <&pmc PMC_TYPE_PERIPHERAL 18>, <&pmc PMC_TYPE_PERIPHERAL 18>, <&clk32k>; clock-names = "t0_clk", "t1_clk", "t2_clk", "slow_clk"; }; @@ -440,7 +178,7 @@ reg = <0xffffec00 0x200>; interrupts = <21 IRQ_TYPE_LEVEL_HIGH 0>; #dma-cells = <2>; - clocks = <&dma0_clk>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 21>; clock-names = "dma_clk"; }; @@ -883,7 +621,7 @@ gpio-controller; interrupt-controller; #interrupt-cells = <2>; - clocks = <&pioA_clk>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 2>; }; pioB: gpio@fffff400 { @@ -894,7 +632,7 @@ gpio-controller; interrupt-controller; #interrupt-cells = <2>; - clocks = <&pioB_clk>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 3>; }; pioC: gpio@fffff600 { @@ -905,7 +643,7 @@ gpio-controller; interrupt-controller; #interrupt-cells = <2>; - clocks = <&pioC_clk>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 4>; }; pioD: gpio@fffff800 { @@ -916,7 +654,7 @@ gpio-controller; interrupt-controller; #interrupt-cells = <2>; - clocks = <&pioDE_clk>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 5>; }; pioE: gpio@fffffa00 { @@ -927,7 +665,7 @@ gpio-controller; interrupt-controller; #interrupt-cells = <2>; - clocks = <&pioDE_clk>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 5>; }; }; @@ -937,7 +675,7 @@ interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_dbgu>; - clocks = <&mck>; + clocks = <&pmc PMC_TYPE_CORE PMC_MCK>; clock-names = "usart"; status = "disabled"; }; @@ -950,7 +688,7 @@ atmel,use-dma-tx; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usart0>; - clocks = <&usart0_clk>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 7>; clock-names = "usart"; status = "disabled"; }; @@ -963,7 +701,7 @@ atmel,use-dma-tx; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usart1>; - clocks = <&usart1_clk>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 8>; clock-names = "usart"; status = "disabled"; }; @@ -976,7 +714,7 @@ atmel,use-dma-tx; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usart2>; - clocks = <&usart2_clk>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 9>; clock-names = "usart"; status = "disabled"; }; @@ -989,7 +727,7 @@ atmel,use-dma-tx; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usart3>; - clocks = <&usart3_clk>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 10>; clock-names = "usart"; status = "disabled"; }; @@ -1000,7 +738,7 @@ interrupts = <25 IRQ_TYPE_LEVEL_HIGH 3>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_macb_rmii>; - clocks = <&macb0_clk>, <&macb0_clk>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 25>, <&pmc PMC_TYPE_PERIPHERAL 25>; clock-names = "hclk", "pclk"; status = "disabled"; }; @@ -1009,7 +747,7 @@ compatible = "atmel,at91sam9g45-trng"; reg = <0xfffcc000 0x100>; interrupts = <6 IRQ_TYPE_LEVEL_HIGH 0>; - clocks = <&trng_clk>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 6>; }; i2c0: i2c@fff84000 { @@ -1020,7 +758,7 @@ pinctrl-0 = <&pinctrl_i2c0>; #address-cells = <1>; #size-cells = <0>; - clocks = <&twi0_clk>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 12>; status = "disabled"; }; @@ -1032,7 +770,7 @@ pinctrl-0 = <&pinctrl_i2c1>; #address-cells = <1>; #size-cells = <0>; - clocks = <&twi1_clk>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 13>; status = "disabled"; }; @@ -1042,7 +780,7 @@ interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>; - clocks = <&ssc0_clk>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 16>; clock-names = "pclk"; status = "disabled"; }; @@ -1053,7 +791,7 @@ interrupts = <17 IRQ_TYPE_LEVEL_HIGH 5>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>; - clocks = <&ssc1_clk>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 17>; clock-names = "pclk"; status = "disabled"; }; @@ -1064,7 +802,7 @@ interrupts = <24 IRQ_TYPE_LEVEL_HIGH 4>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_ac97>; - clocks = <&ac97_clk>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 24>; clock-names = "ac97_clk"; status = "disabled"; }; @@ -1075,7 +813,7 @@ compatible = "atmel,at91sam9g45-adc"; reg = <0xfffb0000 0x100>; interrupts = <20 IRQ_TYPE_LEVEL_HIGH 0>; - clocks = <&adc_clk>, <&adc_op_clk>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 20>, <&adc_op_clk>; clock-names = "adc_clk", "adc_op_clk"; atmel,adc-channels-used = <0xff>; atmel,adc-vref = <3300>; @@ -1111,7 +849,7 @@ compatible = "atmel,at91sam9g45-isi"; reg = <0xfffb4000 0x4000>; interrupts = <26 IRQ_TYPE_LEVEL_HIGH 5>; - clocks = <&isi_clk>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 26>; clock-names = "isi_clk"; status = "disabled"; port { @@ -1125,7 +863,7 @@ reg = <0xfffb8000 0x300>; interrupts = <19 IRQ_TYPE_LEVEL_HIGH 4>; #pwm-cells = <3>; - clocks = <&pwm_clk>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 19>; status = "disabled"; }; @@ -1138,7 +876,7 @@ dma-names = "rxtx"; #address-cells = <1>; #size-cells = <0>; - clocks = <&mci0_clk>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 11>; clock-names = "mci_clk"; status = "disabled"; }; @@ -1152,7 +890,7 @@ dma-names = "rxtx"; #address-cells = <1>; #size-cells = <0>; - clocks = <&mci1_clk>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 29>; clock-names = "mci_clk"; status = "disabled"; }; @@ -1176,7 +914,7 @@ interrupts = <14 4 3>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_spi0>; - clocks = <&spi0_clk>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 14>; clock-names = "spi_clk"; status = "disabled"; }; @@ -1189,7 +927,7 @@ interrupts = <15 4 3>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_spi1>; - clocks = <&spi1_clk>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 15>; clock-names = "spi_clk"; status = "disabled"; }; @@ -1201,7 +939,7 @@ reg = <0x00600000 0x80000 0xfff78000 0x400>; interrupts = <27 IRQ_TYPE_LEVEL_HIGH 0>; - clocks = <&udphs_clk>, <&utmi>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 27>, <&pmc PMC_TYPE_CORE PMC_UTMI>; clock-names = "pclk", "hclk"; status = "disabled"; @@ -1294,7 +1032,7 @@ interrupts = <23 IRQ_TYPE_LEVEL_HIGH 3>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_fb>; - clocks = <&lcd_clk>, <&lcd_clk>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 23>, <&pmc PMC_TYPE_PERIPHERAL 23>; clock-names = "hclk", "lcdc_clk"; status = "disabled"; }; @@ -1303,7 +1041,7 @@ compatible = "atmel,at91rm9200-ohci", "usb-ohci"; reg = <0x00700000 0x100000>; interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>; - clocks = <&uhphs_clk>, <&uhphs_clk>, <&uhpck>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 22>, <&pmc PMC_TYPE_PERIPHERAL 22>, <&pmc PMC_TYPE_SYSTEM 6>; clock-names = "ohci_clk", "hclk", "uhpck"; status = "disabled"; }; @@ -1312,7 +1050,7 @@ compatible = "atmel,at91sam9g45-ehci", "usb-ehci"; reg = <0x00800000 0x100000>; interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>; - clocks = <&utmi>, <&uhphs_clk>; + clocks = <&pmc PMC_TYPE_CORE PMC_UTMI>, <&pmc PMC_TYPE_PERIPHERAL 22>; clock-names = "usb_clk", "ehci_clk"; status = "disabled"; }; @@ -1330,7 +1068,7 @@ 0x3 0x0 0x40000000 0x10000000 0x4 0x0 0x50000000 0x10000000 0x5 0x0 0x60000000 0x10000000>; - clocks = <&mck>; + clocks = <&pmc PMC_TYPE_CORE PMC_MCK>; status = "disabled"; nand_controller: nand-controller { diff --git a/arch/arm/boot/dts/at91sam9m10g45ek.dts b/arch/arm/boot/dts/at91sam9m10g45ek.dts index 84bed6f55fcd..a3a5c82d9f29 100644 --- a/arch/arm/boot/dts/at91sam9m10g45ek.dts +++ b/arch/arm/boot/dts/at91sam9m10g45ek.dts @@ -72,9 +72,9 @@ pinctrl-0 = <&pinctrl_pck1_as_isi_mck &pinctrl_sensor_power &pinctrl_sensor_reset>; resetb-gpios = <&pioD 12 GPIO_ACTIVE_LOW>; pwdn-gpios = <&pioD 13 GPIO_ACTIVE_HIGH>; - clocks = <&pck1>; + clocks = <&pmc PMC_TYPE_SYSTEM 9>; clock-names = "xvclk"; - assigned-clocks = <&pck1>; + assigned-clocks = <&pmc PMC_TYPE_SYSTEM 9>; assigned-clock-rates = <25000000>; port { From 0e0e528d8260f10d32d6bc58fc987d553f3148a2 Mon Sep 17 00:00:00 2001 From: Alexandre Belloni Date: Tue, 24 Mar 2020 13:41:54 +0100 Subject: [PATCH 04/35] ARM: dts: at91: rm9200: switch to new clock bindings Switch at91rm9200 boards to the new PMC clock bindings. Link: https://lore.kernel.org/r/20200324124154.368335-1-alexandre.belloni@bootlin.com Signed-off-by: Alexandre Belloni --- arch/arm/boot/dts/at91rm9200.dtsi | 296 +++--------------------------- 1 file changed, 23 insertions(+), 273 deletions(-) diff --git a/arch/arm/boot/dts/at91rm9200.dtsi b/arch/arm/boot/dts/at91rm9200.dtsi index 44385718d9d4..a5040f5ea641 100644 --- a/arch/arm/boot/dts/at91rm9200.dtsi +++ b/arch/arm/boot/dts/at91rm9200.dtsi @@ -101,259 +101,9 @@ compatible = "atmel,at91rm9200-pmc", "syscon"; reg = <0xfffffc00 0x100>; interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; - interrupt-controller; - #address-cells = <1>; - #size-cells = <0>; - #interrupt-cells = <1>; - - main_osc: main_osc { - compatible = "atmel,at91rm9200-clk-main-osc"; - #clock-cells = <0>; - interrupts-extended = <&pmc AT91_PMC_MOSCS>; - clocks = <&main_xtal>; - }; - - main: mainck { - compatible = "atmel,at91rm9200-clk-main"; - #clock-cells = <0>; - clocks = <&main_osc>; - }; - - plla: pllack { - compatible = "atmel,at91rm9200-clk-pll"; - #clock-cells = <0>; - interrupts-extended = <&pmc AT91_PMC_LOCKA>; - clocks = <&main>; - reg = <0>; - atmel,clk-input-range = <1000000 32000000>; - #atmel,pll-clk-output-range-cells = <3>; - atmel,pll-clk-output-ranges = <80000000 160000000 0>, - <150000000 180000000 2>; - }; - - pllb: pllbck { - compatible = "atmel,at91rm9200-clk-pll"; - #clock-cells = <0>; - interrupts-extended = <&pmc AT91_PMC_LOCKB>; - clocks = <&main>; - reg = <1>; - atmel,clk-input-range = <1000000 32000000>; - #atmel,pll-clk-output-range-cells = <3>; - atmel,pll-clk-output-ranges = <80000000 160000000 0>, - <150000000 180000000 2>; - }; - - mck: masterck { - compatible = "atmel,at91rm9200-clk-master"; - #clock-cells = <0>; - interrupts-extended = <&pmc AT91_PMC_MCKRDY>; - clocks = <&slow_xtal>, <&main>, <&plla>, <&pllb>; - atmel,clk-output-range = <0 80000000>; - atmel,clk-divisors = <1 2 3 4>; - }; - - usb: usbck { - compatible = "atmel,at91rm9200-clk-usb"; - #clock-cells = <0>; - atmel,clk-divisors = <1 2 0 0>; - clocks = <&pllb>; - }; - - prog: progck { - compatible = "atmel,at91rm9200-clk-programmable"; - #address-cells = <1>; - #size-cells = <0>; - interrupt-parent = <&pmc>; - clocks = <&slow_xtal>, <&main>, <&plla>, <&pllb>; - - prog0: prog0 { - #clock-cells = <0>; - reg = <0>; - interrupts = ; - }; - - prog1: prog1 { - #clock-cells = <0>; - reg = <1>; - interrupts = ; - }; - - prog2: prog2 { - #clock-cells = <0>; - reg = <2>; - interrupts = ; - }; - - prog3: prog3 { - #clock-cells = <0>; - reg = <3>; - interrupts = ; - }; - }; - - systemck { - compatible = "atmel,at91rm9200-clk-system"; - #address-cells = <1>; - #size-cells = <0>; - - udpck: udpck { - #clock-cells = <0>; - reg = <2>; - clocks = <&usb>; - }; - - uhpck: uhpck { - #clock-cells = <0>; - reg = <4>; - clocks = <&usb>; - }; - - pck0: pck0 { - #clock-cells = <0>; - reg = <8>; - clocks = <&prog0>; - }; - - pck1: pck1 { - #clock-cells = <0>; - reg = <9>; - clocks = <&prog1>; - }; - - pck2: pck2 { - #clock-cells = <0>; - reg = <10>; - clocks = <&prog2>; - }; - - pck3: pck3 { - #clock-cells = <0>; - reg = <11>; - clocks = <&prog3>; - }; - }; - - periphck { - compatible = "atmel,at91rm9200-clk-peripheral"; - #address-cells = <1>; - #size-cells = <0>; - clocks = <&mck>; - - pioA_clk: pioA_clk { - #clock-cells = <0>; - reg = <2>; - }; - - pioB_clk: pioB_clk { - #clock-cells = <0>; - reg = <3>; - }; - - pioC_clk: pioC_clk { - #clock-cells = <0>; - reg = <4>; - }; - - pioD_clk: pioD_clk { - #clock-cells = <0>; - reg = <5>; - }; - - usart0_clk: usart0_clk { - #clock-cells = <0>; - reg = <6>; - }; - - usart1_clk: usart1_clk { - #clock-cells = <0>; - reg = <7>; - }; - - usart2_clk: usart2_clk { - #clock-cells = <0>; - reg = <8>; - }; - - usart3_clk: usart3_clk { - #clock-cells = <0>; - reg = <9>; - }; - - mci0_clk: mci0_clk { - #clock-cells = <0>; - reg = <10>; - }; - - udc_clk: udc_clk { - #clock-cells = <0>; - reg = <11>; - }; - - twi0_clk: twi0_clk { - reg = <12>; - #clock-cells = <0>; - }; - - spi0_clk: spi0_clk { - #clock-cells = <0>; - reg = <13>; - }; - - ssc0_clk: ssc0_clk { - #clock-cells = <0>; - reg = <14>; - }; - - ssc1_clk: ssc1_clk { - #clock-cells = <0>; - reg = <15>; - }; - - ssc2_clk: ssc2_clk { - #clock-cells = <0>; - reg = <16>; - }; - - tc0_clk: tc0_clk { - #clock-cells = <0>; - reg = <17>; - }; - - tc1_clk: tc1_clk { - #clock-cells = <0>; - reg = <18>; - }; - - tc2_clk: tc2_clk { - #clock-cells = <0>; - reg = <19>; - }; - - tc3_clk: tc3_clk { - #clock-cells = <0>; - reg = <20>; - }; - - tc4_clk: tc4_clk { - #clock-cells = <0>; - reg = <21>; - }; - - tc5_clk: tc5_clk { - #clock-cells = <0>; - reg = <22>; - }; - - ohci_clk: ohci_clk { - #clock-cells = <0>; - reg = <23>; - }; - - macb0_clk: macb0_clk { - #clock-cells = <0>; - reg = <24>; - }; - }; + #clock-cells = <2>; + clocks = <&slow_xtal>, <&main_xtal>; + clock-names = "slow_xtal", "main_xtal"; }; st: timer@fffffd00 { @@ -383,7 +133,7 @@ interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0 18 IRQ_TYPE_LEVEL_HIGH 0 19 IRQ_TYPE_LEVEL_HIGH 0>; - clocks = <&tc0_clk>, <&tc1_clk>, <&tc2_clk>, <&slow_xtal>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 17>, <&pmc PMC_TYPE_PERIPHERAL 18>, <&pmc PMC_TYPE_PERIPHERAL 19>, <&slow_xtal>; clock-names = "t0_clk", "t1_clk", "t2_clk", "slow_clk"; }; @@ -395,7 +145,7 @@ interrupts = <20 IRQ_TYPE_LEVEL_HIGH 0 21 IRQ_TYPE_LEVEL_HIGH 0 22 IRQ_TYPE_LEVEL_HIGH 0>; - clocks = <&tc3_clk>, <&tc4_clk>, <&tc5_clk>, <&slow_xtal>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 20>, <&pmc PMC_TYPE_PERIPHERAL 21>, <&pmc PMC_TYPE_PERIPHERAL 22>, <&slow_xtal>; clock-names = "t0_clk", "t1_clk", "t2_clk", "slow_clk"; }; @@ -405,7 +155,7 @@ interrupts = <12 IRQ_TYPE_LEVEL_HIGH 6>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_twi>; - clocks = <&twi0_clk>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 12>; #address-cells = <1>; #size-cells = <0>; status = "disabled"; @@ -415,7 +165,7 @@ compatible = "atmel,hsmci"; reg = <0xfffb4000 0x4000>; interrupts = <10 IRQ_TYPE_LEVEL_HIGH 0>; - clocks = <&mci0_clk>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 10>; clock-names = "mci_clk"; #address-cells = <1>; #size-cells = <0>; @@ -429,7 +179,7 @@ interrupts = <14 IRQ_TYPE_LEVEL_HIGH 5>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>; - clocks = <&ssc0_clk>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 14>; clock-names = "pclk"; status = "disabled"; }; @@ -440,7 +190,7 @@ interrupts = <15 IRQ_TYPE_LEVEL_HIGH 5>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>; - clocks = <&ssc1_clk>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 15>; clock-names = "pclk"; status = "disabled"; }; @@ -451,7 +201,7 @@ interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_ssc2_tx &pinctrl_ssc2_rx>; - clocks = <&ssc2_clk>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 16>; clock-names = "pclk"; status = "disabled"; }; @@ -463,7 +213,7 @@ phy-mode = "rmii"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_macb_rmii>; - clocks = <&macb0_clk>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 24>; clock-names = "ether_clk"; status = "disabled"; }; @@ -803,7 +553,7 @@ gpio-controller; interrupt-controller; #interrupt-cells = <2>; - clocks = <&pioA_clk>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 2>; }; pioB: gpio@fffff600 { @@ -814,7 +564,7 @@ gpio-controller; interrupt-controller; #interrupt-cells = <2>; - clocks = <&pioB_clk>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 3>; }; pioC: gpio@fffff800 { @@ -825,7 +575,7 @@ gpio-controller; interrupt-controller; #interrupt-cells = <2>; - clocks = <&pioC_clk>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 4>; }; pioD: gpio@fffffa00 { @@ -836,7 +586,7 @@ gpio-controller; interrupt-controller; #interrupt-cells = <2>; - clocks = <&pioD_clk>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 5>; }; }; @@ -846,7 +596,7 @@ interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_dbgu>; - clocks = <&mck>; + clocks = <&pmc PMC_TYPE_CORE PMC_MCK>; clock-names = "usart"; status = "disabled"; }; @@ -859,7 +609,7 @@ atmel,use-dma-tx; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart0>; - clocks = <&usart0_clk>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 6>; clock-names = "usart"; status = "disabled"; }; @@ -872,7 +622,7 @@ atmel,use-dma-tx; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart1>; - clocks = <&usart1_clk>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 7>; clock-names = "usart"; status = "disabled"; }; @@ -885,7 +635,7 @@ atmel,use-dma-tx; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart2>; - clocks = <&usart2_clk>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 8>; clock-names = "usart"; status = "disabled"; }; @@ -898,7 +648,7 @@ atmel,use-dma-tx; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart3>; - clocks = <&usart3_clk>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 9>; clock-names = "usart"; status = "disabled"; }; @@ -907,7 +657,7 @@ compatible = "atmel,at91rm9200-udc"; reg = <0xfffb0000 0x4000>; interrupts = <11 IRQ_TYPE_LEVEL_HIGH 2>; - clocks = <&udc_clk>, <&udpck>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 11>, <&pmc PMC_TYPE_SYSTEM 2>; clock-names = "pclk", "hclk"; status = "disabled"; }; @@ -920,7 +670,7 @@ interrupts = <13 IRQ_TYPE_LEVEL_HIGH 3>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_spi0>; - clocks = <&spi0_clk>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 13>; clock-names = "spi_clk"; status = "disabled"; }; @@ -947,7 +697,7 @@ compatible = "atmel,at91rm9200-ohci", "usb-ohci"; reg = <0x00300000 0x100000>; interrupts = <23 IRQ_TYPE_LEVEL_HIGH 2>; - clocks = <&ohci_clk>, <&ohci_clk>, <&uhpck>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 23>, <&pmc PMC_TYPE_PERIPHERAL 23>, <&pmc PMC_TYPE_SYSTEM 4>; clock-names = "ohci_clk", "hclk", "uhpck"; status = "disabled"; }; From a1af7f36c70369b971ee1cf679dd68368dad23f0 Mon Sep 17 00:00:00 2001 From: Ludovic Desroches Date: Thu, 2 Apr 2020 00:15:00 +0200 Subject: [PATCH 05/35] ARM: dts: at91: sama5d2_ptc_ek: fix sdmmc0 node description Remove non-removable and mmc-ddr-1_8v properties from the sdmmc0 node which come probably from an unchecked copy/paste. Signed-off-by: Ludovic Desroches Fixes:42ed535595ec "ARM: dts: at91: introduce the sama5d2 ptc ek board" Cc: stable@vger.kernel.org # 4.19 and later Link: https://lore.kernel.org/r/20200401221504.41196-1-ludovic.desroches@microchip.com Signed-off-by: Alexandre Belloni --- arch/arm/boot/dts/at91-sama5d2_ptc_ek.dts | 2 -- 1 file changed, 2 deletions(-) diff --git a/arch/arm/boot/dts/at91-sama5d2_ptc_ek.dts b/arch/arm/boot/dts/at91-sama5d2_ptc_ek.dts index 1c24ac8019ba..772809c54c1f 100644 --- a/arch/arm/boot/dts/at91-sama5d2_ptc_ek.dts +++ b/arch/arm/boot/dts/at91-sama5d2_ptc_ek.dts @@ -125,8 +125,6 @@ bus-width = <8>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_sdmmc0_default>; - non-removable; - mmc-ddr-1_8v; status = "okay"; }; From baa998aecb75c04d62be0a4ab6b724af6d73a0f9 Mon Sep 17 00:00:00 2001 From: Ludovic Desroches Date: Thu, 2 Apr 2020 00:19:47 +0200 Subject: [PATCH 06/35] ARM: dts: at91: sama5d2_ptc_ek: fix vbus pin The gpio property for the vbus pin doesn't match the pinctrl and is not correct. Signed-off-by: Ludovic Desroches Fixes: 42ed535595ec "ARM: dts: at91: introduce the sama5d2 ptc ek board" Cc: stable@vger.kernel.org # 4.19 and later Link: https://lore.kernel.org/r/20200401221947.41502-1-ludovic.desroches@microchip.com Signed-off-by: Alexandre Belloni --- arch/arm/boot/dts/at91-sama5d2_ptc_ek.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/at91-sama5d2_ptc_ek.dts b/arch/arm/boot/dts/at91-sama5d2_ptc_ek.dts index 772809c54c1f..b803fa1f2039 100644 --- a/arch/arm/boot/dts/at91-sama5d2_ptc_ek.dts +++ b/arch/arm/boot/dts/at91-sama5d2_ptc_ek.dts @@ -40,7 +40,7 @@ ahb { usb0: gadget@300000 { - atmel,vbus-gpio = <&pioA PIN_PA27 GPIO_ACTIVE_HIGH>; + atmel,vbus-gpio = <&pioA PIN_PB11 GPIO_ACTIVE_HIGH>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usba_vbus>; status = "okay"; From d08f4a5ac9fe2121b4d809d8529b5d4927971061 Mon Sep 17 00:00:00 2001 From: Ludovic Desroches Date: Thu, 2 Apr 2020 00:15:02 +0200 Subject: [PATCH 07/35] ARM: dts: at91: sama5d2_ptc_ek: add PB_USER as wakeup source Add the push button PB_USER as wakeup source Signed-off-by: Ludovic Desroches Link: https://lore.kernel.org/r/20200401221504.41196-3-ludovic.desroches@microchip.com Signed-off-by: Alexandre Belloni --- arch/arm/boot/dts/at91-sama5d2_ptc_ek.dts | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/boot/dts/at91-sama5d2_ptc_ek.dts b/arch/arm/boot/dts/at91-sama5d2_ptc_ek.dts index b803fa1f2039..32435ce1dab2 100644 --- a/arch/arm/boot/dts/at91-sama5d2_ptc_ek.dts +++ b/arch/arm/boot/dts/at91-sama5d2_ptc_ek.dts @@ -412,6 +412,7 @@ label = "PB_USER"; gpios = <&pioA PIN_PA10 GPIO_ACTIVE_LOW>; linux,code = <0x104>; + wakeup-source; }; }; From d0815bc1b4559eddd671a3c51ba77fcd04c0fea4 Mon Sep 17 00:00:00 2001 From: Ludovic Desroches Date: Thu, 2 Apr 2020 00:15:03 +0200 Subject: [PATCH 08/35] ARM: dts: at91: sama5d27_som1_ek: enable i2c0 Enable i2c0 controller. Signed-off-by: Ludovic Desroches Link: https://lore.kernel.org/r/20200401221504.41196-4-ludovic.desroches@microchip.com Signed-off-by: Alexandre Belloni --- arch/arm/boot/dts/at91-sama5d27_som1_ek.dts | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/arch/arm/boot/dts/at91-sama5d27_som1_ek.dts b/arch/arm/boot/dts/at91-sama5d27_som1_ek.dts index b0853bf7901c..1a26e1a12931 100644 --- a/arch/arm/boot/dts/at91-sama5d27_som1_ek.dts +++ b/arch/arm/boot/dts/at91-sama5d27_som1_ek.dts @@ -115,6 +115,13 @@ status = "okay"; }; + i2c0: i2c@f8028000 { + dmas = <0>, <0>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c0_default>; + status = "okay"; + }; + pwm0: pwm@f802c000 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_mikrobus1_pwm &pinctrl_mikrobus2_pwm>; @@ -281,6 +288,12 @@ bias-disable; }; + pinctrl_i2c0_default: i2c0_default { + pinmux = , + ; + bias-disable; + }; + pinctrl_i2c1_default: i2c1_default { pinmux = , ; From 32542faf867f78e13cfec4178311795305c8c177 Mon Sep 17 00:00:00 2001 From: Ludovic Desroches Date: Thu, 2 Apr 2020 00:15:04 +0200 Subject: [PATCH 09/35] ARM: dts: at91: sama5d27_som1_ek: add an alias for i2c0 Add aliases for i2c devices to not rely on probe order for i2c device numbering. Signed-off-by: Ludovic Desroches Link: https://lore.kernel.org/r/20200401221504.41196-5-ludovic.desroches@microchip.com Signed-off-by: Alexandre Belloni --- arch/arm/boot/dts/at91-sama5d27_som1_ek.dts | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/boot/dts/at91-sama5d27_som1_ek.dts b/arch/arm/boot/dts/at91-sama5d27_som1_ek.dts index 1a26e1a12931..535627c6045b 100644 --- a/arch/arm/boot/dts/at91-sama5d27_som1_ek.dts +++ b/arch/arm/boot/dts/at91-sama5d27_som1_ek.dts @@ -20,6 +20,7 @@ serial0 = &uart1; /* DBGU */ serial1 = &uart4; /* mikro BUS 1 */ serial2 = &uart2; /* mikro BUS 2 */ + i2c0 = &i2c0; i2c1 = &i2c1; i2c2 = &i2c2; }; From c378150337efa7a4b03394b0229a9110bda8403c Mon Sep 17 00:00:00 2001 From: Tudor Ambarus Date: Fri, 3 Apr 2020 06:12:24 +0000 Subject: [PATCH 10/35] ARM: dts: at91: sam9x60ek: Use quad mode in the spi-nor flash Both the QSPI controller and the sst26vf064b flash support quad mode, enable it. Signed-off-by: Tudor Ambarus Link: https://lore.kernel.org/r/20200403061222.1277147-1-tudor.ambarus@microchip.com Signed-off-by: Alexandre Belloni --- arch/arm/boot/dts/at91-sam9x60ek.dts | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm/boot/dts/at91-sam9x60ek.dts b/arch/arm/boot/dts/at91-sam9x60ek.dts index b484745bf2d4..8c3f621efc4b 100644 --- a/arch/arm/boot/dts/at91-sam9x60ek.dts +++ b/arch/arm/boot/dts/at91-sam9x60ek.dts @@ -579,6 +579,8 @@ compatible = "jedec,spi-nor"; reg = <0>; spi-max-frequency = <80000000>; + spi-tx-bus-width = <4>; + spi-rx-bus-width = <4>; m25p,fast-read; at91bootstrap@0 { From 471f0532ea37160aa2751cd241478ceb738f1923 Mon Sep 17 00:00:00 2001 From: Claudiu Beznea Date: Fri, 3 Apr 2020 06:12:25 +0000 Subject: [PATCH 11/35] ARM: dts: at91: sama5d27_som1: Add SPI NOR flash mapping Add SoM1 flash mapping, identical with the other SPI NOR flash mappings found on the other at91 boards. Signed-off-by: Claudiu Beznea Tested-by: Tudor Ambarus Signed-off-by: Tudor Ambarus Link: https://lore.kernel.org/r/20200403061222.1277147-2-tudor.ambarus@microchip.com Signed-off-by: Alexandre Belloni --- arch/arm/boot/dts/at91-sama5d27_som1.dtsi | 32 +++++++++++++++++++++++ 1 file changed, 32 insertions(+) diff --git a/arch/arm/boot/dts/at91-sama5d27_som1.dtsi b/arch/arm/boot/dts/at91-sama5d27_som1.dtsi index 6281590150c8..919000f467e6 100644 --- a/arch/arm/boot/dts/at91-sama5d27_som1.dtsi +++ b/arch/arm/boot/dts/at91-sama5d27_som1.dtsi @@ -34,12 +34,44 @@ pinctrl-0 = <&pinctrl_qspi1_default>; flash@0 { + #address-cells = <1>; + #size-cells = <1>; compatible = "jedec,spi-nor"; reg = <0>; spi-max-frequency = <80000000>; spi-tx-bus-width = <4>; spi-rx-bus-width = <4>; m25p,fast-read; + + at91bootstrap@00000000 { + label = "at91bootstrap"; + reg = <0x00000000 0x00040000>; + }; + + bootloader@00040000 { + label = "bootloader"; + reg = <0x00040000 0x000c0000>; + }; + + bootloaderenvred@00100000 { + label = "bootloader env redundant"; + reg = <0x00100000 0x00040000>; + }; + + bootloaderenv@00140000 { + label = "bootloader env"; + reg = <0x00140000 0x00040000>; + }; + + dtb@00180000 { + label = "device tree"; + reg = <0x00180000 0x00080000>; + }; + + kernel@00200000 { + label = "kernel"; + reg = <0x00200000 0x00600000>; + }; }; }; From 0fd3a8f58f78b498784b72c1971c225c4e69ddac Mon Sep 17 00:00:00 2001 From: Tudor Ambarus Date: Fri, 3 Apr 2020 06:12:26 +0000 Subject: [PATCH 12/35] ARM: dts: at91: sam9x60ek: Add sdmmc1 node sdmmc1 is not populated by default on sam9x60ek, but there are cases where it is populated with wilc3000. Add the node, but keep it disabled. Signed-off-by: Tudor Ambarus Link: https://lore.kernel.org/r/20200403061222.1277147-4-tudor.ambarus@microchip.com Signed-off-by: Alexandre Belloni --- arch/arm/boot/dts/at91-sam9x60ek.dts | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) diff --git a/arch/arm/boot/dts/at91-sam9x60ek.dts b/arch/arm/boot/dts/at91-sam9x60ek.dts index 8c3f621efc4b..a5f5718c711a 100644 --- a/arch/arm/boot/dts/at91-sam9x60ek.dts +++ b/arch/arm/boot/dts/at91-sam9x60ek.dts @@ -542,6 +542,18 @@ }; }; + sdmmc1 { + pinctrl_sdmmc1_default: sdmmc1 { + atmel,pins = + ; /* PA4 DAT3 periph B with pullup */ + }; + }; + gpio_keys { pinctrl_key_gpio_default: pinctrl_key_gpio { atmel,pins = ; @@ -568,6 +580,15 @@ disable-wp; }; +&sdmmc1 { + bus-width = <4>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_sdmmc1_default>; + no-1-8-v; + non-removable; + status = "disabled"; /* Conflict with flx4. */ +}; + &qspi { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_qspi>; From 51cca920ce84356d53068ac83a53ba8c45879a0e Mon Sep 17 00:00:00 2001 From: Cyrille Pitchen Date: Fri, 3 Apr 2020 06:12:26 +0000 Subject: [PATCH 13/35] ARM: dts: at91: sama5d2_xplained: Add QSPI0 + SPI NOR memory nodes This patch enables the QSPI0 controller, configures its pin muxing and declares a jedec,spi-nor memory. sama5d2 Xplained RevB and RevC use the Macronix MX25L25673G flash memory which advertises a maximum frequency of 80MHz for Quad IO Fast Read. Set the spi-max-frequency to 80MHz knowing that actually the QSPI drver will set the SPI bus clock to 166MHz / 3 = 55.3MHz. Signed-off-by: Cyrille Pitchen Tested-by: Tudor Ambarus Signed-off-by: Tudor Ambarus Link: https://lore.kernel.org/r/20200403061222.1277147-3-tudor.ambarus@microchip.com Signed-off-by: Alexandre Belloni --- arch/arm/boot/dts/at91-sama5d2_xplained.dts | 68 +++++++++++++++++++++ 1 file changed, 68 insertions(+) diff --git a/arch/arm/boot/dts/at91-sama5d2_xplained.dts b/arch/arm/boot/dts/at91-sama5d2_xplained.dts index 055ee53e4773..e0c6cff1a312 100644 --- a/arch/arm/boot/dts/at91-sama5d2_xplained.dts +++ b/arch/arm/boot/dts/at91-sama5d2_xplained.dts @@ -72,6 +72,58 @@ }; apb { + qspi0: spi@f0020000 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_qspi0_default>; + status = "disabled"; /* conflict with sdmmc1 */ + + flash@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <80000000>; + spi-tx-bus-width = <4>; + spi-rx-bus-width = <4>; + m25p,fast-read; + + at91bootstrap@00000000 { + label = "at91bootstrap"; + reg = <0x00000000 0x00040000>; + }; + + bootloader@00040000 { + label = "bootloader"; + reg = <0x00040000 0x000c0000>; + }; + + bootloaderenvred@00100000 { + label = "bootloader env redundant"; + reg = <0x00100000 0x00040000>; + }; + + bootloaderenv@00140000 { + label = "bootloader env"; + reg = <0x00140000 0x00040000>; + }; + + dtb@00180000 { + label = "device tree"; + reg = <0x00180000 0x00080000>; + }; + + kernel@00200000 { + label = "kernel"; + reg = <0x00200000 0x00600000>; + }; + + misc@00800000 { + label = "misc"; + reg = <0x00800000 0x00000000>; + }; + }; + }; + spi0: spi@f8000000 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_spi0_default>; @@ -535,6 +587,22 @@ bias-disable; }; + pinctrl_qspi0_default: qspi0_default { + sck_cs { + pinmux = , + ; + bias-disable; + }; + + data { + pinmux = , + , + , + ; + bias-pull-up; + }; + }; + pinctrl_sdmmc0_default: sdmmc0_default { cmd_data { pinmux = , From 2fdc4e1c8cb1b291b920f514afad8d7ce286851d Mon Sep 17 00:00:00 2001 From: Ludovic Desroches Date: Fri, 3 Apr 2020 06:12:27 +0000 Subject: [PATCH 14/35] ARM: dts: at91: at91-sama5d27_som1: Enable eeprom device There is an EEPROM on at91-sama5d27_som1 connected to i2c0. i2c0 node has to be moved from at91-sama5d27_som1_ek to at91-sama5d27_som1. Enable the i2c EEPROM found on at91-sama5d27_som1. Add an alias for the i2c node. Signed-off-by: Ludovic Desroches Tested-by: Tudor Ambarus Signed-off-by: Tudor Ambarus Link: https://lore.kernel.org/r/20200403061222.1277147-5-tudor.ambarus@microchip.com Signed-off-by: Alexandre Belloni --- arch/arm/boot/dts/at91-sama5d27_som1.dtsi | 22 +++++++++++++++++++++ arch/arm/boot/dts/at91-sama5d27_som1_ek.dts | 14 ------------- 2 files changed, 22 insertions(+), 14 deletions(-) diff --git a/arch/arm/boot/dts/at91-sama5d27_som1.dtsi b/arch/arm/boot/dts/at91-sama5d27_som1.dtsi index 919000f467e6..b1f994c0ae79 100644 --- a/arch/arm/boot/dts/at91-sama5d27_som1.dtsi +++ b/arch/arm/boot/dts/at91-sama5d27_som1.dtsi @@ -13,6 +13,10 @@ model = "Atmel SAMA5D27 SoM1"; compatible = "atmel,sama5d27-som1", "atmel,sama5d27", "atmel,sama5d2", "atmel,sama5"; + aliases { + i2c0 = &i2c0; + }; + clocks { slow_xtal { clock-frequency = <32768>; @@ -89,7 +93,25 @@ }; }; + i2c0: i2c@f8028000 { + dmas = <0>, <0>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c0_default>; + status = "okay"; + + at24@50 { + compatible = "24c02"; + reg = <0x50>; + pagesize = <8>; + }; + }; + pinctrl@fc038000 { + pinctrl_i2c0_default: i2c0_default { + pinmux = , + ; + bias-disable; + }; pinctrl_qspi1_default: qspi1_default { sck_cs { diff --git a/arch/arm/boot/dts/at91-sama5d27_som1_ek.dts b/arch/arm/boot/dts/at91-sama5d27_som1_ek.dts index 535627c6045b..b0853bf7901c 100644 --- a/arch/arm/boot/dts/at91-sama5d27_som1_ek.dts +++ b/arch/arm/boot/dts/at91-sama5d27_som1_ek.dts @@ -20,7 +20,6 @@ serial0 = &uart1; /* DBGU */ serial1 = &uart4; /* mikro BUS 1 */ serial2 = &uart2; /* mikro BUS 2 */ - i2c0 = &i2c0; i2c1 = &i2c1; i2c2 = &i2c2; }; @@ -116,13 +115,6 @@ status = "okay"; }; - i2c0: i2c@f8028000 { - dmas = <0>, <0>; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_i2c0_default>; - status = "okay"; - }; - pwm0: pwm@f802c000 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_mikrobus1_pwm &pinctrl_mikrobus2_pwm>; @@ -289,12 +281,6 @@ bias-disable; }; - pinctrl_i2c0_default: i2c0_default { - pinmux = , - ; - bias-disable; - }; - pinctrl_i2c1_default: i2c1_default { pinmux = , ; From a2e269ca294c65fb5ef66a2d4b61cf9533152dd1 Mon Sep 17 00:00:00 2001 From: Codrin Ciubotariu Date: Fri, 10 Apr 2020 19:43:19 +0300 Subject: [PATCH 15/35] dt-bindings: ARM: Document SAMA5D2-ICP Document device tree binding for SAMA5D2 Industrial Connectivity Platform(ICP). Signed-off-by: Codrin Ciubotariu [cristian.birsan@microchip.com update board name to match silkscreen] Signed-off-by: Cristian Birsan Link: https://lore.kernel.org/r/20200410164320.7658-2-cristian.birsan@microchip.com Signed-off-by: Alexandre Belloni --- Documentation/devicetree/bindings/arm/atmel-at91.yaml | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/atmel-at91.yaml b/Documentation/devicetree/bindings/arm/atmel-at91.yaml index 0357314076bc..31b0c54fa2cf 100644 --- a/Documentation/devicetree/bindings/arm/atmel-at91.yaml +++ b/Documentation/devicetree/bindings/arm/atmel-at91.yaml @@ -82,6 +82,13 @@ properties: - const: atmel,sama5d2 - const: atmel,sama5 + - description: Microchip SAMA5D2 Industrial Connectivity Platform + items: + - const: microchip,sama5d2-icp + - const: atmel,sama5d27 + - const: atmel,sama5d2 + - const: atmel,sama5 + - description: SAM9X60-EK board items: - const: microchip,sam9x60ek From 68a95ef72cefeeabbc68d36f191f49743a3d9c08 Mon Sep 17 00:00:00 2001 From: Cristian Birsan Date: Fri, 10 Apr 2020 19:43:20 +0300 Subject: [PATCH 16/35] ARM: dts: at91: sama5d2-icp: add SAMA5D2-ICP This is the addition of the new SAMA5D2 Industrial Connectivity Platform(ICP). Signed-off-by: Cristian Birsan Link: https://lore.kernel.org/r/20200410164320.7658-3-cristian.birsan@microchip.com Signed-off-by: Alexandre Belloni --- arch/arm/boot/dts/Makefile | 1 + arch/arm/boot/dts/at91-sama5d2_icp.dts | 797 +++++++++++++++++++++++++ 2 files changed, 798 insertions(+) create mode 100644 arch/arm/boot/dts/at91-sama5d2_icp.dts diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index e8dd99201397..e5072d417e2c 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -55,6 +55,7 @@ dtb-$(CONFIG_SOC_SAM_V7) += \ at91-nattis-2-natte-2.dtb \ at91-sama5d27_som1_ek.dtb \ at91-sama5d27_wlsom1_ek.dtb \ + at91-sama5d2_icp.dtb \ at91-sama5d2_ptc_ek.dtb \ at91-sama5d2_xplained.dtb \ at91-sama5d3_xplained.dtb \ diff --git a/arch/arm/boot/dts/at91-sama5d2_icp.dts b/arch/arm/boot/dts/at91-sama5d2_icp.dts new file mode 100644 index 000000000000..cc9fa700eafb --- /dev/null +++ b/arch/arm/boot/dts/at91-sama5d2_icp.dts @@ -0,0 +1,797 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * at91-sama5d2_icp.dts - Device Tree file for SAMA5D2-ICP board + * + * Copyright (C) 2019 Microchip Technology Inc. and its subsidiaries + * + * Author: Radu Pirea & Razvan Stefanescu, + * Codrin Ciubotariu , + * Cristian Birsan + */ +/dts-v1/; +#include "sama5d2.dtsi" +#include "sama5d2-pinfunc.h" +#include +#include + +/ { + model = "Microchip SAMA5D2-ICP"; + compatible = "microchip,sama5d2-icp", "atmel,sama5d27", "atmel,sama5d2", "atmel,sama5"; + + aliases { + serial0 = &uart0; /* debug uart0 + mikro BUS 1 */ + serial1 = &uart1; /* mikro BUS 3 */ + serial3 = &uart3; /* mikro BUS 2 */ + serial5 = &uart5; /* flx2 */ + i2c0 = &i2c0; + i2c1 = &i2c1; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + clocks { + slow_xtal { + clock-frequency = <32768>; + }; + + main_xtal { + clock-frequency = <12000000>; + }; + }; + + gpio_keys { + compatible = "gpio-keys"; + + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_key_gpio_default>; + status = "okay"; + + sw4 { + label = "USER_PB1"; + gpios = <&pioA PIN_PD0 GPIO_ACTIVE_LOW>; + linux,code = <0x104>; + wakeup-source; + }; + }; + + leds { + compatible = "gpio-leds"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_led_gpio_default>; + status = "okay"; /* conflict with pwm0 */ + + red { + label = "red"; + gpios = <&pioA PIN_PB0 GPIO_ACTIVE_HIGH>; + }; + + green { + label = "green"; + gpios = <&pioA PIN_PB1 GPIO_ACTIVE_HIGH>; + }; + + blue { + label = "blue"; + gpios = <&pioA PIN_PA31 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "heartbeat"; + }; + }; +}; + +&adc { + vddana-supply = <&vdd_io_reg>; + vref-supply = <&vdd_io_reg>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_adc_default &pinctrl_adtrg_default>; + status = "okay"; +}; + +&can0 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_can0_default>; + status = "okay"; +}; + +&can1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_can1_default>; + status = "okay"; +}; + +&flx0 { /* mikrobus2 spi */ + atmel,flexcom-mode = ; + status = "okay"; + + spi2: spi@400 { + compatible = "atmel,at91rm9200-spi"; + reg = <0x400 0x200>; + interrupts = <19 IRQ_TYPE_LEVEL_HIGH 7>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 19>; + clock-names = "spi_clk"; + cs-gpios = <&pioA PIN_PC0 GPIO_ACTIVE_LOW>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_mikrobus2_spi &pinctrl_ksz_spi_cs>; + atmel,fifo-size = <16>; + status = "okay"; + #address-cells = <1>; + #size-cells = <0>; + + switch0: ksz8563@0 { + compatible = "microchip,ksz8563"; + reg = <0>; + phy-mode = "mii"; + reset-gpios = <&pioA PIN_PD4 GPIO_ACTIVE_LOW>; + + spi-max-frequency = <500000>; + spi-cpha; + spi-cpol; + + ports { + #address-cells = <1>; + #size-cells = <0>; + port@0 { + reg = <0>; + label = "lan1"; + }; + + port@1 { + reg = <1>; + label = "lan2"; + }; + + port@2 { + reg = <2>; + label = "cpu"; + ethernet = <&macb0>; + fixed-link { + speed = <100>; + full-duplex; + }; + }; + }; + }; + }; +}; + +&flx2 { + atmel,flexcom-mode = ; + status = "okay"; + + uart5: serial@200 { + compatible = "atmel,at91sam9260-usart"; + reg = <0x200 0x200>; + interrupts = <21 IRQ_TYPE_LEVEL_HIGH 7>; + dmas = <&dma0 + (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) | + AT91_XDMAC_DT_PERID(15))>, + <&dma0 + (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) | + AT91_XDMAC_DT_PERID(16))>; + dma-names = "tx", "rx"; + clocks = <&pmc PMC_TYPE_PERIPHERAL 21>; + clock-names = "usart"; + pinctrl-0 = <&pinctrl_flx2_default>; + pinctrl-names = "default"; + atmel,use-dma-rx; + atmel,use-dma-tx; + status = "okay"; /* Conflict w/ qspi1. */ + }; +}; + +&flx3 { /* mikrobus1 spi */ + atmel,flexcom-mode = ; + status = "okay"; + + spi3: spi@400 { + compatible = "atmel,at91rm9200-spi"; + reg = <0x400 0x200>; + interrupts = <22 IRQ_TYPE_LEVEL_HIGH 7>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 22>; + clock-names = "spi_clk"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_mikrobus1_spi &pinctrl_mikrobus1_spi_cs>; + atmel,fifo-size = <16>; + status = "okay"; + }; +}; + +&flx4 { + atmel,flexcom-mode = ; + status = "okay"; + + i2c2: i2c@600 { + compatible = "atmel,sama5d2-i2c"; + reg = <0x600 0x200>; + interrupts = <23 IRQ_TYPE_LEVEL_HIGH 7>; + dmas = <0>, <0>; + dma-names = "tx", "rx"; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 23>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_flx4_default>; + atmel,fifo-size = <16>; + status = "okay"; + + mcp16502@5b { + compatible = "microchip,mcp16502"; + reg = <0x5b>; + status = "okay"; + lpm-gpios = <&pioBU 7 GPIO_ACTIVE_LOW>; + + regulators { + vdd_io_reg: VDD_IO { + regulator-name = "VDD_IO"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <3700000>; + regulator-initial-mode = <2>; + regulator-allowed-modes = <2>, <4>; + regulator-always-on; + + regulator-state-standby { + regulator-on-in-suspend; + regulator-mode = <4>; + }; + + regulator-state-mem { + regulator-off-in-suspend; + regulator-mode = <4>; + }; + }; + + VDD_DDR { + regulator-name = "VDD_DDR"; + regulator-min-microvolt = <600000>; + regulator-max-microvolt = <1850000>; + regulator-initial-mode = <2>; + regulator-allowed-modes = <2>, <4>; + regulator-always-on; + + regulator-state-standby { + regulator-on-in-suspend; + regulator-mode = <4>; + }; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-mode = <4>; + }; + }; + + VDD_CORE { + regulator-name = "VDD_CORE"; + regulator-min-microvolt = <600000>; + regulator-max-microvolt = <1850000>; + regulator-initial-mode = <2>; + regulator-allowed-modes = <2>, <4>; + regulator-always-on; + + regulator-state-standby { + regulator-on-in-suspend; + regulator-mode = <4>; + }; + + regulator-state-mem { + regulator-off-in-suspend; + regulator-mode = <4>; + }; + }; + + VDD_OTHER { + regulator-name = "VDD_OTHER"; + regulator-min-microvolt = <600000>; + regulator-max-microvolt = <1850000>; + regulator-initial-mode = <2>; + regulator-allowed-modes = <2>, <4>; + regulator-always-on; + + regulator-state-standby { + regulator-on-in-suspend; + regulator-mode = <4>; + }; + + regulator-state-mem { + regulator-off-in-suspend; + regulator-mode = <4>; + }; + }; + + LDO1 { + regulator-name = "LDO1"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <3700000>; + regulator-always-on; + + regulator-state-standby { + regulator-on-in-suspend; + }; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + LDO2 { + regulator-name = "LDO2"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <3700000>; + regulator-always-on; + + regulator-state-standby { + regulator-on-in-suspend; + }; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + }; + }; + }; +}; + +&i2c0 { /* mikrobus i2c */ + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_mikrobus_i2c>; + status = "okay"; +}; + +&i2c1 { + dmas = <0>, <0>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c1_default>; + status = "okay"; + + eeprom@50 { + compatible = "atmel,24c32"; + reg = <0x50>; + pagesize = <16>; + status = "okay"; + }; + + eeprom@52 { + compatible = "atmel,24c32"; + reg = <0x52>; + pagesize = <16>; + status = "disabled"; + }; + + eeprom@53 { + compatible = "atmel,24c32"; + reg = <0x53>; + pagesize = <16>; + status = "disabled"; + }; +}; + +&macb0 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_macb0_default &pinctrl_macb0_phy_irq &pinctrl_macb0_rst>; + phy-mode = "mii"; + status = "okay"; + + fixed-link { + speed = <100>; + full-duplex; + }; +}; + +&pioA { + pinctrl_adc_default: adc_default { + pinmux = , + , + ; + bias-disable; + }; + + /* + * The ADTRG pin can work on any edge type. + * In here it's being pulled up, so need to + * connect it to ground to get an edge e.g. + * Trigger can be configured on falling, rise + * or any edge, and the pull-up can be changed + * to pull-down or left floating according to + * needs. + */ + pinctrl_adtrg_default: adtrg_default { + pinmux = ; + bias-pull-up; + }; + + pinctrl_flx4_default: flx4_default { + pinmux = , + ; + bias-disable; + }; + + pinctrl_can0_default: can0_default { + pinmux = , + ; + bias-disable; + }; + + pinctrl_can1_default: can1_default { + pinmux = , + ; + bias-disable; + }; + + pinctrl_i2c1_default: i2c1_default { + pinmux = , + ; + bias-disable; + }; + + pinctrl_key_gpio_default: key_gpio_default { + pinmux = ; + bias-pull-up; + }; + + pinctrl_led_gpio_default: led_gpio_default { + pinmux = , + , + ; + bias-pull-up; + }; + + pinctrl_qspi1_default: qspi1_default { + pinmux = , + , + , + , + , + ; + bias-disable; + }; + + pinctrl_sdmmc0_default: sdmmc0_default { + cmd_data { + pinmux = , + , + , + , + ; + bias-disable; + }; + + ck_cd { + pinmux = , + ; + bias-disable; + }; + }; + + pinctrl_sdmmc1_default: sdmmc1_default { + cmd_data { + pinmux = , + , + , + ; + bias-disable; + }; + + ck_cd { + pinmux = , + ; + bias-disable; + }; + }; + + pinctrl_mikrobus_i2c: mikrobus_i2c { + pinmux = , + ; + bias-disable; + }; + + pinctrl_mikrobus1_an: mikrobus1_an { + pinmux = ; + bias-disable; + }; + + pinctrl_mikrobus1_rst: mikrobus1_rst { + pinmux = ; + bias-disable; + }; + + pinctrl_mikrobus1_spi_cs: mikrobus1_spi_cs { + pinmux = ; + bias-disable; + }; + + pinctrl_mikrobus1_spi: mikrobus1_spi { + pinmux = , + , + ; + bias-disable; + }; + + pinctrl_mikrobus1_pwm: mikrobus1_pwm { + pinmux = ; + bias-disable; + }; + + pinctrl_mikrobus1_int: mikrobus1_int { + pinmux = ; + bias-disable; + }; + + pinctrl_mikrobus1_uart: mikrobus1_uart { + pinmux = , + ; + bias-disable; + }; + + pinctrl_mikrobus2_an: mikrobus2_an { + pinmux = ; + bias-disable; + }; + + pinctrl_mikrobus2_rst: mikrobus2_rst { + pinmux = ; + bias-disable; + }; + + pinctrl_mikrobus2_spi_cs: mikrobus2_spi_cs { + pinmux = ; + bias-disable; + }; + + pinctrl_mikrobus2_spi: mikrobus2_spi { + pinmux = , + , + ; + bias-disable; + }; + + pinctrl_ksz_spi_cs: ksz_spi_cs { + pinmux = ; + bias-disable; + }; + + pinctrl_mikrobus2_pwm: mikrobus2_pwm { + pinmux = ; + bias-disable; + }; + + pinctrl_mikrobus2_int: mikrobus2_int { + pinmux = ; + bias-disable; + }; + + pinctrl_mikrobus2_uart: mikrobus2_uart { + pinmux = , + ; + bias-disable; + }; + + pinctrl_mikrobus3_an: mikrobus3_an { + pinmux = ; + bias-disable; + }; + + pinctrl_mikrobus3_rst: mikrobus3_rst { + pinmux = ; + bias-disable; + }; + + pinctrl_mikrobus3_spi_cs: mikrobus3_spi_cs { + pinmux = ; + bias-disable; + }; + + pinctrl_mikrobus3_spi: mikrobus3_spi { + pinmux = , + , + ; + bias-disable; + }; + + pinctrl_mikrobus3_pwm: mikrobus3_pwm { + pinmux = ; + bias-disable; + }; + + pinctrl_mikrobus3_int: mikrobus3_int { + pinmux = ; + bias-disable; + }; + + pinctrl_mikrobus3_uart: mikrobus3_uart { + pinmux = , + ; + bias-disable; + }; + + pinctrl_usb_default: usb_default { + pinmux = ; + bias-disable; + }; + + pinctrl_usba_vbus: usba_vbus { + pinmux = ; + bias-disable; + }; + + pinctrl_pwm0_pwm2_default: pwm0_pwm2_default { + pinmux = , + ; + bias-pull-up; + }; + + pinctrl_macb0_default: macb0_default { + pinmux = , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + ; + bias-disable; + }; + + pinctrl_macb0_phy_irq: macb0_phy_irq { + pinmux = ; + bias-disable; + }; + + pinctrl_macb0_rst: macb0_sw_rst { + pinmux = ; + bias-disable; + }; + + pinctrl_flx2_default: flx2_default { + pinmux = , + , + , + ; + bias-disable; + }; +}; + +&pwm0 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pwm0_pwm2_default>; + status = "disabled"; /* conflict with leds, HSIC */ +}; + +&qspi1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_qspi1_default>; + status = "disabled"; /* Conflict with wilc_pwrseq, flx2 */ + + flash@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <80000000>; + spi-tx-bus-width = <4>; + spi-rx-bus-width = <4>; + m25p,fast-read; + + at91bootstrap@0 { + label = "qspi: at91bootstrap"; + reg = <0x00000000 0x00040000>; + }; + + bootloader@40000 { + label = "qspi: bootloader"; + reg = <0x00040000 0x000c0000>; + }; + + bootloaderenvred@100000 { + label = "qspi: bootloader env redundant"; + reg = <0x00100000 0x00040000>; + }; + + bootloaderenv@140000 { + label = "qspi: bootloader env"; + reg = <0x00140000 0x00040000>; + }; + + dtb@180000 { + label = "qspi: device tree"; + reg = <0x00180000 0x00080000>; + }; + + kernel@200000 { + label = "qspi: kernel"; + reg = <0x00200000 0x00600000>; + }; + }; +}; + +&sdmmc0 { + no-1-8-v; + bus-width = <4>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_sdmmc0_default>; + status = "okay"; +}; + +&shutdown_controller { + atmel,shdwc-debouncer = <976>; + atmel,wakeup-rtc-timer; + + input@0 { + reg = <0>; + atmel,wakeup-type = "low"; + }; +}; + +&spi0 { /* mikrobus3 spi */ + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_mikrobus3_spi &pinctrl_mikrobus3_spi_cs>; + status = "okay"; +}; + +&tcb0 { + timer0: timer@0 { + compatible = "atmel,tcb-timer"; + reg = <0>; + }; + + timer1: timer@1 { + compatible = "atmel,tcb-timer"; + reg = <1>; + }; +}; + +&uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_mikrobus1_uart>; + atmel,use-dma-rx; + atmel,use-dma-tx; + status = "okay"; +}; + +&uart1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_mikrobus3_uart>; + atmel,use-dma-rx; + atmel,use-dma-tx; + status = "okay"; +}; + +&uart3 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_mikrobus2_uart>; + atmel,use-dma-rx; + atmel,use-dma-tx; + status = "okay"; +}; + +&usb0 { + atmel,vbus-gpio = <&pioA PIN_PD23 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usba_vbus>; + status = "okay"; +}; + +&usb1 { + num-ports = <3>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usb_default>; + status = "okay"; +}; + +&usb2 { + phy_type = "hsic"; + status = "okay"; +}; + +&watchdog { + status = "okay"; +}; From e1e2662036c01acc1418942d8febe0e726624669 Mon Sep 17 00:00:00 2001 From: Tudor Ambarus Date: Mon, 13 Apr 2020 14:09:25 +0000 Subject: [PATCH 17/35] ARM: dts: at91: sama5d27_wlsom1: Add alias for i2c0 wlsom1 has an ATECC608A-TNGTLS Secure Element connected on the i2c0 bus. Add alias for the i2c device to not rely on probe order for the i2c device numbering. Signed-off-by: Tudor Ambarus Link: https://lore.kernel.org/r/20200413140922.154886-1-tudor.ambarus@microchip.com Signed-off-by: Alexandre Belloni --- arch/arm/boot/dts/at91-sama5d27_wlsom1.dtsi | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/arm/boot/dts/at91-sama5d27_wlsom1.dtsi b/arch/arm/boot/dts/at91-sama5d27_wlsom1.dtsi index db3e2239eee8..bea3d60b9722 100644 --- a/arch/arm/boot/dts/at91-sama5d27_wlsom1.dtsi +++ b/arch/arm/boot/dts/at91-sama5d27_wlsom1.dtsi @@ -17,6 +17,10 @@ model = "Microchip SAMA5D27 WLSOM1"; compatible = "microchip,sama5d27-wlsom1", "atmel,sama5d27", "atmel,sama5d2", "atmel,sama5"; + aliases { + i2c0 = &i2c0; + }; + clocks { slow_xtal { clock-frequency = <32768>; From f1f2212eaddf4857728167ce9e582e530183cf4b Mon Sep 17 00:00:00 2001 From: Tudor Ambarus Date: Thu, 14 May 2020 05:03:07 +0000 Subject: [PATCH 18/35] ARM: dts: at91: sama5d2: Fix the label numbering for flexcom functions The sama5d2 SoC has the following IPs: [uart0, uart4], {spi0, spi1}, {i2c0, i2c1}. Label the flexcom functions in order: flx0: uart5, spi2, i2c2 flx1: uart6, spi3, i2c3 flx2: uart7, spi4, i2c4 flx3: uart8, spi5, i2c5 flx4: uart9, spi6, i2c6 Some boards respected this scheme, others not. Fix the ones that didn't. Signed-off-by: Tudor Ambarus Link: https://lore.kernel.org/r/20200514050301.147442-2-tudor.ambarus@microchip.com Signed-off-by: Alexandre Belloni --- arch/arm/boot/dts/at91-kizbox3-hs.dts | 4 ++-- arch/arm/boot/dts/at91-kizbox3_common.dtsi | 8 ++++---- arch/arm/boot/dts/at91-sama5d27_som1_ek.dts | 20 ++++++++++---------- arch/arm/boot/dts/at91-sama5d2_icp.dts | 8 ++++---- arch/arm/boot/dts/at91-sama5d2_xplained.dts | 2 +- 5 files changed, 21 insertions(+), 21 deletions(-) diff --git a/arch/arm/boot/dts/at91-kizbox3-hs.dts b/arch/arm/boot/dts/at91-kizbox3-hs.dts index 8734e7f8939e..0da1f0557eaf 100644 --- a/arch/arm/boot/dts/at91-kizbox3-hs.dts +++ b/arch/arm/boot/dts/at91-kizbox3-hs.dts @@ -283,7 +283,7 @@ &flx3 { status = "okay"; - uart6: serial@200 { + uart8: serial@200 { status = "okay"; }; }; @@ -291,7 +291,7 @@ &flx4 { status = "okay"; - i2c2: i2c@600 { + i2c6: i2c@600 { status = "okay"; }; }; diff --git a/arch/arm/boot/dts/at91-kizbox3_common.dtsi b/arch/arm/boot/dts/at91-kizbox3_common.dtsi index 299e74d23184..d7a6c972bdac 100644 --- a/arch/arm/boot/dts/at91-kizbox3_common.dtsi +++ b/arch/arm/boot/dts/at91-kizbox3_common.dtsi @@ -28,7 +28,7 @@ serial3 = &uart3; serial4 = &uart4; serial5 = &uart5; - serial6 = &uart6; + serial6 = &uart8; }; chosen { @@ -207,7 +207,7 @@ }; }; - pinctrl_flx4_default: flx4_i2c2_default { + pinctrl_flx4_default: flx4_i2c6_default { pinmux = , //DATA ; //CLK bias-disable; @@ -324,7 +324,7 @@ atmel,flexcom-mode = ; status = "disabled"; - uart6: serial@200 { + uart8: serial@200 { compatible = "atmel,at91sam9260-usart"; reg = <0x200 0x400>; interrupts = <22 IRQ_TYPE_LEVEL_HIGH 7>; @@ -350,7 +350,7 @@ atmel,flexcom-mode = ; status = "disabled"; - i2c2: i2c@600 { + i2c6: i2c@600 { compatible = "atmel,sama5d2-i2c"; reg = <0x600 0x200>; interrupts = <23 IRQ_TYPE_LEVEL_HIGH 7>; diff --git a/arch/arm/boot/dts/at91-sama5d27_som1_ek.dts b/arch/arm/boot/dts/at91-sama5d27_som1_ek.dts index b0853bf7901c..d215243fe163 100644 --- a/arch/arm/boot/dts/at91-sama5d27_som1_ek.dts +++ b/arch/arm/boot/dts/at91-sama5d27_som1_ek.dts @@ -21,7 +21,7 @@ serial1 = &uart4; /* mikro BUS 1 */ serial2 = &uart2; /* mikro BUS 2 */ i2c1 = &i2c1; - i2c2 = &i2c2; + i2c2 = &i2c3; }; chosen { @@ -125,7 +125,7 @@ atmel,flexcom-mode = ; status = "okay"; - i2c2: i2c@600 { + i2c3: i2c@600 { compatible = "atmel,sama5d2-i2c"; reg = <0x600 0x200>; interrupts = <20 IRQ_TYPE_LEVEL_HIGH 7>; @@ -178,7 +178,7 @@ atmel,flexcom-mode = ; status = "disabled"; - uart7: serial@200 { + uart8: serial@200 { compatible = "atmel,at91sam9260-usart"; reg = <0x200 0x200>; interrupts = <22 IRQ_TYPE_LEVEL_HIGH 7>; @@ -190,7 +190,7 @@ status = "disabled"; /* Conflict with isc. */ }; - spi2: spi@400 { + spi5: spi@400 { compatible = "atmel,at91rm9200-spi"; reg = <0x400 0x200>; interrupts = <22 IRQ_TYPE_LEVEL_HIGH 7>; @@ -207,7 +207,7 @@ atmel,flexcom-mode = ; status = "okay"; - uart6: serial@200 { + uart9: serial@200 { compatible = "atmel,at91sam9260-usart"; reg = <0x200 0x200>; interrupts = <23 IRQ_TYPE_LEVEL_HIGH 7>; @@ -216,10 +216,10 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_flx4_default>; atmel,fifo-size = <32>; - status = "disabled"; /* Conflict with spi3 and i2c3. */ + status = "disabled"; /* Conflict with spi6 and i2c6. */ }; - spi3: spi@400 { + spi6: spi@400 { compatible = "atmel,at91rm9200-spi"; reg = <0x400 0x200>; interrupts = <23 IRQ_TYPE_LEVEL_HIGH 7>; @@ -228,10 +228,10 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_mikrobus_spi &pinctrl_mikrobus1_spi_cs &pinctrl_mikrobus2_spi_cs>; atmel,fifo-size = <16>; - status = "okay"; /* Conflict with uart6 and i2c3. */ + status = "okay"; /* Conflict with uart5 and i2c6. */ }; - i2c3: i2c@600 { + i2c6: i2c@600 { compatible = "atmel,sama5d2-i2c"; reg = <0x600 0x200>; interrupts = <23 IRQ_TYPE_LEVEL_HIGH 7>; @@ -243,7 +243,7 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_flx4_default>; atmel,fifo-size = <16>; - status = "disabled"; /* Conflict with uart6 and spi3. */ + status = "disabled"; /* Conflict with uart5 and spi6. */ }; }; diff --git a/arch/arm/boot/dts/at91-sama5d2_icp.dts b/arch/arm/boot/dts/at91-sama5d2_icp.dts index cc9fa700eafb..1d9556dbbd63 100644 --- a/arch/arm/boot/dts/at91-sama5d2_icp.dts +++ b/arch/arm/boot/dts/at91-sama5d2_icp.dts @@ -22,7 +22,7 @@ serial0 = &uart0; /* debug uart0 + mikro BUS 1 */ serial1 = &uart1; /* mikro BUS 3 */ serial3 = &uart3; /* mikro BUS 2 */ - serial5 = &uart5; /* flx2 */ + serial5 = &uart7; /* flx2 */ i2c0 = &i2c0; i2c1 = &i2c1; }; @@ -159,7 +159,7 @@ atmel,flexcom-mode = ; status = "okay"; - uart5: serial@200 { + uart7: serial@200 { compatible = "atmel,at91sam9260-usart"; reg = <0x200 0x200>; interrupts = <21 IRQ_TYPE_LEVEL_HIGH 7>; @@ -184,7 +184,7 @@ atmel,flexcom-mode = ; status = "okay"; - spi3: spi@400 { + spi5: spi@400 { compatible = "atmel,at91rm9200-spi"; reg = <0x400 0x200>; interrupts = <22 IRQ_TYPE_LEVEL_HIGH 7>; @@ -201,7 +201,7 @@ atmel,flexcom-mode = ; status = "okay"; - i2c2: i2c@600 { + i2c6: i2c@600 { compatible = "atmel,sama5d2-i2c"; reg = <0x600 0x200>; interrupts = <23 IRQ_TYPE_LEVEL_HIGH 7>; diff --git a/arch/arm/boot/dts/at91-sama5d2_xplained.dts b/arch/arm/boot/dts/at91-sama5d2_xplained.dts index e0c6cff1a312..0666708b05f9 100644 --- a/arch/arm/boot/dts/at91-sama5d2_xplained.dts +++ b/arch/arm/boot/dts/at91-sama5d2_xplained.dts @@ -377,7 +377,7 @@ atmel,flexcom-mode = ; status = "okay"; - i2c2: i2c@600 { + i2c6: i2c@600 { compatible = "atmel,sama5d2-i2c"; reg = <0x600 0x200>; interrupts = <23 IRQ_TYPE_LEVEL_HIGH 7>; From 91fa03c9e33e3ae8eb6959dc3d0f0b853a004f2c Mon Sep 17 00:00:00 2001 From: Tudor Ambarus Date: Thu, 14 May 2020 05:03:07 +0000 Subject: [PATCH 19/35] ARM: dts: at91: sama5d2: Move flx4 definitions in the SoC dtsi The Flexcom IP is part of the sama5d2 SoC. Move the flx0 node together with its function definitions in sama5d2.dtsi. Boards will just fill the pins and enable the desired functions. Signed-off-by: Tudor Ambarus Link: https://lore.kernel.org/r/20200514050301.147442-3-tudor.ambarus@microchip.com Signed-off-by: Alexandre Belloni --- arch/arm/boot/dts/at91-kizbox3_common.dtsi | 14 -------- arch/arm/boot/dts/at91-sama5d27_som1_ek.dts | 20 ----------- arch/arm/boot/dts/at91-sama5d2_icp.dts | 8 ----- arch/arm/boot/dts/at91-sama5d2_xplained.dts | 8 ----- arch/arm/boot/dts/sama5d2.dtsi | 40 +++++++++++++++++++++ 5 files changed, 40 insertions(+), 50 deletions(-) diff --git a/arch/arm/boot/dts/at91-kizbox3_common.dtsi b/arch/arm/boot/dts/at91-kizbox3_common.dtsi index d7a6c972bdac..ee6f036aa008 100644 --- a/arch/arm/boot/dts/at91-kizbox3_common.dtsi +++ b/arch/arm/boot/dts/at91-kizbox3_common.dtsi @@ -351,22 +351,8 @@ status = "disabled"; i2c6: i2c@600 { - compatible = "atmel,sama5d2-i2c"; - reg = <0x600 0x200>; - interrupts = <23 IRQ_TYPE_LEVEL_HIGH 7>; - dmas = <&dma0 - (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) - | AT91_XDMAC_DT_PERID(19))>, - <&dma0 - (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) - | AT91_XDMAC_DT_PERID(20))>; - dma-names = "tx", "rx"; - #address-cells = <1>; - #size-cells = <0>; - clocks = <&pmc PMC_TYPE_PERIPHERAL 23>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_flx4_default>; - atmel,fifo-size = <16>; status = "disabled"; }; }; diff --git a/arch/arm/boot/dts/at91-sama5d27_som1_ek.dts b/arch/arm/boot/dts/at91-sama5d27_som1_ek.dts index d215243fe163..5f4a7c8725f3 100644 --- a/arch/arm/boot/dts/at91-sama5d27_som1_ek.dts +++ b/arch/arm/boot/dts/at91-sama5d27_som1_ek.dts @@ -208,41 +208,21 @@ status = "okay"; uart9: serial@200 { - compatible = "atmel,at91sam9260-usart"; - reg = <0x200 0x200>; - interrupts = <23 IRQ_TYPE_LEVEL_HIGH 7>; - clocks = <&pmc PMC_TYPE_PERIPHERAL 23>; - clock-names = "usart"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_flx4_default>; - atmel,fifo-size = <32>; status = "disabled"; /* Conflict with spi6 and i2c6. */ }; spi6: spi@400 { - compatible = "atmel,at91rm9200-spi"; - reg = <0x400 0x200>; - interrupts = <23 IRQ_TYPE_LEVEL_HIGH 7>; - clocks = <&pmc PMC_TYPE_PERIPHERAL 23>; - clock-names = "spi_clk"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_mikrobus_spi &pinctrl_mikrobus1_spi_cs &pinctrl_mikrobus2_spi_cs>; - atmel,fifo-size = <16>; status = "okay"; /* Conflict with uart5 and i2c6. */ }; i2c6: i2c@600 { - compatible = "atmel,sama5d2-i2c"; - reg = <0x600 0x200>; - interrupts = <23 IRQ_TYPE_LEVEL_HIGH 7>; dmas = <0>, <0>; - dma-names = "tx", "rx"; - #address-cells = <1>; - #size-cells = <0>; - clocks = <&pmc PMC_TYPE_PERIPHERAL 23>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_flx4_default>; - atmel,fifo-size = <16>; status = "disabled"; /* Conflict with uart5 and spi6. */ }; }; diff --git a/arch/arm/boot/dts/at91-sama5d2_icp.dts b/arch/arm/boot/dts/at91-sama5d2_icp.dts index 1d9556dbbd63..7216a794f4f6 100644 --- a/arch/arm/boot/dts/at91-sama5d2_icp.dts +++ b/arch/arm/boot/dts/at91-sama5d2_icp.dts @@ -202,17 +202,9 @@ status = "okay"; i2c6: i2c@600 { - compatible = "atmel,sama5d2-i2c"; - reg = <0x600 0x200>; - interrupts = <23 IRQ_TYPE_LEVEL_HIGH 7>; dmas = <0>, <0>; - dma-names = "tx", "rx"; - #address-cells = <1>; - #size-cells = <0>; - clocks = <&pmc PMC_TYPE_PERIPHERAL 23>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_flx4_default>; - atmel,fifo-size = <16>; status = "okay"; mcp16502@5b { diff --git a/arch/arm/boot/dts/at91-sama5d2_xplained.dts b/arch/arm/boot/dts/at91-sama5d2_xplained.dts index 0666708b05f9..a5046f8257ad 100644 --- a/arch/arm/boot/dts/at91-sama5d2_xplained.dts +++ b/arch/arm/boot/dts/at91-sama5d2_xplained.dts @@ -378,20 +378,12 @@ status = "okay"; i2c6: i2c@600 { - compatible = "atmel,sama5d2-i2c"; - reg = <0x600 0x200>; - interrupts = <23 IRQ_TYPE_LEVEL_HIGH 7>; dmas = <0>, <0>; - dma-names = "tx", "rx"; - #address-cells = <1>; - #size-cells = <0>; - clocks = <&pmc PMC_TYPE_PERIPHERAL 23>; pinctrl-names = "default", "gpio"; pinctrl-0 = <&pinctrl_flx4_default>; pinctrl-1 = <&pinctrl_flx4_gpio>; sda-gpios = <&pioA PIN_PD12 GPIO_ACTIVE_HIGH>; scl-gpios = <&pioA PIN_PD13 GPIO_ACTIVE_HIGH>; - atmel,fifo-size = <16>; i2c-analog-filter; i2c-digital-filter; i2c-digital-filter-width-ns = <35>; diff --git a/arch/arm/boot/dts/sama5d2.dtsi b/arch/arm/boot/dts/sama5d2.dtsi index ab550d69db91..5c31e4068eb5 100644 --- a/arch/arm/boot/dts/sama5d2.dtsi +++ b/arch/arm/boot/dts/sama5d2.dtsi @@ -814,6 +814,46 @@ #size-cells = <1>; ranges = <0x0 0xfc018000 0x800>; status = "disabled"; + + uart9: serial@200 { + compatible = "atmel,at91sam9260-usart"; + reg = <0x200 0x200>; + interrupts = <23 IRQ_TYPE_LEVEL_HIGH 7>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 23>; + clock-names = "usart"; + atmel,fifo-size = <32>; + status = "disabled"; + }; + + spi6: spi@400 { + compatible = "atmel,at91rm9200-spi"; + reg = <0x400 0x200>; + interrupts = <23 IRQ_TYPE_LEVEL_HIGH 7>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 23>; + clock-names = "spi_clk"; + atmel,fifo-size = <16>; + status = "disabled"; + }; + + i2c6: i2c@600 { + compatible = "atmel,sama5d2-i2c"; + reg = <0x600 0x200>; + interrupts = <23 IRQ_TYPE_LEVEL_HIGH 7>; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 23>; + dmas = <&dma0 + (AT91_XDMAC_DT_MEM_IF(0) | + AT91_XDMAC_DT_PER_IF(1) | + AT91_XDMAC_DT_PERID(19))>, + <&dma0 + (AT91_XDMAC_DT_MEM_IF(0) | + AT91_XDMAC_DT_PER_IF(1) | + AT91_XDMAC_DT_PERID(20))>; + dma-names = "tx", "rx"; + atmel,fifo-size = <16>; + status = "disabled"; + }; }; trng@fc01c000 { From 445a9d6e562a656f6f9bd4acfd5d55bd415f206e Mon Sep 17 00:00:00 2001 From: Tudor Ambarus Date: Thu, 14 May 2020 05:03:08 +0000 Subject: [PATCH 20/35] ARM: dts: at91: sama5d2: Move flx3 definitions in the SoC dtsi The Flexcom IP is part of the sama5d2 SoC. Move the flx3 node together with its function definitions in sama5d2.dtsi. Boards will just fill the pins and enable the desired functions. Signed-off-by: Tudor Ambarus Link: https://lore.kernel.org/r/20200514050301.147442-4-tudor.ambarus@microchip.com Signed-off-by: Alexandre Belloni --- arch/arm/boot/dts/at91-kizbox3_common.dtsi | 13 --------- arch/arm/boot/dts/at91-sama5d27_som1_ek.dts | 13 +-------- arch/arm/boot/dts/at91-sama5d2_icp.dts | 6 ----- arch/arm/boot/dts/sama5d2.dtsi | 29 +++++++++++++++++++++ 4 files changed, 30 insertions(+), 31 deletions(-) diff --git a/arch/arm/boot/dts/at91-kizbox3_common.dtsi b/arch/arm/boot/dts/at91-kizbox3_common.dtsi index ee6f036aa008..4351a8d32225 100644 --- a/arch/arm/boot/dts/at91-kizbox3_common.dtsi +++ b/arch/arm/boot/dts/at91-kizbox3_common.dtsi @@ -325,21 +325,8 @@ status = "disabled"; uart8: serial@200 { - compatible = "atmel,at91sam9260-usart"; - reg = <0x200 0x400>; - interrupts = <22 IRQ_TYPE_LEVEL_HIGH 7>; - dmas = <&dma0 - (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) - | AT91_XDMAC_DT_PERID(17))>, - <&dma0 - (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) - | AT91_XDMAC_DT_PERID(18))>; - dma-names = "tx", "rx"; - clocks = <&pmc PMC_TYPE_PERIPHERAL 22>; - clock-names = "usart"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_flx3_default>; - atmel,fifo-size = <32>; atmel,use-dma-rx; atmel,use-dma-tx; status = "disabled"; diff --git a/arch/arm/boot/dts/at91-sama5d27_som1_ek.dts b/arch/arm/boot/dts/at91-sama5d27_som1_ek.dts index 5f4a7c8725f3..abbf14e29d85 100644 --- a/arch/arm/boot/dts/at91-sama5d27_som1_ek.dts +++ b/arch/arm/boot/dts/at91-sama5d27_som1_ek.dts @@ -179,26 +179,15 @@ status = "disabled"; uart8: serial@200 { - compatible = "atmel,at91sam9260-usart"; - reg = <0x200 0x200>; - interrupts = <22 IRQ_TYPE_LEVEL_HIGH 7>; - clocks = <&pmc PMC_TYPE_PERIPHERAL 22>; - clock-names = "usart"; + dmas = <0>, <0>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_flx3_default>; - atmel,fifo-size = <32>; status = "disabled"; /* Conflict with isc. */ }; spi5: spi@400 { - compatible = "atmel,at91rm9200-spi"; - reg = <0x400 0x200>; - interrupts = <22 IRQ_TYPE_LEVEL_HIGH 7>; - clocks = <&pmc PMC_TYPE_PERIPHERAL 22>; - clock-names = "spi_clk"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_flx3_default>; - atmel,fifo-size = <16>; status = "disabled"; /* Conflict with isc. */ }; }; diff --git a/arch/arm/boot/dts/at91-sama5d2_icp.dts b/arch/arm/boot/dts/at91-sama5d2_icp.dts index 7216a794f4f6..8a4336e12a60 100644 --- a/arch/arm/boot/dts/at91-sama5d2_icp.dts +++ b/arch/arm/boot/dts/at91-sama5d2_icp.dts @@ -185,14 +185,8 @@ status = "okay"; spi5: spi@400 { - compatible = "atmel,at91rm9200-spi"; - reg = <0x400 0x200>; - interrupts = <22 IRQ_TYPE_LEVEL_HIGH 7>; - clocks = <&pmc PMC_TYPE_PERIPHERAL 22>; - clock-names = "spi_clk"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_mikrobus1_spi &pinctrl_mikrobus1_spi_cs>; - atmel,fifo-size = <16>; status = "okay"; }; }; diff --git a/arch/arm/boot/dts/sama5d2.dtsi b/arch/arm/boot/dts/sama5d2.dtsi index 5c31e4068eb5..5e84cde8226a 100644 --- a/arch/arm/boot/dts/sama5d2.dtsi +++ b/arch/arm/boot/dts/sama5d2.dtsi @@ -804,6 +804,35 @@ #size-cells = <1>; ranges = <0x0 0xfc014000 0x800>; status = "disabled"; + + uart8: serial@200 { + compatible = "atmel,at91sam9260-usart"; + reg = <0x200 0x200>; + interrupts = <22 IRQ_TYPE_LEVEL_HIGH 7>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 22>; + clock-names = "usart"; + dmas = <&dma0 + (AT91_XDMAC_DT_MEM_IF(0) | + AT91_XDMAC_DT_PER_IF(1) | + AT91_XDMAC_DT_PERID(17))>, + <&dma0 + (AT91_XDMAC_DT_MEM_IF(0) | + AT91_XDMAC_DT_PER_IF(1) | + AT91_XDMAC_DT_PERID(18))>; + dma-names = "tx", "rx"; + atmel,fifo-size = <32>; + status = "disabled"; + }; + + spi5: spi@400 { + compatible = "atmel,at91rm9200-spi"; + reg = <0x400 0x200>; + interrupts = <22 IRQ_TYPE_LEVEL_HIGH 7>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 22>; + clock-names = "spi_clk"; + atmel,fifo-size = <16>; + status = "disabled"; + }; }; flx4: flexcom@fc018000 { From 0afa4365266ab36c5751ff3136d95b5cae070467 Mon Sep 17 00:00:00 2001 From: Tudor Ambarus Date: Thu, 14 May 2020 05:03:08 +0000 Subject: [PATCH 21/35] ARM: dts: at91: sama5d2: Move flx2 definitions in the SoC dtsi The Flexcom IP is part of the sama5d2 SoC. Move the flx2 node together with its function definitions in sama5d2.dtsi. Boards will just fill the pins and enable the desired functions. Signed-off-by: Tudor Ambarus Link: https://lore.kernel.org/r/20200514050301.147442-5-tudor.ambarus@microchip.com Signed-off-by: Alexandre Belloni --- arch/arm/boot/dts/at91-sama5d2_icp.dts | 12 ------------ arch/arm/boot/dts/sama5d2.dtsi | 18 ++++++++++++++++++ 2 files changed, 18 insertions(+), 12 deletions(-) diff --git a/arch/arm/boot/dts/at91-sama5d2_icp.dts b/arch/arm/boot/dts/at91-sama5d2_icp.dts index 8a4336e12a60..23f413afb333 100644 --- a/arch/arm/boot/dts/at91-sama5d2_icp.dts +++ b/arch/arm/boot/dts/at91-sama5d2_icp.dts @@ -160,18 +160,6 @@ status = "okay"; uart7: serial@200 { - compatible = "atmel,at91sam9260-usart"; - reg = <0x200 0x200>; - interrupts = <21 IRQ_TYPE_LEVEL_HIGH 7>; - dmas = <&dma0 - (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) | - AT91_XDMAC_DT_PERID(15))>, - <&dma0 - (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) | - AT91_XDMAC_DT_PERID(16))>; - dma-names = "tx", "rx"; - clocks = <&pmc PMC_TYPE_PERIPHERAL 21>; - clock-names = "usart"; pinctrl-0 = <&pinctrl_flx2_default>; pinctrl-names = "default"; atmel,use-dma-rx; diff --git a/arch/arm/boot/dts/sama5d2.dtsi b/arch/arm/boot/dts/sama5d2.dtsi index 5e84cde8226a..89064225e9aa 100644 --- a/arch/arm/boot/dts/sama5d2.dtsi +++ b/arch/arm/boot/dts/sama5d2.dtsi @@ -794,6 +794,24 @@ #size-cells = <1>; ranges = <0x0 0xfc010000 0x800>; status = "disabled"; + + uart7: serial@200 { + compatible = "atmel,at91sam9260-usart"; + reg = <0x200 0x200>; + interrupts = <21 IRQ_TYPE_LEVEL_HIGH 7>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 21>; + clock-names = "usart"; + dmas = <&dma0 + (AT91_XDMAC_DT_MEM_IF(0) | + AT91_XDMAC_DT_PER_IF(1) | + AT91_XDMAC_DT_PERID(15))>, + <&dma0 + (AT91_XDMAC_DT_MEM_IF(0) | + AT91_XDMAC_DT_PER_IF(1) | + AT91_XDMAC_DT_PERID(16))>; + dma-names = "tx", "rx"; + status = "disabled"; + }; }; flx3: flexcom@fc014000 { From 96f63ffdbc38e1b61e768a47b9c52f42f4c7b846 Mon Sep 17 00:00:00 2001 From: Tudor Ambarus Date: Thu, 14 May 2020 05:03:09 +0000 Subject: [PATCH 22/35] ARM: dts: at91: sama5d2: Move flx1 definitions in the SoC dtsi The Flexcom IP is part of the sama5d2 SoC. Move the flx0 node together with its function definitions in sama5d2.dtsi. Boards will just fill the pins and enable the desired functions. Signed-off-by: Tudor Ambarus Link: https://lore.kernel.org/r/20200514050301.147442-6-tudor.ambarus@microchip.com Signed-off-by: Alexandre Belloni --- arch/arm/boot/dts/at91-sama5d27_som1_ek.dts | 7 ----- arch/arm/boot/dts/at91-sama5d27_wlsom1.dtsi | 12 --------- arch/arm/boot/dts/sama5d2.dtsi | 29 +++++++++++++++++++++ 3 files changed, 29 insertions(+), 19 deletions(-) diff --git a/arch/arm/boot/dts/at91-sama5d27_som1_ek.dts b/arch/arm/boot/dts/at91-sama5d27_som1_ek.dts index abbf14e29d85..a0deff15fb9a 100644 --- a/arch/arm/boot/dts/at91-sama5d27_som1_ek.dts +++ b/arch/arm/boot/dts/at91-sama5d27_som1_ek.dts @@ -126,20 +126,13 @@ status = "okay"; i2c3: i2c@600 { - compatible = "atmel,sama5d2-i2c"; - reg = <0x600 0x200>; - interrupts = <20 IRQ_TYPE_LEVEL_HIGH 7>; dmas = <0>, <0>; dma-names = "tx", "rx"; i2c-analog-filter; i2c-digital-filter; i2c-digital-filter-width-ns = <35>; - #address-cells = <1>; - #size-cells = <0>; - clocks = <&pmc PMC_TYPE_PERIPHERAL 20>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_mikrobus_i2c>; - atmel,fifo-size = <16>; status = "okay"; }; }; diff --git a/arch/arm/boot/dts/at91-sama5d27_wlsom1.dtsi b/arch/arm/boot/dts/at91-sama5d27_wlsom1.dtsi index bea3d60b9722..a06700e53e4c 100644 --- a/arch/arm/boot/dts/at91-sama5d27_wlsom1.dtsi +++ b/arch/arm/boot/dts/at91-sama5d27_wlsom1.dtsi @@ -36,18 +36,6 @@ atmel,flexcom-mode = ; uart6: serial@200 { - compatible = "atmel,at91sam9260-usart"; - reg = <0x200 0x200>; - interrupts = <20 IRQ_TYPE_LEVEL_HIGH 7>; - dmas = <&dma0 - (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) | - AT91_XDMAC_DT_PERID(13))>, - <&dma0 - (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) | - AT91_XDMAC_DT_PERID(14))>; - dma-names = "tx", "rx"; - clocks = <&pmc PMC_TYPE_PERIPHERAL 20>; - clock-names = "usart"; pinctrl-0 = <&pinctrl_flx1_default>; pinctrl-names = "default"; }; diff --git a/arch/arm/boot/dts/sama5d2.dtsi b/arch/arm/boot/dts/sama5d2.dtsi index 89064225e9aa..79ed7bd02df6 100644 --- a/arch/arm/boot/dts/sama5d2.dtsi +++ b/arch/arm/boot/dts/sama5d2.dtsi @@ -645,6 +645,35 @@ #size-cells = <1>; ranges = <0x0 0xf8038000 0x800>; status = "disabled"; + + uart6: serial@200 { + compatible = "atmel,at91sam9260-usart"; + reg = <0x200 0x200>; + interrupts = <20 IRQ_TYPE_LEVEL_HIGH 7>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 20>; + clock-names = "usart"; + dmas = <&dma0 + (AT91_XDMAC_DT_MEM_IF(0) | + AT91_XDMAC_DT_PER_IF(1) | + AT91_XDMAC_DT_PERID(13))>, + <&dma0 + (AT91_XDMAC_DT_MEM_IF(0) | + AT91_XDMAC_DT_PER_IF(1) | + AT91_XDMAC_DT_PERID(14))>; + dma-names = "tx", "rx"; + status = "disabled"; + }; + + i2c3: i2c@600 { + compatible = "atmel,sama5d2-i2c"; + reg = <0x600 0x200>; + interrupts = <20 IRQ_TYPE_LEVEL_HIGH 7>; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 20>; + atmel,fifo-size = <16>; + status = "disabled"; + }; }; securam: sram@f8044000 { From 56cd4b9e8c67fa60244aea013cc3846f9d8c498b Mon Sep 17 00:00:00 2001 From: Tudor Ambarus Date: Thu, 14 May 2020 05:03:10 +0000 Subject: [PATCH 23/35] ARM: dts: at91: sama5d2: Move flx0 definitions in the SoC dtsi The Flexcom IP is part of the sama5d2 SoC. Move the flx0 node together with its function definitions in sama5d2.dtsi. Boards will just fill the pins and enable the desired functions. There is a single functional change in this patch. With the move of the flx0 uart5 definition in the SoC dtsi, the uart5 from at91-sama5d27_wlsom1_ek.dts inherits the following optional property: atmel,fifo-size = <32>; This particular change was tested by Codrin. Signed-off-by: Tudor Ambarus Tested-by: Codrin Ciubotariu Link: https://lore.kernel.org/r/20200514050301.147442-7-tudor.ambarus@microchip.com Signed-off-by: Alexandre Belloni --- arch/arm/boot/dts/at91-kizbox3_common.dtsi | 13 ------ arch/arm/boot/dts/at91-sama5d27_wlsom1_ek.dts | 12 ------ arch/arm/boot/dts/at91-sama5d2_icp.dts | 6 --- arch/arm/boot/dts/at91-sama5d2_ptc_ek.dts | 7 ---- arch/arm/boot/dts/at91-sama5d2_xplained.dts | 7 +--- arch/arm/boot/dts/sama5d2.dtsi | 40 +++++++++++++++++++ 6 files changed, 41 insertions(+), 44 deletions(-) diff --git a/arch/arm/boot/dts/at91-kizbox3_common.dtsi b/arch/arm/boot/dts/at91-kizbox3_common.dtsi index 4351a8d32225..7c3076e245ef 100644 --- a/arch/arm/boot/dts/at91-kizbox3_common.dtsi +++ b/arch/arm/boot/dts/at91-kizbox3_common.dtsi @@ -299,21 +299,8 @@ status = "disabled"; uart5: serial@200 { - compatible = "atmel,at91sam9260-usart"; - reg = <0x200 0x400>; - interrupts = <19 IRQ_TYPE_LEVEL_HIGH 7>; - dmas = <&dma0 - (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) - | AT91_XDMAC_DT_PERID(11))>, - <&dma0 - (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) - | AT91_XDMAC_DT_PERID(12))>; - dma-names = "tx", "rx"; - clocks = <&pmc PMC_TYPE_PERIPHERAL 19>; - clock-names = "usart"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_flx0_default>; - atmel,fifo-size = <32>; atmel,use-dma-rx; atmel,use-dma-tx; status = "disabled"; diff --git a/arch/arm/boot/dts/at91-sama5d27_wlsom1_ek.dts b/arch/arm/boot/dts/at91-sama5d27_wlsom1_ek.dts index 6b8461278950..6b38fa3f5568 100644 --- a/arch/arm/boot/dts/at91-sama5d27_wlsom1_ek.dts +++ b/arch/arm/boot/dts/at91-sama5d27_wlsom1_ek.dts @@ -77,18 +77,6 @@ status = "okay"; uart5: serial@200 { - compatible = "atmel,at91sam9260-usart"; - reg = <0x200 0x200>; - interrupts = <19 IRQ_TYPE_LEVEL_HIGH 7>; - dmas = <&dma0 - (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) | - AT91_XDMAC_DT_PERID(11))>, - <&dma0 - (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) | - AT91_XDMAC_DT_PERID(12))>; - dma-names = "tx", "rx"; - clocks = <&pmc PMC_TYPE_PERIPHERAL 19>; - clock-names = "usart"; pinctrl-0 = <&pinctrl_flx0_default>; pinctrl-names = "default"; atmel,use-dma-rx; diff --git a/arch/arm/boot/dts/at91-sama5d2_icp.dts b/arch/arm/boot/dts/at91-sama5d2_icp.dts index 23f413afb333..4a01ab8e7e70 100644 --- a/arch/arm/boot/dts/at91-sama5d2_icp.dts +++ b/arch/arm/boot/dts/at91-sama5d2_icp.dts @@ -105,15 +105,9 @@ status = "okay"; spi2: spi@400 { - compatible = "atmel,at91rm9200-spi"; - reg = <0x400 0x200>; - interrupts = <19 IRQ_TYPE_LEVEL_HIGH 7>; - clocks = <&pmc PMC_TYPE_PERIPHERAL 19>; - clock-names = "spi_clk"; cs-gpios = <&pioA PIN_PC0 GPIO_ACTIVE_LOW>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_mikrobus2_spi &pinctrl_ksz_spi_cs>; - atmel,fifo-size = <16>; status = "okay"; #address-cells = <1>; #size-cells = <0>; diff --git a/arch/arm/boot/dts/at91-sama5d2_ptc_ek.dts b/arch/arm/boot/dts/at91-sama5d2_ptc_ek.dts index 32435ce1dab2..8ad3a9c6c536 100644 --- a/arch/arm/boot/dts/at91-sama5d2_ptc_ek.dts +++ b/arch/arm/boot/dts/at91-sama5d2_ptc_ek.dts @@ -191,20 +191,13 @@ status = "okay"; i2c2: i2c@600 { - compatible = "atmel,sama5d2-i2c"; - reg = <0x600 0x200>; - interrupts = <19 IRQ_TYPE_LEVEL_HIGH 7>; dmas = <0>, <0>; dma-names = "tx", "rx"; - #address-cells = <1>; - #size-cells = <0>; - clocks = <&pmc PMC_TYPE_PERIPHERAL 19>; pinctrl-names = "default", "gpio"; pinctrl-0 = <&pinctrl_flx0_default>; pinctrl-1 = <&pinctrl_flx0_gpio>; sda-gpios = <&pioA PIN_PB28 GPIO_ACTIVE_HIGH>; scl-gpios = <&pioA PIN_PB29 GPIO_ACTIVE_HIGH>; - atmel,fifo-size = <16>; status = "okay"; }; }; diff --git a/arch/arm/boot/dts/at91-sama5d2_xplained.dts b/arch/arm/boot/dts/at91-sama5d2_xplained.dts index a5046f8257ad..da4442715ea5 100644 --- a/arch/arm/boot/dts/at91-sama5d2_xplained.dts +++ b/arch/arm/boot/dts/at91-sama5d2_xplained.dts @@ -327,14 +327,9 @@ status = "disabled"; /* conflict with ISC_D2 & ISC_D3 data pins */ uart5: serial@200 { - compatible = "atmel,at91sam9260-usart"; - reg = <0x200 0x200>; - interrupts = <19 IRQ_TYPE_LEVEL_HIGH 7>; - clocks = <&pmc PMC_TYPE_PERIPHERAL 19>; - clock-names = "usart"; + dmas = <0>, <0>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_flx0_default>; - atmel,fifo-size = <32>; status = "okay"; }; }; diff --git a/arch/arm/boot/dts/sama5d2.dtsi b/arch/arm/boot/dts/sama5d2.dtsi index 79ed7bd02df6..acb91908bd74 100644 --- a/arch/arm/boot/dts/sama5d2.dtsi +++ b/arch/arm/boot/dts/sama5d2.dtsi @@ -635,6 +635,46 @@ #size-cells = <1>; ranges = <0x0 0xf8034000 0x800>; status = "disabled"; + + uart5: serial@200 { + compatible = "atmel,at91sam9260-usart"; + reg = <0x200 0x200>; + interrupts = <19 IRQ_TYPE_LEVEL_HIGH 7>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 19>; + clock-names = "usart"; + dmas = <&dma0 + (AT91_XDMAC_DT_MEM_IF(0) | + AT91_XDMAC_DT_PER_IF(1) | + AT91_XDMAC_DT_PERID(11))>, + <&dma0 + (AT91_XDMAC_DT_MEM_IF(0) | + AT91_XDMAC_DT_PER_IF(1) | + AT91_XDMAC_DT_PERID(12))>; + dma-names = "tx", "rx"; + atmel,fifo-size = <32>; + status = "disabled"; + }; + + spi2: spi@400 { + compatible = "atmel,at91rm9200-spi"; + reg = <0x400 0x200>; + interrupts = <19 IRQ_TYPE_LEVEL_HIGH 7>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 19>; + clock-names = "spi_clk"; + atmel,fifo-size = <16>; + status = "disabled"; + }; + + i2c2: i2c@600 { + compatible = "atmel,sama5d2-i2c"; + reg = <0x600 0x200>; + interrupts = <19 IRQ_TYPE_LEVEL_HIGH 7>; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 19>; + atmel,fifo-size = <16>; + status = "disabled"; + }; }; flx1: flexcom@f8038000 { From 4b098033279ef20f3a05de1cfc64ad6b9699688f Mon Sep 17 00:00:00 2001 From: Tudor Ambarus Date: Thu, 14 May 2020 05:03:11 +0000 Subject: [PATCH 24/35] ARM: dts: at91: sama5d2: Specify the FIFO size for the Flexcom UART The UART submodule in Flexcom has 32-byte Transmit and Receive FIFOs. Tested uart7 on sama5d2-icp, which has both DMA and FIFO enabled. Signed-off-by: Tudor Ambarus Link: https://lore.kernel.org/r/20200514050301.147442-8-tudor.ambarus@microchip.com Signed-off-by: Alexandre Belloni --- arch/arm/boot/dts/sama5d2.dtsi | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm/boot/dts/sama5d2.dtsi b/arch/arm/boot/dts/sama5d2.dtsi index acb91908bd74..dde969a140b4 100644 --- a/arch/arm/boot/dts/sama5d2.dtsi +++ b/arch/arm/boot/dts/sama5d2.dtsi @@ -701,6 +701,7 @@ AT91_XDMAC_DT_PER_IF(1) | AT91_XDMAC_DT_PERID(14))>; dma-names = "tx", "rx"; + atmel,fifo-size = <32>; status = "disabled"; }; @@ -879,6 +880,7 @@ AT91_XDMAC_DT_PER_IF(1) | AT91_XDMAC_DT_PERID(16))>; dma-names = "tx", "rx"; + atmel,fifo-size = <32>; status = "disabled"; }; }; From ddcdaeb88242ca9b2a3ded2c6cb1d664e0ce24a3 Mon Sep 17 00:00:00 2001 From: Tudor Ambarus Date: Thu, 14 May 2020 05:03:12 +0000 Subject: [PATCH 25/35] ARM: dts: at91: sama5d2: Add DMA bindings for the SPI and UART flx4 functions Spare boards of duplicating the DMA bindings. Describe the flx4 DMA bindings in the SoC dtsi. Users that don't want to use DMA for their flexcom functions have to overwrite the flexcom DMA bindings in their board device tree. Signed-off-by: Tudor Ambarus Link: https://lore.kernel.org/r/20200514050301.147442-9-tudor.ambarus@microchip.com Signed-off-by: Alexandre Belloni --- arch/arm/boot/dts/at91-sama5d27_som1_ek.dts | 2 ++ arch/arm/boot/dts/sama5d2.dtsi | 18 ++++++++++++++++++ 2 files changed, 20 insertions(+) diff --git a/arch/arm/boot/dts/at91-sama5d27_som1_ek.dts b/arch/arm/boot/dts/at91-sama5d27_som1_ek.dts index a0deff15fb9a..6ad66d034305 100644 --- a/arch/arm/boot/dts/at91-sama5d27_som1_ek.dts +++ b/arch/arm/boot/dts/at91-sama5d27_som1_ek.dts @@ -190,12 +190,14 @@ status = "okay"; uart9: serial@200 { + dmas = <0>, <0>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_flx4_default>; status = "disabled"; /* Conflict with spi6 and i2c6. */ }; spi6: spi@400 { + dmas = <0>, <0>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_mikrobus_spi &pinctrl_mikrobus1_spi_cs &pinctrl_mikrobus2_spi_cs>; status = "okay"; /* Conflict with uart5 and i2c6. */ diff --git a/arch/arm/boot/dts/sama5d2.dtsi b/arch/arm/boot/dts/sama5d2.dtsi index dde969a140b4..66aa8d6502d3 100644 --- a/arch/arm/boot/dts/sama5d2.dtsi +++ b/arch/arm/boot/dts/sama5d2.dtsi @@ -939,6 +939,15 @@ interrupts = <23 IRQ_TYPE_LEVEL_HIGH 7>; clocks = <&pmc PMC_TYPE_PERIPHERAL 23>; clock-names = "usart"; + dmas = <&dma0 + (AT91_XDMAC_DT_MEM_IF(0) | + AT91_XDMAC_DT_PER_IF(1) | + AT91_XDMAC_DT_PERID(19))>, + <&dma0 + (AT91_XDMAC_DT_MEM_IF(0) | + AT91_XDMAC_DT_PER_IF(1) | + AT91_XDMAC_DT_PERID(20))>; + dma-names = "tx", "rx"; atmel,fifo-size = <32>; status = "disabled"; }; @@ -949,6 +958,15 @@ interrupts = <23 IRQ_TYPE_LEVEL_HIGH 7>; clocks = <&pmc PMC_TYPE_PERIPHERAL 23>; clock-names = "spi_clk"; + dmas = <&dma0 + (AT91_XDMAC_DT_MEM_IF(0) | + AT91_XDMAC_DT_PER_IF(1) | + AT91_XDMAC_DT_PERID(19))>, + <&dma0 + (AT91_XDMAC_DT_MEM_IF(0) | + AT91_XDMAC_DT_PER_IF(1) | + AT91_XDMAC_DT_PERID(20))>; + dma-names = "tx", "rx"; atmel,fifo-size = <16>; status = "disabled"; }; From b793f1661777dddbd8f99554c24df247906c29bc Mon Sep 17 00:00:00 2001 From: Tudor Ambarus Date: Thu, 14 May 2020 05:03:12 +0000 Subject: [PATCH 26/35] ARM: dts: at91: sama5d2: Add DMA bindings for the flx3 SPI function Spare boards of duplicating the DMA bindings. Describe the flx3 DMA bindings in the SoC dtsi. Users that don't want to use DMA for their flexcom functions have to overwrite the flexcom DMA bindings in their board device tree. Signed-off-by: Tudor Ambarus Link: https://lore.kernel.org/r/20200514050301.147442-10-tudor.ambarus@microchip.com Signed-off-by: Alexandre Belloni --- arch/arm/boot/dts/at91-sama5d27_som1_ek.dts | 1 + arch/arm/boot/dts/at91-sama5d2_icp.dts | 1 + arch/arm/boot/dts/sama5d2.dtsi | 9 +++++++++ 3 files changed, 11 insertions(+) diff --git a/arch/arm/boot/dts/at91-sama5d27_som1_ek.dts b/arch/arm/boot/dts/at91-sama5d27_som1_ek.dts index 6ad66d034305..1aa8b79d618b 100644 --- a/arch/arm/boot/dts/at91-sama5d27_som1_ek.dts +++ b/arch/arm/boot/dts/at91-sama5d27_som1_ek.dts @@ -179,6 +179,7 @@ }; spi5: spi@400 { + dmas = <0>, <0>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_flx3_default>; status = "disabled"; /* Conflict with isc. */ diff --git a/arch/arm/boot/dts/at91-sama5d2_icp.dts b/arch/arm/boot/dts/at91-sama5d2_icp.dts index 4a01ab8e7e70..559d8ae93af9 100644 --- a/arch/arm/boot/dts/at91-sama5d2_icp.dts +++ b/arch/arm/boot/dts/at91-sama5d2_icp.dts @@ -167,6 +167,7 @@ status = "okay"; spi5: spi@400 { + dmas = <0>, <0>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_mikrobus1_spi &pinctrl_mikrobus1_spi_cs>; status = "okay"; diff --git a/arch/arm/boot/dts/sama5d2.dtsi b/arch/arm/boot/dts/sama5d2.dtsi index 66aa8d6502d3..5a0162915ae7 100644 --- a/arch/arm/boot/dts/sama5d2.dtsi +++ b/arch/arm/boot/dts/sama5d2.dtsi @@ -919,6 +919,15 @@ interrupts = <22 IRQ_TYPE_LEVEL_HIGH 7>; clocks = <&pmc PMC_TYPE_PERIPHERAL 22>; clock-names = "spi_clk"; + dmas = <&dma0 + (AT91_XDMAC_DT_MEM_IF(0) | + AT91_XDMAC_DT_PER_IF(1) | + AT91_XDMAC_DT_PERID(17))>, + <&dma0 + (AT91_XDMAC_DT_MEM_IF(0) | + AT91_XDMAC_DT_PER_IF(1) | + AT91_XDMAC_DT_PERID(18))>; + dma-names = "tx", "rx"; atmel,fifo-size = <16>; status = "disabled"; }; From 1a6508a2ed9a9a7925c999683eb872cd0ed2a7bd Mon Sep 17 00:00:00 2001 From: Tudor Ambarus Date: Thu, 14 May 2020 05:03:13 +0000 Subject: [PATCH 27/35] ARM: dts: at91: sama5d2: Add DMA bindings for the flx1 I2C function Spare boards of duplicating the DMA bindings. Describe the flx1 DMA bindings in the SoC dtsi. Users that don't want to use DMA for their flexcom functions have to overwrite the flexcom DMA bindings in their board device tree. Signed-off-by: Tudor Ambarus Link: https://lore.kernel.org/r/20200514050301.147442-11-tudor.ambarus@microchip.com Signed-off-by: Alexandre Belloni --- arch/arm/boot/dts/at91-sama5d27_som1_ek.dts | 1 - arch/arm/boot/dts/sama5d2.dtsi | 9 +++++++++ 2 files changed, 9 insertions(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/at91-sama5d27_som1_ek.dts b/arch/arm/boot/dts/at91-sama5d27_som1_ek.dts index 1aa8b79d618b..0e159f879c15 100644 --- a/arch/arm/boot/dts/at91-sama5d27_som1_ek.dts +++ b/arch/arm/boot/dts/at91-sama5d27_som1_ek.dts @@ -127,7 +127,6 @@ i2c3: i2c@600 { dmas = <0>, <0>; - dma-names = "tx", "rx"; i2c-analog-filter; i2c-digital-filter; i2c-digital-filter-width-ns = <35>; diff --git a/arch/arm/boot/dts/sama5d2.dtsi b/arch/arm/boot/dts/sama5d2.dtsi index 5a0162915ae7..855846c74a32 100644 --- a/arch/arm/boot/dts/sama5d2.dtsi +++ b/arch/arm/boot/dts/sama5d2.dtsi @@ -712,6 +712,15 @@ #address-cells = <1>; #size-cells = <0>; clocks = <&pmc PMC_TYPE_PERIPHERAL 20>; + dmas = <&dma0 + (AT91_XDMAC_DT_MEM_IF(0) | + AT91_XDMAC_DT_PER_IF(1) | + AT91_XDMAC_DT_PERID(13))>, + <&dma0 + (AT91_XDMAC_DT_MEM_IF(0) | + AT91_XDMAC_DT_PER_IF(1) | + AT91_XDMAC_DT_PERID(14))>; + dma-names = "tx", "rx"; atmel,fifo-size = <16>; status = "disabled"; }; From 466fb89be5916af18ba5ea636fc1f7489a71e276 Mon Sep 17 00:00:00 2001 From: Tudor Ambarus Date: Thu, 14 May 2020 05:03:14 +0000 Subject: [PATCH 28/35] ARM: dts: at91: sama5d2: Add DMA bindings for the SPI and I2C flx0 functions Spare boards of duplicating the DMA bindings. Describe the flx0 DMA bindings in the SoC dtsi. Users that don't want to use DMA for their flexcom functions have to overwrite the flexcom DMA bindings in their board device tree. Signed-off-by: Tudor Ambarus Link: https://lore.kernel.org/r/20200514050301.147442-12-tudor.ambarus@microchip.com Signed-off-by: Alexandre Belloni --- arch/arm/boot/dts/at91-sama5d2_icp.dts | 1 + arch/arm/boot/dts/at91-sama5d2_ptc_ek.dts | 1 - arch/arm/boot/dts/sama5d2.dtsi | 18 ++++++++++++++++++ 3 files changed, 19 insertions(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/at91-sama5d2_icp.dts b/arch/arm/boot/dts/at91-sama5d2_icp.dts index 559d8ae93af9..8d19925fc09e 100644 --- a/arch/arm/boot/dts/at91-sama5d2_icp.dts +++ b/arch/arm/boot/dts/at91-sama5d2_icp.dts @@ -105,6 +105,7 @@ status = "okay"; spi2: spi@400 { + dmas = <0>, <0>; cs-gpios = <&pioA PIN_PC0 GPIO_ACTIVE_LOW>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_mikrobus2_spi &pinctrl_ksz_spi_cs>; diff --git a/arch/arm/boot/dts/at91-sama5d2_ptc_ek.dts b/arch/arm/boot/dts/at91-sama5d2_ptc_ek.dts index 8ad3a9c6c536..0e0341c83aa5 100644 --- a/arch/arm/boot/dts/at91-sama5d2_ptc_ek.dts +++ b/arch/arm/boot/dts/at91-sama5d2_ptc_ek.dts @@ -192,7 +192,6 @@ i2c2: i2c@600 { dmas = <0>, <0>; - dma-names = "tx", "rx"; pinctrl-names = "default", "gpio"; pinctrl-0 = <&pinctrl_flx0_default>; pinctrl-1 = <&pinctrl_flx0_gpio>; diff --git a/arch/arm/boot/dts/sama5d2.dtsi b/arch/arm/boot/dts/sama5d2.dtsi index 855846c74a32..5bba8024f485 100644 --- a/arch/arm/boot/dts/sama5d2.dtsi +++ b/arch/arm/boot/dts/sama5d2.dtsi @@ -661,6 +661,15 @@ interrupts = <19 IRQ_TYPE_LEVEL_HIGH 7>; clocks = <&pmc PMC_TYPE_PERIPHERAL 19>; clock-names = "spi_clk"; + dmas = <&dma0 + (AT91_XDMAC_DT_MEM_IF(0) | + AT91_XDMAC_DT_PER_IF(1) | + AT91_XDMAC_DT_PERID(11))>, + <&dma0 + (AT91_XDMAC_DT_MEM_IF(0) | + AT91_XDMAC_DT_PER_IF(1) | + AT91_XDMAC_DT_PERID(12))>; + dma-names = "tx", "rx"; atmel,fifo-size = <16>; status = "disabled"; }; @@ -672,6 +681,15 @@ #address-cells = <1>; #size-cells = <0>; clocks = <&pmc PMC_TYPE_PERIPHERAL 19>; + dmas = <&dma0 + (AT91_XDMAC_DT_MEM_IF(0) | + AT91_XDMAC_DT_PER_IF(1) | + AT91_XDMAC_DT_PERID(11))>, + <&dma0 + (AT91_XDMAC_DT_MEM_IF(0) | + AT91_XDMAC_DT_PER_IF(1) | + AT91_XDMAC_DT_PERID(12))>; + dma-names = "tx", "rx"; atmel,fifo-size = <16>; status = "disabled"; }; From 6e57359dd660ac1be632c8ae583e502faea6aa7e Mon Sep 17 00:00:00 2001 From: Tudor Ambarus Date: Thu, 14 May 2020 05:03:15 +0000 Subject: [PATCH 29/35] ARM: dts: at91: sama5d2: Remove i2s and tcb aliases from SoC dtsi Device aliases are board-specific, if needed one should define them in board dts rather than in the SoC dtsi. If an alias from the SoC dtsi is addressed by a driver that does not use any of the of_alias*() methods, we can drop it. This is the case for the i2s aliases, drop them. tcb aliases point to nodes that are not enabled in any of the sama5d2 based platforms. atmel_tclib.c is scheduled to go away, any board using that alias is already broken, so get rid of the tcb aliases too. Signed-off-by: Tudor Ambarus Link: https://lore.kernel.org/r/20200514050301.147442-14-tudor.ambarus@microchip.com Signed-off-by: Alexandre Belloni --- arch/arm/boot/dts/sama5d2.dtsi | 4 ---- 1 file changed, 4 deletions(-) diff --git a/arch/arm/boot/dts/sama5d2.dtsi b/arch/arm/boot/dts/sama5d2.dtsi index 5bba8024f485..38371db376b3 100644 --- a/arch/arm/boot/dts/sama5d2.dtsi +++ b/arch/arm/boot/dts/sama5d2.dtsi @@ -21,10 +21,6 @@ aliases { serial0 = &uart1; serial1 = &uart3; - tcb0 = &tcb0; - tcb1 = &tcb1; - i2s0 = &i2s0; - i2s1 = &i2s1; }; cpus { From 6b9a3584c7ed635641e0379df03a17943505d423 Mon Sep 17 00:00:00 2001 From: Tudor Ambarus Date: Thu, 14 May 2020 05:03:15 +0000 Subject: [PATCH 30/35] ARM: dts: at91: sama5d2: Add missing flexcom definitions Describe all the flexcom functions for all the flexcom nodes. Signed-off-by: Tudor Ambarus Link: https://lore.kernel.org/r/20200514050301.147442-13-tudor.ambarus@microchip.com Signed-off-by: Alexandre Belloni --- arch/arm/boot/dts/sama5d2.dtsi | 79 ++++++++++++++++++++++++++++++++++ 1 file changed, 79 insertions(+) diff --git a/arch/arm/boot/dts/sama5d2.dtsi b/arch/arm/boot/dts/sama5d2.dtsi index 38371db376b3..c0a3ca8f9bf7 100644 --- a/arch/arm/boot/dts/sama5d2.dtsi +++ b/arch/arm/boot/dts/sama5d2.dtsi @@ -719,6 +719,25 @@ status = "disabled"; }; + spi3: spi@400 { + compatible = "atmel,at91rm9200-spi"; + reg = <0x400 0x200>; + interrupts = <20 IRQ_TYPE_LEVEL_HIGH 7>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 20>; + clock-names = "spi_clk"; + dmas = <&dma0 + (AT91_XDMAC_DT_MEM_IF(0) | + AT91_XDMAC_DT_PER_IF(1) | + AT91_XDMAC_DT_PERID(13))>, + <&dma0 + (AT91_XDMAC_DT_MEM_IF(0) | + AT91_XDMAC_DT_PER_IF(1) | + AT91_XDMAC_DT_PERID(14))>; + dma-names = "tx", "rx"; + atmel,fifo-size = <16>; + status = "disabled"; + }; + i2c3: i2c@600 { compatible = "atmel,sama5d2-i2c"; reg = <0x600 0x200>; @@ -906,6 +925,45 @@ atmel,fifo-size = <32>; status = "disabled"; }; + + spi4: spi@400 { + compatible = "atmel,at91rm9200-spi"; + reg = <0x400 0x200>; + interrupts = <21 IRQ_TYPE_LEVEL_HIGH 7>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 21>; + clock-names = "spi_clk"; + dmas = <&dma0 + (AT91_XDMAC_DT_MEM_IF(0) | + AT91_XDMAC_DT_PER_IF(1) | + AT91_XDMAC_DT_PERID(15))>, + <&dma0 + (AT91_XDMAC_DT_MEM_IF(0) | + AT91_XDMAC_DT_PER_IF(1) | + AT91_XDMAC_DT_PERID(16))>; + dma-names = "tx", "rx"; + atmel,fifo-size = <16>; + status = "disabled"; + }; + + i2c4: i2c@600 { + compatible = "atmel,sama5d2-i2c"; + reg = <0x600 0x200>; + interrupts = <21 IRQ_TYPE_LEVEL_HIGH 7>; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 21>; + dmas = <&dma0 + (AT91_XDMAC_DT_MEM_IF(0) | + AT91_XDMAC_DT_PER_IF(1) | + AT91_XDMAC_DT_PERID(15))>, + <&dma0 + (AT91_XDMAC_DT_MEM_IF(0) | + AT91_XDMAC_DT_PER_IF(1) | + AT91_XDMAC_DT_PERID(16))>; + dma-names = "tx", "rx"; + atmel,fifo-size = <16>; + status = "disabled"; + }; }; flx3: flexcom@fc014000 { @@ -954,6 +1012,27 @@ atmel,fifo-size = <16>; status = "disabled"; }; + + i2c5: i2c@600 { + compatible = "atmel,sama5d2-i2c"; + reg = <0x600 0x200>; + interrupts = <22 IRQ_TYPE_LEVEL_HIGH 7>; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 22>; + dmas = <&dma0 + (AT91_XDMAC_DT_MEM_IF(0) | + AT91_XDMAC_DT_PER_IF(1) | + AT91_XDMAC_DT_PERID(17))>, + <&dma0 + (AT91_XDMAC_DT_MEM_IF(0) | + AT91_XDMAC_DT_PER_IF(1) | + AT91_XDMAC_DT_PERID(18))>; + dma-names = "tx", "rx"; + atmel,fifo-size = <16>; + status = "disabled"; + }; + }; flx4: flexcom@fc018000 { From c85273fd1452a6de5cfaac93821a243990364108 Mon Sep 17 00:00:00 2001 From: Tudor Ambarus Date: Thu, 14 May 2020 05:03:16 +0000 Subject: [PATCH 31/35] ARM: dts: at91: sama5d2_xplained: Add alias for DBGU The aliases should be defined in the board dts rather than in the SoC dtsi. Don't rely on the aliases defined in the SoC dtsi and define the alias for the Serial DBGU in the board dts file. sama5d2 boards use the "serial0" alias for the Serial DBGU, do the same for sama5d2_xplained. Signed-off-by: Tudor Ambarus Link: https://lore.kernel.org/r/20200514050301.147442-15-tudor.ambarus@microchip.com Signed-off-by: Alexandre Belloni --- arch/arm/boot/dts/at91-sama5d2_xplained.dts | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/arm/boot/dts/at91-sama5d2_xplained.dts b/arch/arm/boot/dts/at91-sama5d2_xplained.dts index da4442715ea5..01ffbddd4ab8 100644 --- a/arch/arm/boot/dts/at91-sama5d2_xplained.dts +++ b/arch/arm/boot/dts/at91-sama5d2_xplained.dts @@ -16,6 +16,10 @@ model = "Atmel SAMA5D2 Xplained"; compatible = "atmel,sama5d2-xplained", "atmel,sama5d2", "atmel,sama5"; + aliases { + serial0 = &uart1; /* DBGU */ + }; + chosen { stdout-path = "serial0:115200n8"; }; From dbe5bbdb28b4fca61584806301a021d57b4f1433 Mon Sep 17 00:00:00 2001 From: Tudor Ambarus Date: Thu, 14 May 2020 05:03:17 +0000 Subject: [PATCH 32/35] ARM: dts: at91: sama5d2_ptc_ek: Add comments to describe the aliases Indicate which i2c alias is for which connector on the board. Specify that serial0 is for DBGU. This eases tester's life. Signed-off-by: Tudor Ambarus Link: https://lore.kernel.org/r/20200514050301.147442-17-tudor.ambarus@microchip.com Signed-off-by: Alexandre Belloni --- arch/arm/boot/dts/at91-sama5d2_ptc_ek.dts | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/arm/boot/dts/at91-sama5d2_ptc_ek.dts b/arch/arm/boot/dts/at91-sama5d2_ptc_ek.dts index 0e0341c83aa5..45c671a2bcf2 100644 --- a/arch/arm/boot/dts/at91-sama5d2_ptc_ek.dts +++ b/arch/arm/boot/dts/at91-sama5d2_ptc_ek.dts @@ -18,9 +18,9 @@ compatible = "atmel,sama5d2-ptc_ek", "atmel,sama5d2", "atmel,sama5"; aliases { - serial0 = &uart0; - i2c0 = &i2c0; - i2c1 = &i2c1; + serial0 = &uart0; /* DBGU */ + i2c0 = &i2c0; /* mikroBUS 1 */ + i2c1 = &i2c1; /* XPRO EXT1 */ i2c2 = &i2c2; }; From bd1f49e7792b1ca6e8c538942294309881150632 Mon Sep 17 00:00:00 2001 From: Tudor Ambarus Date: Thu, 14 May 2020 05:03:17 +0000 Subject: [PATCH 33/35] ARM: dts: at91: sama5d2_xplained: Describe the flx0 I2C function Users can choose which flexcom function to use. Describe the I2C Flexcom0 function. Add alias for the i2c2 node in order to not rely on probe order for the i2c device numbering. The sama5d2 SoC has two dedicated i2c buses and five flexcoms that can function as i2c. The i2c0 and i2c1 aliases are kept for the dedicated i2c buses, the i2c flexcom functions can be numbered in order starting from i2c2. Signed-off-by: Tudor Ambarus Link: https://lore.kernel.org/r/20200514050301.147442-16-tudor.ambarus@microchip.com Signed-off-by: Alexandre Belloni --- arch/arm/boot/dts/at91-sama5d2_xplained.dts | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) diff --git a/arch/arm/boot/dts/at91-sama5d2_xplained.dts b/arch/arm/boot/dts/at91-sama5d2_xplained.dts index 01ffbddd4ab8..77e5d4f5a102 100644 --- a/arch/arm/boot/dts/at91-sama5d2_xplained.dts +++ b/arch/arm/boot/dts/at91-sama5d2_xplained.dts @@ -18,6 +18,7 @@ aliases { serial0 = &uart1; /* DBGU */ + i2c2 = &i2c2; /* XPRO EXT2 */ }; chosen { @@ -336,6 +337,20 @@ pinctrl-0 = <&pinctrl_flx0_default>; status = "okay"; }; + + i2c2: i2c@600 { + dmas = <0>, <0>; + pinctrl-names = "default", "gpio"; + pinctrl-0 = <&pinctrl_flx0_default>; + pinctrl-1 = <&pinctrl_i2c2_gpio>; + sda-gpios = <&pioA PIN_PB28 GPIO_ACTIVE_HIGH>; + scl-gpios = <&pioA PIN_PB29 GPIO_ACTIVE_HIGH>; + i2c-sda-hold-time-ns = <350>; + i2c-analog-filter; + i2c-digital-filter; + i2c-digital-filter-width-ns = <35>; + status = "disabled"; /* conflict with ISC_D2 & ISC_D3 data pins */ + }; }; shdwc@f8048010 { @@ -523,6 +538,12 @@ bias-disable; }; + pinctrl_i2c2_gpio: i2c2_gpio { + pinmux = , + ; + bias-disable; + }; + pinctrl_i2s0_default: i2s0_default { pinmux = , , From c5a28380257327bb7b89974919a3695047277ba5 Mon Sep 17 00:00:00 2001 From: Codrin Ciubotariu Date: Fri, 15 May 2020 17:00:01 +0300 Subject: [PATCH 34/35] ARM: dts: at91: Configure I2C SCL gpio as open drain The SCL gpio pin used by I2C bus for recovery needs to be configured as open drain. Fixes: 455fec938bbb ("ARM: dts: at91: sama5d2: add i2c gpio pinctrl") Fixes: a4bd8da893a3 ("ARM: dts: at91: sama5d3: add i2c gpio pinctrl") Fixes: 8fb82f050cf6 ("ARM: dts: at91: sama5d4: add i2c gpio pinctrl") Signed-off-by: Codrin Ciubotariu Link: https://lore.kernel.org/r/20200515140001.287932-1-codrin.ciubotariu@microchip.com Signed-off-by: Alexandre Belloni --- arch/arm/boot/dts/at91-sama5d2_ptc_ek.dts | 6 +++--- arch/arm/boot/dts/at91-sama5d2_xplained.dts | 8 ++++---- arch/arm/boot/dts/sama5d3.dtsi | 6 +++--- arch/arm/boot/dts/sama5d4.dtsi | 6 +++--- 4 files changed, 13 insertions(+), 13 deletions(-) diff --git a/arch/arm/boot/dts/at91-sama5d2_ptc_ek.dts b/arch/arm/boot/dts/at91-sama5d2_ptc_ek.dts index 45c671a2bcf2..c894c7c788a9 100644 --- a/arch/arm/boot/dts/at91-sama5d2_ptc_ek.dts +++ b/arch/arm/boot/dts/at91-sama5d2_ptc_ek.dts @@ -182,7 +182,7 @@ pinctrl-0 = <&pinctrl_i2c0_default>; pinctrl-1 = <&pinctrl_i2c0_gpio>; sda-gpios = <&pioA PIN_PD21 GPIO_ACTIVE_HIGH>; - scl-gpios = <&pioA PIN_PD22 GPIO_ACTIVE_HIGH>; + scl-gpios = <&pioA PIN_PD22 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; status = "okay"; }; @@ -196,7 +196,7 @@ pinctrl-0 = <&pinctrl_flx0_default>; pinctrl-1 = <&pinctrl_flx0_gpio>; sda-gpios = <&pioA PIN_PB28 GPIO_ACTIVE_HIGH>; - scl-gpios = <&pioA PIN_PB29 GPIO_ACTIVE_HIGH>; + scl-gpios = <&pioA PIN_PB29 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; status = "okay"; }; }; @@ -226,7 +226,7 @@ pinctrl-0 = <&pinctrl_i2c1_default>; pinctrl-1 = <&pinctrl_i2c1_gpio>; sda-gpios = <&pioA PIN_PC6 GPIO_ACTIVE_HIGH>; - scl-gpios = <&pioA PIN_PC7 GPIO_ACTIVE_HIGH>; + scl-gpios = <&pioA PIN_PC7 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; status = "okay"; at24@50 { diff --git a/arch/arm/boot/dts/at91-sama5d2_xplained.dts b/arch/arm/boot/dts/at91-sama5d2_xplained.dts index 77e5d4f5a102..851b8587068b 100644 --- a/arch/arm/boot/dts/at91-sama5d2_xplained.dts +++ b/arch/arm/boot/dts/at91-sama5d2_xplained.dts @@ -190,7 +190,7 @@ pinctrl-0 = <&pinctrl_i2c0_default>; pinctrl-1 = <&pinctrl_i2c0_gpio>; sda-gpios = <&pioA PIN_PD21 GPIO_ACTIVE_HIGH>; - scl-gpios = <&pioA PIN_PD22 GPIO_ACTIVE_HIGH>; + scl-gpios = <&pioA PIN_PD22 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; i2c-sda-hold-time-ns = <350>; status = "okay"; @@ -344,7 +344,7 @@ pinctrl-0 = <&pinctrl_flx0_default>; pinctrl-1 = <&pinctrl_i2c2_gpio>; sda-gpios = <&pioA PIN_PB28 GPIO_ACTIVE_HIGH>; - scl-gpios = <&pioA PIN_PB29 GPIO_ACTIVE_HIGH>; + scl-gpios = <&pioA PIN_PB29 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; i2c-sda-hold-time-ns = <350>; i2c-analog-filter; i2c-digital-filter; @@ -397,7 +397,7 @@ pinctrl-0 = <&pinctrl_flx4_default>; pinctrl-1 = <&pinctrl_flx4_gpio>; sda-gpios = <&pioA PIN_PD12 GPIO_ACTIVE_HIGH>; - scl-gpios = <&pioA PIN_PD13 GPIO_ACTIVE_HIGH>; + scl-gpios = <&pioA PIN_PD13 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; i2c-analog-filter; i2c-digital-filter; i2c-digital-filter-width-ns = <35>; @@ -414,7 +414,7 @@ i2c-digital-filter-width-ns = <35>; pinctrl-1 = <&pinctrl_i2c1_gpio>; sda-gpios = <&pioA PIN_PD4 GPIO_ACTIVE_HIGH>; - scl-gpios = <&pioA PIN_PD5 GPIO_ACTIVE_HIGH>; + scl-gpios = <&pioA PIN_PD5 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; status = "okay"; at24@54 { diff --git a/arch/arm/boot/dts/sama5d3.dtsi b/arch/arm/boot/dts/sama5d3.dtsi index f3ce561b46ab..c53e48445e4d 100644 --- a/arch/arm/boot/dts/sama5d3.dtsi +++ b/arch/arm/boot/dts/sama5d3.dtsi @@ -163,7 +163,7 @@ pinctrl-0 = <&pinctrl_i2c0>; pinctrl-1 = <&pinctrl_i2c0_gpio>; sda-gpios = <&pioA 30 GPIO_ACTIVE_HIGH>; - scl-gpios = <&pioA 31 GPIO_ACTIVE_HIGH>; + scl-gpios = <&pioA 31 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; #address-cells = <1>; #size-cells = <0>; clocks = <&pmc PMC_TYPE_PERIPHERAL 18>; @@ -181,7 +181,7 @@ pinctrl-0 = <&pinctrl_i2c1>; pinctrl-1 = <&pinctrl_i2c1_gpio>; sda-gpios = <&pioC 26 GPIO_ACTIVE_HIGH>; - scl-gpios = <&pioC 27 GPIO_ACTIVE_HIGH>; + scl-gpios = <&pioC 27 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; #address-cells = <1>; #size-cells = <0>; clocks = <&pmc PMC_TYPE_PERIPHERAL 19>; @@ -367,7 +367,7 @@ pinctrl-0 = <&pinctrl_i2c2>; pinctrl-1 = <&pinctrl_i2c2_gpio>; sda-gpios = <&pioA 18 GPIO_ACTIVE_HIGH>; - scl-gpios = <&pioA 19 GPIO_ACTIVE_HIGH>; + scl-gpios = <&pioA 19 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; #address-cells = <1>; #size-cells = <0>; clocks = <&pmc PMC_TYPE_PERIPHERAL 20>; diff --git a/arch/arm/boot/dts/sama5d4.dtsi b/arch/arm/boot/dts/sama5d4.dtsi index c9c0316b5b0e..fff679734c9c 100644 --- a/arch/arm/boot/dts/sama5d4.dtsi +++ b/arch/arm/boot/dts/sama5d4.dtsi @@ -462,7 +462,7 @@ pinctrl-0 = <&pinctrl_i2c0>; pinctrl-1 = <&pinctrl_i2c0_gpio>; sda-gpios = <&pioA 30 GPIO_ACTIVE_HIGH>; - scl-gpios = <&pioA 31 GPIO_ACTIVE_HIGH>; + scl-gpios = <&pioA 31 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; #address-cells = <1>; #size-cells = <0>; clocks = <&pmc PMC_TYPE_PERIPHERAL 32>; @@ -484,7 +484,7 @@ pinctrl-0 = <&pinctrl_i2c1>; pinctrl-1 = <&pinctrl_i2c1_gpio>; sda-gpios = <&pioE 29 GPIO_ACTIVE_HIGH>; - scl-gpios = <&pioE 30 GPIO_ACTIVE_HIGH>; + scl-gpios = <&pioE 30 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; #address-cells = <1>; #size-cells = <0>; clocks = <&pmc PMC_TYPE_PERIPHERAL 33>; @@ -529,7 +529,7 @@ pinctrl-0 = <&pinctrl_i2c2>; pinctrl-1 = <&pinctrl_i2c2_gpio>; sda-gpios = <&pioB 29 GPIO_ACTIVE_HIGH>; - scl-gpios = <&pioB 30 GPIO_ACTIVE_HIGH>; + scl-gpios = <&pioB 30 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; #address-cells = <1>; #size-cells = <0>; clocks = <&pmc PMC_TYPE_PERIPHERAL 34>; From 88d801aec6e971c15a0bfb4d46d02476dde9e8aa Mon Sep 17 00:00:00 2001 From: Tudor Ambarus Date: Mon, 18 May 2020 11:49:21 +0000 Subject: [PATCH 35/35] ARM: dts: at91: sama5d2_xplained: Add aliases for the dedicated I2C IPs The sama5d2 SoC has two dedicated I2C IPs that are enabled on sama5d2_xplained. Add alias for the i2c devices to not rely on probe order for the i2c device numbering. Signed-off-by: Tudor Ambarus Link: https://lore.kernel.org/r/20200518114802.253660-1-tudor.ambarus@microchip.com Signed-off-by: Alexandre Belloni --- arch/arm/boot/dts/at91-sama5d2_xplained.dts | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm/boot/dts/at91-sama5d2_xplained.dts b/arch/arm/boot/dts/at91-sama5d2_xplained.dts index 851b8587068b..a927165ea7c2 100644 --- a/arch/arm/boot/dts/at91-sama5d2_xplained.dts +++ b/arch/arm/boot/dts/at91-sama5d2_xplained.dts @@ -18,6 +18,8 @@ aliases { serial0 = &uart1; /* DBGU */ + i2c0 = &i2c0; + i2c1 = &i2c1; i2c2 = &i2c2; /* XPRO EXT2 */ };