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ARM: shmobile: r8a7778: add SSI/SRU clock support
Add a platform clock for the r8a7778 SRU/SSI sound. Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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@ -69,6 +69,15 @@ static struct clk extal_clk = {
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.mapping = &cpg_mapping,
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};
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static struct clk audio_clk_a = {
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};
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static struct clk audio_clk_b = {
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};
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static struct clk audio_clk_c = {
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};
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/*
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* clock ratio of these clock will be updated
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* on r8a7778_clock_init()
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@ -100,18 +109,23 @@ static struct clk *main_clks[] = {
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&p_clk,
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&g_clk,
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&z_clk,
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&audio_clk_a,
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&audio_clk_b,
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&audio_clk_c,
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};
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enum {
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MSTP331,
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MSTP323, MSTP322, MSTP321,
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MSTP311, MSTP310,
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MSTP309, MSTP308, MSTP307,
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MSTP114,
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MSTP110, MSTP109,
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MSTP100,
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MSTP030,
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MSTP029, MSTP028, MSTP027, MSTP026, MSTP025, MSTP024, MSTP023, MSTP022, MSTP021,
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MSTP016, MSTP015,
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MSTP007,
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MSTP016, MSTP015, MSTP012, MSTP011, MSTP010,
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MSTP009, MSTP008, MSTP007,
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MSTP_NR };
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static struct clk mstp_clks[MSTP_NR] = {
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@ -119,6 +133,11 @@ static struct clk mstp_clks[MSTP_NR] = {
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[MSTP323] = SH_CLK_MSTP32(&p_clk, MSTPCR3, 23, 0), /* SDHI0 */
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[MSTP322] = SH_CLK_MSTP32(&p_clk, MSTPCR3, 22, 0), /* SDHI1 */
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[MSTP321] = SH_CLK_MSTP32(&p_clk, MSTPCR3, 21, 0), /* SDHI2 */
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[MSTP311] = SH_CLK_MSTP32(&p_clk, MSTPCR3, 11, 0), /* SSI4 */
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[MSTP310] = SH_CLK_MSTP32(&p_clk, MSTPCR3, 10, 0), /* SSI5 */
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[MSTP309] = SH_CLK_MSTP32(&p_clk, MSTPCR3, 9, 0), /* SSI6 */
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[MSTP308] = SH_CLK_MSTP32(&p_clk, MSTPCR3, 8, 0), /* SSI7 */
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[MSTP307] = SH_CLK_MSTP32(&p_clk, MSTPCR3, 7, 0), /* SSI8 */
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[MSTP114] = SH_CLK_MSTP32(&p_clk, MSTPCR1, 14, 0), /* Ether */
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[MSTP110] = SH_CLK_MSTP32(&s_clk, MSTPCR1, 10, 0), /* VIN0 */
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[MSTP109] = SH_CLK_MSTP32(&s_clk, MSTPCR1, 9, 0), /* VIN1 */
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@ -135,11 +154,20 @@ static struct clk mstp_clks[MSTP_NR] = {
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[MSTP021] = SH_CLK_MSTP32(&p_clk, MSTPCR0, 21, 0), /* SCIF5 */
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[MSTP016] = SH_CLK_MSTP32(&p_clk, MSTPCR0, 16, 0), /* TMU0 */
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[MSTP015] = SH_CLK_MSTP32(&p_clk, MSTPCR0, 15, 0), /* TMU1 */
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[MSTP012] = SH_CLK_MSTP32(&p_clk, MSTPCR0, 12, 0), /* SSI0 */
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[MSTP011] = SH_CLK_MSTP32(&p_clk, MSTPCR0, 11, 0), /* SSI1 */
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[MSTP010] = SH_CLK_MSTP32(&p_clk, MSTPCR0, 10, 0), /* SSI2 */
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[MSTP009] = SH_CLK_MSTP32(&p_clk, MSTPCR0, 9, 0), /* SSI3 */
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[MSTP008] = SH_CLK_MSTP32(&p_clk, MSTPCR0, 8, 0), /* SRU */
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[MSTP007] = SH_CLK_MSTP32(&p_clk, MSTPCR0, 7, 0), /* HSPI */
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};
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static struct clk_lookup lookups[] = {
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/* main */
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CLKDEV_CON_ID("audio_clk_a", &audio_clk_a),
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CLKDEV_CON_ID("audio_clk_b", &audio_clk_b),
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CLKDEV_CON_ID("audio_clk_c", &audio_clk_c),
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CLKDEV_CON_ID("audio_clk_internal", &s1_clk),
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CLKDEV_CON_ID("shyway_clk", &s_clk),
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CLKDEV_CON_ID("peripheral_clk", &p_clk),
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@ -168,6 +196,17 @@ static struct clk_lookup lookups[] = {
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CLKDEV_DEV_ID("sh-hspi.0", &mstp_clks[MSTP007]), /* HSPI0 */
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CLKDEV_DEV_ID("sh-hspi.1", &mstp_clks[MSTP007]), /* HSPI1 */
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CLKDEV_DEV_ID("sh-hspi.2", &mstp_clks[MSTP007]), /* HSPI2 */
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CLKDEV_DEV_ID("rcar_sound", &mstp_clks[MSTP008]), /* SRU */
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CLKDEV_ICK_ID("ssi.0", "rcar_sound", &mstp_clks[MSTP012]),
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CLKDEV_ICK_ID("ssi.1", "rcar_sound", &mstp_clks[MSTP011]),
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CLKDEV_ICK_ID("ssi.2", "rcar_sound", &mstp_clks[MSTP010]),
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CLKDEV_ICK_ID("ssi.3", "rcar_sound", &mstp_clks[MSTP009]),
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CLKDEV_ICK_ID("ssi.4", "rcar_sound", &mstp_clks[MSTP311]),
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CLKDEV_ICK_ID("ssi.5", "rcar_sound", &mstp_clks[MSTP310]),
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CLKDEV_ICK_ID("ssi.6", "rcar_sound", &mstp_clks[MSTP309]),
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CLKDEV_ICK_ID("ssi.7", "rcar_sound", &mstp_clks[MSTP308]),
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CLKDEV_ICK_ID("ssi.8", "rcar_sound", &mstp_clks[MSTP307]),
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};
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void __init r8a7778_clock_init(void)
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