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drm/i915/gtt: Clear the cachelines upon resume
Required for my pineview system to not barf after resuming. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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@ -35,6 +35,8 @@ void i915_gem_restore_gtt_mappings(struct drm_device *dev)
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struct drm_i915_gem_object *obj;
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list_for_each_entry(obj, &dev_priv->mm.gtt_list, gtt_list) {
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i915_gem_clflush_object(obj);
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if (dev_priv->mm.gtt->needs_dmar) {
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BUG_ON(!obj->sg_list);
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@ -51,7 +53,6 @@ void i915_gem_restore_gtt_mappings(struct drm_device *dev)
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obj->agp_type);
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}
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/* Be paranoid and flush the chipset cache. */
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intel_gtt_chipset_flush();
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}
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