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hisi_sas: set max commands as configurable

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Since v2 hardware permits different numbers of commands to v1, set this
as configurable in hisi_sas_hw.

Signed-off-by: John Garry <john.garry@huawei.com>
Reviewed-by: Hannes Reinecke <hare@suse.de>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
This commit is contained in:
John Garry 2016-01-26 02:47:03 +08:00 committed by Martin K. Petersen
parent 98bf39fca9
commit a8d547bd93
3 changed files with 16 additions and 13 deletions
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2
drivers/scsi/hisi_sas/hisi_sas.h
View File

@ -27,7 +27,6 @@
#define HISI_SAS_QUEUE_SLOTS 512 #define HISI_SAS_QUEUE_SLOTS 512
#define HISI_SAS_MAX_ITCT_ENTRIES 4096 #define HISI_SAS_MAX_ITCT_ENTRIES 4096
#define HISI_SAS_MAX_DEVICES HISI_SAS_MAX_ITCT_ENTRIES #define HISI_SAS_MAX_DEVICES HISI_SAS_MAX_ITCT_ENTRIES
#define HISI_SAS_COMMAND_ENTRIES 8192
#define HISI_SAS_STATUS_BUF_SZ \ #define HISI_SAS_STATUS_BUF_SZ \
(sizeof(struct hisi_sas_err_record) + 1024) (sizeof(struct hisi_sas_err_record) + 1024)
@ -144,6 +143,7 @@ struct hisi_sas_hw {
void (*free_device)(struct hisi_hba *hisi_hba, void (*free_device)(struct hisi_hba *hisi_hba,
struct hisi_sas_device *dev); struct hisi_sas_device *dev);
int (*get_wideport_bitmap)(struct hisi_hba *hisi_hba, int port_id); int (*get_wideport_bitmap)(struct hisi_hba *hisi_hba, int port_id);
int max_command_entries;
int complete_hdr_size; int complete_hdr_size;
}; };

24
drivers/scsi/hisi_sas/hisi_sas_main.c
View File

@ -973,9 +973,9 @@ static struct sas_domain_function_template hisi_sas_transport_ops = {
static int hisi_sas_alloc(struct hisi_hba *hisi_hba, struct Scsi_Host *shost) static int hisi_sas_alloc(struct hisi_hba *hisi_hba, struct Scsi_Host *shost)
{ {
int i, s;
struct platform_device *pdev = hisi_hba->pdev; struct platform_device *pdev = hisi_hba->pdev;
struct device *dev = &pdev->dev; struct device *dev = &pdev->dev;
int i, s, max_command_entries = hisi_hba->hw->max_command_entries;
spin_lock_init(&hisi_hba->lock); spin_lock_init(&hisi_hba->lock);
for (i = 0; i < hisi_hba->n_phy; i++) { for (i = 0; i < hisi_hba->n_phy; i++) {
@ -1035,13 +1035,13 @@ static int hisi_sas_alloc(struct hisi_hba *hisi_hba, struct Scsi_Host *shost)
memset(hisi_hba->itct, 0, s); memset(hisi_hba->itct, 0, s);
hisi_hba->slot_info = devm_kcalloc(dev, HISI_SAS_COMMAND_ENTRIES, hisi_hba->slot_info = devm_kcalloc(dev, max_command_entries,
sizeof(struct hisi_sas_slot), sizeof(struct hisi_sas_slot),
GFP_KERNEL); GFP_KERNEL);
if (!hisi_hba->slot_info) if (!hisi_hba->slot_info)
goto err_out; goto err_out;
s = HISI_SAS_COMMAND_ENTRIES * sizeof(struct hisi_sas_iost); s = max_command_entries * sizeof(struct hisi_sas_iost);
hisi_hba->iost = dma_alloc_coherent(dev, s, &hisi_hba->iost_dma, hisi_hba->iost = dma_alloc_coherent(dev, s, &hisi_hba->iost_dma,
GFP_KERNEL); GFP_KERNEL);
if (!hisi_hba->iost) if (!hisi_hba->iost)
@ -1049,7 +1049,7 @@ static int hisi_sas_alloc(struct hisi_hba *hisi_hba, struct Scsi_Host *shost)
memset(hisi_hba->iost, 0, s); memset(hisi_hba->iost, 0, s);
s = HISI_SAS_COMMAND_ENTRIES * sizeof(struct hisi_sas_breakpoint); s = max_command_entries * sizeof(struct hisi_sas_breakpoint);
hisi_hba->breakpoint = dma_alloc_coherent(dev, s, hisi_hba->breakpoint = dma_alloc_coherent(dev, s,
&hisi_hba->breakpoint_dma, GFP_KERNEL); &hisi_hba->breakpoint_dma, GFP_KERNEL);
if (!hisi_hba->breakpoint) if (!hisi_hba->breakpoint)
@ -1057,7 +1057,7 @@ static int hisi_sas_alloc(struct hisi_hba *hisi_hba, struct Scsi_Host *shost)
memset(hisi_hba->breakpoint, 0, s); memset(hisi_hba->breakpoint, 0, s);
hisi_hba->slot_index_count = HISI_SAS_COMMAND_ENTRIES; hisi_hba->slot_index_count = max_command_entries;
s = hisi_hba->slot_index_count / sizeof(unsigned long); s = hisi_hba->slot_index_count / sizeof(unsigned long);
hisi_hba->slot_index_tags = devm_kzalloc(dev, s, GFP_KERNEL); hisi_hba->slot_index_tags = devm_kzalloc(dev, s, GFP_KERNEL);
if (!hisi_hba->slot_index_tags) if (!hisi_hba->slot_index_tags)
@ -1075,7 +1075,7 @@ static int hisi_sas_alloc(struct hisi_hba *hisi_hba, struct Scsi_Host *shost)
goto err_out; goto err_out;
memset(hisi_hba->initial_fis, 0, s); memset(hisi_hba->initial_fis, 0, s);
s = HISI_SAS_COMMAND_ENTRIES * sizeof(struct hisi_sas_breakpoint) * 2; s = max_command_entries * sizeof(struct hisi_sas_breakpoint) * 2;
hisi_hba->sata_breakpoint = dma_alloc_coherent(dev, s, hisi_hba->sata_breakpoint = dma_alloc_coherent(dev, s,
&hisi_hba->sata_breakpoint_dma, GFP_KERNEL); &hisi_hba->sata_breakpoint_dma, GFP_KERNEL);
if (!hisi_hba->sata_breakpoint) if (!hisi_hba->sata_breakpoint)
@ -1098,7 +1098,7 @@ err_out:
static void hisi_sas_free(struct hisi_hba *hisi_hba) static void hisi_sas_free(struct hisi_hba *hisi_hba)
{ {
struct device *dev = &hisi_hba->pdev->dev; struct device *dev = &hisi_hba->pdev->dev;
int i, s; int i, s, max_command_entries = hisi_hba->hw->max_command_entries;
for (i = 0; i < hisi_hba->queue_count; i++) { for (i = 0; i < hisi_hba->queue_count; i++) {
s = sizeof(struct hisi_sas_cmd_hdr) * HISI_SAS_QUEUE_SLOTS; s = sizeof(struct hisi_sas_cmd_hdr) * HISI_SAS_QUEUE_SLOTS;
@ -1123,12 +1123,12 @@ static void hisi_sas_free(struct hisi_hba *hisi_hba)
dma_free_coherent(dev, s, dma_free_coherent(dev, s,
hisi_hba->itct, hisi_hba->itct_dma); hisi_hba->itct, hisi_hba->itct_dma);
s = HISI_SAS_COMMAND_ENTRIES * sizeof(struct hisi_sas_iost); s = max_command_entries * sizeof(struct hisi_sas_iost);
if (hisi_hba->iost) if (hisi_hba->iost)
dma_free_coherent(dev, s, dma_free_coherent(dev, s,
hisi_hba->iost, hisi_hba->iost_dma); hisi_hba->iost, hisi_hba->iost_dma);
s = HISI_SAS_COMMAND_ENTRIES * sizeof(struct hisi_sas_breakpoint); s = max_command_entries * sizeof(struct hisi_sas_breakpoint);
if (hisi_hba->breakpoint) if (hisi_hba->breakpoint)
dma_free_coherent(dev, s, dma_free_coherent(dev, s,
hisi_hba->breakpoint, hisi_hba->breakpoint,
@ -1141,7 +1141,7 @@ static void hisi_sas_free(struct hisi_hba *hisi_hba)
hisi_hba->initial_fis, hisi_hba->initial_fis,
hisi_hba->initial_fis_dma); hisi_hba->initial_fis_dma);
s = HISI_SAS_COMMAND_ENTRIES * sizeof(struct hisi_sas_breakpoint) * 2; s = max_command_entries * sizeof(struct hisi_sas_breakpoint) * 2;
if (hisi_hba->sata_breakpoint) if (hisi_hba->sata_breakpoint)
dma_free_coherent(dev, s, dma_free_coherent(dev, s,
hisi_hba->sata_breakpoint, hisi_hba->sata_breakpoint,
@ -1273,8 +1273,8 @@ int hisi_sas_probe(struct platform_device *pdev,
shost->max_channel = 1; shost->max_channel = 1;
shost->max_cmd_len = 16; shost->max_cmd_len = 16;
shost->sg_tablesize = min_t(u16, SG_ALL, HISI_SAS_SGE_PAGE_CNT); shost->sg_tablesize = min_t(u16, SG_ALL, HISI_SAS_SGE_PAGE_CNT);
shost->can_queue = HISI_SAS_COMMAND_ENTRIES; shost->can_queue = hisi_hba->hw->max_command_entries;
shost->cmd_per_lun = HISI_SAS_COMMAND_ENTRIES; shost->cmd_per_lun = hisi_hba->hw->max_command_entries;
sha->sas_ha_name = DRV_NAME; sha->sas_ha_name = DRV_NAME;
sha->dev = &hisi_hba->pdev->dev; sha->dev = &hisi_hba->pdev->dev;

3
drivers/scsi/hisi_sas/hisi_sas_v1_hw.c
View File

@ -392,6 +392,8 @@ enum {
TRANS_RX_SMP_RESP_TIMEOUT_ERR, /* 0x31a */ TRANS_RX_SMP_RESP_TIMEOUT_ERR, /* 0x31a */
}; };
#define HISI_SAS_COMMAND_ENTRIES_V1_HW 8192
#define HISI_SAS_PHY_MAX_INT_NR (HISI_SAS_PHY_INT_NR * HISI_SAS_MAX_PHYS) #define HISI_SAS_PHY_MAX_INT_NR (HISI_SAS_PHY_INT_NR * HISI_SAS_MAX_PHYS)
#define HISI_SAS_CQ_MAX_INT_NR (HISI_SAS_MAX_QUEUES) #define HISI_SAS_CQ_MAX_INT_NR (HISI_SAS_MAX_QUEUES)
#define HISI_SAS_FATAL_INT_NR (2) #define HISI_SAS_FATAL_INT_NR (2)
@ -1796,6 +1798,7 @@ static const struct hisi_sas_hw hisi_sas_v1_hw = {
.phy_disable = disable_phy_v1_hw, .phy_disable = disable_phy_v1_hw,
.phy_hard_reset = phy_hard_reset_v1_hw, .phy_hard_reset = phy_hard_reset_v1_hw,
.get_wideport_bitmap = get_wideport_bitmap_v1_hw, .get_wideport_bitmap = get_wideport_bitmap_v1_hw,
.max_command_entries = HISI_SAS_COMMAND_ENTRIES_V1_HW,
.complete_hdr_size = sizeof(struct hisi_sas_complete_v1_hdr), .complete_hdr_size = sizeof(struct hisi_sas_complete_v1_hdr),
}; };