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locking/atomic: hexagon: remove redundant arch_atomic_cmpxchg
Hexagon's implementation of arch_atomic_cmpxchg() is identical to its implementation of arch_cmpxchg(). Have it define arch_atomic_cmpxchg() in terms of arch_cmpxchg(), matching what it does for arch_atomic_xchg() and arch_xchg(). At the same time, remove the kerneldoc comments for hexagon's arch_atomic_xchg() and arch_atomic_cmpxchg(). The arch_atomic_*() namespace is shared by all architectures and the API should be documented centrally, and the comments aren't all that helpful as-is. There should be no functional change as a result of this patch. Signed-off-by: Mark Rutland <mark.rutland@arm.com> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Reviewed-by: Kees Cook <keescook@chromium.org> Link: https://lore.kernel.org/r/20230605070124.3741859-4-mark.rutland@arm.com
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@ -36,49 +36,11 @@ static inline void arch_atomic_set(atomic_t *v, int new)
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*/
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#define arch_atomic_read(v) READ_ONCE((v)->counter)
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/**
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* arch_atomic_xchg - atomic
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* @v: pointer to memory to change
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* @new: new value (technically passed in a register -- see xchg)
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*/
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#define arch_atomic_xchg(v, new) (arch_xchg(&((v)->counter), (new)))
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#define arch_atomic_xchg(v, new) \
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(arch_xchg(&((v)->counter), (new)))
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/**
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* arch_atomic_cmpxchg - atomic compare-and-exchange values
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* @v: pointer to value to change
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* @old: desired old value to match
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* @new: new value to put in
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*
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* Parameters are then pointer, value-in-register, value-in-register,
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* and the output is the old value.
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*
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* Apparently this is complicated for archs that don't support
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* the memw_locked like we do (or it's broken or whatever).
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*
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* Kind of the lynchpin of the rest of the generically defined routines.
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* Remember V2 had that bug with dotnew predicate set by memw_locked.
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*
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* "old" is "expected" old val, __oldval is actual old value
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*/
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static inline int arch_atomic_cmpxchg(atomic_t *v, int old, int new)
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{
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int __oldval;
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asm volatile(
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"1: %0 = memw_locked(%1);\n"
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" { P0 = cmp.eq(%0,%2);\n"
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" if (!P0.new) jump:nt 2f; }\n"
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" memw_locked(%1,P0) = %3;\n"
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" if (!P0) jump 1b;\n"
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"2:\n"
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: "=&r" (__oldval)
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: "r" (&v->counter), "r" (old), "r" (new)
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: "memory", "p0"
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);
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return __oldval;
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}
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#define arch_atomic_cmpxchg(v, old, new) \
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(arch_cmpxchg(&((v)->counter), (old), (new)))
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#define ATOMIC_OP(op) \
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static inline void arch_atomic_##op(int i, atomic_t *v) \
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