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mt76x0: mac files
Add mac files of mt76x0 driver. Signed-off-by: Stanislaw Gruszka <sgruszka@redhat.com> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
This commit is contained in:
parent
7b4859026c
commit
a774434981
660
drivers/net/wireless/mediatek/mt76/mt76x0/mac.c
Normal file
660
drivers/net/wireless/mediatek/mt76/mt76x0/mac.c
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@ -0,0 +1,660 @@
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/*
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* Copyright (C) 2014 Felix Fietkau <nbd@openwrt.org>
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* Copyright (C) 2015 Jakub Kicinski <kubakici@wp.pl>
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* Copyright (C) 2018 Stanislaw Gruszka <stf_xl@wp.pl>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2
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* as published by the Free Software Foundation
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include "mt76x0.h"
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#include "trace.h"
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#include <linux/etherdevice.h>
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static void
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mt76_mac_process_tx_rate(struct ieee80211_tx_rate *txrate, u16 rate,
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enum nl80211_band band)
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{
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u8 idx = FIELD_GET(MT_RXWI_RATE_INDEX, rate);
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txrate->idx = 0;
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txrate->flags = 0;
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txrate->count = 1;
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switch (FIELD_GET(MT_RXWI_RATE_PHY, rate)) {
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case MT_PHY_TYPE_OFDM:
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if (band == NL80211_BAND_2GHZ)
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idx += 4;
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txrate->idx = idx;
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return;
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case MT_PHY_TYPE_CCK:
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if (idx >= 8)
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idx -= 8;
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txrate->idx = idx;
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return;
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case MT_PHY_TYPE_HT_GF:
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txrate->flags |= IEEE80211_TX_RC_GREEN_FIELD;
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/* fall through */
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case MT_PHY_TYPE_HT:
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txrate->flags |= IEEE80211_TX_RC_MCS;
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txrate->idx = idx;
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break;
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case MT_PHY_TYPE_VHT:
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txrate->flags |= IEEE80211_TX_RC_VHT_MCS;
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txrate->idx = idx;
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break;
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default:
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WARN_ON(1);
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return;
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}
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switch (FIELD_GET(MT_RXWI_RATE_BW, rate)) {
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case MT_PHY_BW_20:
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break;
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case MT_PHY_BW_40:
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txrate->flags |= IEEE80211_TX_RC_40_MHZ_WIDTH;
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break;
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case MT_PHY_BW_80:
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txrate->flags |= IEEE80211_TX_RC_80_MHZ_WIDTH;
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break;
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default:
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WARN_ON(1);
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return;
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}
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if (rate & MT_RXWI_RATE_SGI)
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txrate->flags |= IEEE80211_TX_RC_SHORT_GI;
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}
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static void
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mt76_mac_fill_tx_status(struct mt76x0_dev *dev, struct ieee80211_tx_info *info,
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struct mt76_tx_status *st, int n_frames)
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{
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struct ieee80211_tx_rate *rate = info->status.rates;
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int cur_idx, last_rate;
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int i;
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if (!n_frames)
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return;
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last_rate = min_t(int, st->retry, IEEE80211_TX_MAX_RATES - 1);
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mt76_mac_process_tx_rate(&rate[last_rate], st->rate,
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dev->mt76.chandef.chan->band);
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if (last_rate < IEEE80211_TX_MAX_RATES - 1)
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rate[last_rate + 1].idx = -1;
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cur_idx = rate[last_rate].idx + last_rate;
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for (i = 0; i <= last_rate; i++) {
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rate[i].flags = rate[last_rate].flags;
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rate[i].idx = max_t(int, 0, cur_idx - i);
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rate[i].count = 1;
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}
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rate[last_rate - 1].count = st->retry + 1 - last_rate;
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info->status.ampdu_len = n_frames;
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info->status.ampdu_ack_len = st->success ? n_frames : 0;
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if (st->pktid & MT_TXWI_PKTID_PROBE)
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info->flags |= IEEE80211_TX_CTL_RATE_CTRL_PROBE;
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if (st->aggr)
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info->flags |= IEEE80211_TX_CTL_AMPDU |
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IEEE80211_TX_STAT_AMPDU;
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if (!st->ack_req)
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info->flags |= IEEE80211_TX_CTL_NO_ACK;
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else if (st->success)
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info->flags |= IEEE80211_TX_STAT_ACK;
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}
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u16 mt76_mac_tx_rate_val(struct mt76x0_dev *dev,
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const struct ieee80211_tx_rate *rate, u8 *nss_val)
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{
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u16 rateval;
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u8 phy, rate_idx;
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u8 nss = 1;
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u8 bw = 0;
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if (rate->flags & IEEE80211_TX_RC_VHT_MCS) {
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rate_idx = rate->idx;
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nss = 1 + (rate->idx >> 4);
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phy = MT_PHY_TYPE_VHT;
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if (rate->flags & IEEE80211_TX_RC_80_MHZ_WIDTH)
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bw = 2;
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else if (rate->flags & IEEE80211_TX_RC_40_MHZ_WIDTH)
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bw = 1;
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} else if (rate->flags & IEEE80211_TX_RC_MCS) {
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rate_idx = rate->idx;
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nss = 1 + (rate->idx >> 3);
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phy = MT_PHY_TYPE_HT;
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if (rate->flags & IEEE80211_TX_RC_GREEN_FIELD)
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phy = MT_PHY_TYPE_HT_GF;
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if (rate->flags & IEEE80211_TX_RC_40_MHZ_WIDTH)
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bw = 1;
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} else {
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const struct ieee80211_rate *r;
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int band = dev->mt76.chandef.chan->band;
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u16 val;
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r = &dev->mt76.hw->wiphy->bands[band]->bitrates[rate->idx];
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if (rate->flags & IEEE80211_TX_RC_USE_SHORT_PREAMBLE)
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val = r->hw_value_short;
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else
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val = r->hw_value;
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phy = val >> 8;
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rate_idx = val & 0xff;
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bw = 0;
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}
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rateval = FIELD_PREP(MT_RXWI_RATE_INDEX, rate_idx);
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rateval |= FIELD_PREP(MT_RXWI_RATE_PHY, phy);
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rateval |= FIELD_PREP(MT_RXWI_RATE_BW, bw);
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if (rate->flags & IEEE80211_TX_RC_SHORT_GI)
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rateval |= MT_RXWI_RATE_SGI;
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*nss_val = nss;
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return cpu_to_le16(rateval);
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}
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void mt76_mac_wcid_set_rate(struct mt76x0_dev *dev, struct mt76_wcid *wcid,
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const struct ieee80211_tx_rate *rate)
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{
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unsigned long flags;
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spin_lock_irqsave(&dev->mt76.lock, flags);
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wcid->tx_rate = mt76_mac_tx_rate_val(dev, rate, &wcid->tx_rate_nss);
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wcid->tx_rate_set = true;
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spin_unlock_irqrestore(&dev->mt76.lock, flags);
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}
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struct mt76_tx_status mt76x0_mac_fetch_tx_status(struct mt76x0_dev *dev)
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{
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struct mt76_tx_status stat = {};
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u32 stat2, stat1;
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stat2 = mt76_rr(dev, MT_TX_STAT_FIFO_EXT);
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stat1 = mt76_rr(dev, MT_TX_STAT_FIFO);
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stat.valid = !!(stat1 & MT_TX_STAT_FIFO_VALID);
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stat.success = !!(stat1 & MT_TX_STAT_FIFO_SUCCESS);
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stat.aggr = !!(stat1 & MT_TX_STAT_FIFO_AGGR);
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stat.ack_req = !!(stat1 & MT_TX_STAT_FIFO_ACKREQ);
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stat.wcid = FIELD_GET(MT_TX_STAT_FIFO_WCID, stat1);
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stat.rate = FIELD_GET(MT_TX_STAT_FIFO_RATE, stat1);
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stat.retry = FIELD_GET(MT_TX_STAT_FIFO_EXT_RETRY, stat2);
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stat.pktid = FIELD_GET(MT_TX_STAT_FIFO_EXT_PKTID, stat2);
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return stat;
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}
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void mt76_send_tx_status(struct mt76x0_dev *dev, struct mt76_tx_status *stat, u8 *update)
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{
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struct ieee80211_tx_info info = {};
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struct ieee80211_sta *sta = NULL;
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struct mt76_wcid *wcid = NULL;
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struct mt76_sta *msta = NULL;
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rcu_read_lock();
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if (stat->wcid < ARRAY_SIZE(dev->wcid))
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wcid = rcu_dereference(dev->wcid[stat->wcid]);
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if (wcid) {
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void *priv;
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priv = msta = container_of(wcid, struct mt76_sta, wcid);
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sta = container_of(priv, struct ieee80211_sta, drv_priv);
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}
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if (msta && stat->aggr) {
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u32 stat_val, stat_cache;
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stat_val = stat->rate;
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stat_val |= ((u32) stat->retry) << 16;
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stat_cache = msta->status.rate;
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stat_cache |= ((u32) msta->status.retry) << 16;
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if (*update == 0 && stat_val == stat_cache &&
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stat->wcid == msta->status.wcid && msta->n_frames < 32) {
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msta->n_frames++;
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goto out;
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}
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mt76_mac_fill_tx_status(dev, &info, &msta->status,
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msta->n_frames);
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msta->status = *stat;
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msta->n_frames = 1;
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*update = 0;
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} else {
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mt76_mac_fill_tx_status(dev, &info, stat, 1);
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*update = 1;
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}
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spin_lock_bh(&dev->mac_lock);
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ieee80211_tx_status_noskb(dev->mt76.hw, sta, &info);
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spin_unlock_bh(&dev->mac_lock);
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out:
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rcu_read_unlock();
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}
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void mt76x0_mac_set_protection(struct mt76x0_dev *dev, bool legacy_prot,
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int ht_mode)
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{
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int mode = ht_mode & IEEE80211_HT_OP_MODE_PROTECTION;
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bool non_gf = !!(ht_mode & IEEE80211_HT_OP_MODE_NON_GF_STA_PRSNT);
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u32 prot[6];
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bool ht_rts[4] = {};
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int i;
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prot[0] = MT_PROT_NAV_SHORT |
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MT_PROT_TXOP_ALLOW_ALL |
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MT_PROT_RTS_THR_EN;
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prot[1] = prot[0];
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if (legacy_prot)
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prot[1] |= MT_PROT_CTRL_CTS2SELF;
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prot[2] = prot[4] = MT_PROT_NAV_SHORT | MT_PROT_TXOP_ALLOW_BW20;
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prot[3] = prot[5] = MT_PROT_NAV_SHORT | MT_PROT_TXOP_ALLOW_ALL;
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if (legacy_prot) {
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prot[2] |= MT_PROT_RATE_CCK_11;
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prot[3] |= MT_PROT_RATE_CCK_11;
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prot[4] |= MT_PROT_RATE_CCK_11;
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prot[5] |= MT_PROT_RATE_CCK_11;
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} else {
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prot[2] |= MT_PROT_RATE_OFDM_24;
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prot[3] |= MT_PROT_RATE_DUP_OFDM_24;
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prot[4] |= MT_PROT_RATE_OFDM_24;
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prot[5] |= MT_PROT_RATE_DUP_OFDM_24;
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}
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switch (mode) {
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case IEEE80211_HT_OP_MODE_PROTECTION_NONE:
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break;
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case IEEE80211_HT_OP_MODE_PROTECTION_NONMEMBER:
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ht_rts[0] = ht_rts[1] = ht_rts[2] = ht_rts[3] = true;
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break;
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case IEEE80211_HT_OP_MODE_PROTECTION_20MHZ:
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ht_rts[1] = ht_rts[3] = true;
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break;
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case IEEE80211_HT_OP_MODE_PROTECTION_NONHT_MIXED:
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ht_rts[0] = ht_rts[1] = ht_rts[2] = ht_rts[3] = true;
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break;
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}
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if (non_gf)
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ht_rts[2] = ht_rts[3] = true;
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for (i = 0; i < 4; i++)
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if (ht_rts[i])
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prot[i + 2] |= MT_PROT_CTRL_RTS_CTS;
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for (i = 0; i < 6; i++)
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mt76_wr(dev, MT_CCK_PROT_CFG + i * 4, prot[i]);
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}
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void mt76x0_mac_set_short_preamble(struct mt76x0_dev *dev, bool short_preamb)
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{
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if (short_preamb)
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mt76_set(dev, MT_AUTO_RSP_CFG, MT_AUTO_RSP_PREAMB_SHORT);
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else
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mt76_clear(dev, MT_AUTO_RSP_CFG, MT_AUTO_RSP_PREAMB_SHORT);
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}
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void mt76x0_mac_config_tsf(struct mt76x0_dev *dev, bool enable, int interval)
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{
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u32 val = mt76_rr(dev, MT_BEACON_TIME_CFG);
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val &= ~(MT_BEACON_TIME_CFG_TIMER_EN |
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MT_BEACON_TIME_CFG_SYNC_MODE |
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MT_BEACON_TIME_CFG_TBTT_EN);
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if (!enable) {
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mt76_wr(dev, MT_BEACON_TIME_CFG, val);
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return;
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}
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val &= ~MT_BEACON_TIME_CFG_INTVAL;
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val |= FIELD_PREP(MT_BEACON_TIME_CFG_INTVAL, interval << 4) |
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MT_BEACON_TIME_CFG_TIMER_EN |
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MT_BEACON_TIME_CFG_SYNC_MODE |
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MT_BEACON_TIME_CFG_TBTT_EN;
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}
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static void mt76x0_check_mac_err(struct mt76x0_dev *dev)
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{
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u32 val = mt76_rr(dev, 0x10f4);
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if (!(val & BIT(29)) || !(val & (BIT(7) | BIT(5))))
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return;
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dev_err(dev->mt76.dev, "Error: MAC specific condition occurred\n");
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mt76_set(dev, MT_MAC_SYS_CTRL, MT_MAC_SYS_CTRL_RESET_CSR);
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udelay(10);
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mt76_clear(dev, MT_MAC_SYS_CTRL, MT_MAC_SYS_CTRL_RESET_CSR);
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}
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void mt76x0_mac_work(struct work_struct *work)
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{
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struct mt76x0_dev *dev = container_of(work, struct mt76x0_dev,
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mac_work.work);
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struct {
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u32 addr_base;
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u32 span;
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u64 *stat_base;
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} spans[] = {
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{ MT_RX_STA_CNT0, 3, dev->stats.rx_stat },
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{ MT_TX_STA_CNT0, 3, dev->stats.tx_stat },
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{ MT_TX_AGG_STAT, 1, dev->stats.aggr_stat },
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{ MT_MPDU_DENSITY_CNT, 1, dev->stats.zero_len_del },
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{ MT_TX_AGG_CNT_BASE0, 8, &dev->stats.aggr_n[0] },
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{ MT_TX_AGG_CNT_BASE1, 8, &dev->stats.aggr_n[16] },
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};
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u32 sum, n;
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int i, j, k;
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/* Note: using MCU_RANDOM_READ is actually slower then reading all the
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* registers by hand. MCU takes ca. 20ms to complete read of 24
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* registers while reading them one by one will takes roughly
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* 24*200us =~ 5ms.
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*/
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k = 0;
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n = 0;
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sum = 0;
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for (i = 0; i < ARRAY_SIZE(spans); i++)
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for (j = 0; j < spans[i].span; j++) {
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u32 val = mt76_rr(dev, spans[i].addr_base + j * 4);
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spans[i].stat_base[j * 2] += val & 0xffff;
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spans[i].stat_base[j * 2 + 1] += val >> 16;
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/* Calculate average AMPDU length */
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if (spans[i].addr_base != MT_TX_AGG_CNT_BASE0 &&
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spans[i].addr_base != MT_TX_AGG_CNT_BASE1)
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continue;
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n += (val >> 16) + (val & 0xffff);
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sum += (val & 0xffff) * (1 + k * 2) +
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(val >> 16) * (2 + k * 2);
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k++;
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}
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atomic_set(&dev->avg_ampdu_len, n ? DIV_ROUND_CLOSEST(sum, n) : 1);
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mt76x0_check_mac_err(dev);
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ieee80211_queue_delayed_work(dev->mt76.hw, &dev->mac_work, 10 * HZ);
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}
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void
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mt76x0_mac_wcid_setup(struct mt76x0_dev *dev, u8 idx, u8 vif_idx, u8 *mac)
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{
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u8 zmac[ETH_ALEN] = {};
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u32 attr;
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attr = FIELD_PREP(MT_WCID_ATTR_BSS_IDX, vif_idx & 7) |
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FIELD_PREP(MT_WCID_ATTR_BSS_IDX_EXT, !!(vif_idx & 8));
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mt76_wr(dev, MT_WCID_ATTR(idx), attr);
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if (mac)
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memcpy(zmac, mac, sizeof(zmac));
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mt76x0_addr_wr(dev, MT_WCID_ADDR(idx), zmac);
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}
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void mt76x0_mac_set_ampdu_factor(struct mt76x0_dev *dev)
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{
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struct ieee80211_sta *sta;
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struct mt76_wcid *wcid;
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void *msta;
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u8 min_factor = 3;
|
||||
int i;
|
||||
|
||||
return;
|
||||
|
||||
rcu_read_lock();
|
||||
for (i = 0; i < ARRAY_SIZE(dev->wcid); i++) {
|
||||
wcid = rcu_dereference(dev->wcid[i]);
|
||||
if (!wcid)
|
||||
continue;
|
||||
|
||||
msta = container_of(wcid, struct mt76_sta, wcid);
|
||||
sta = container_of(msta, struct ieee80211_sta, drv_priv);
|
||||
|
||||
min_factor = min(min_factor, sta->ht_cap.ampdu_factor);
|
||||
}
|
||||
rcu_read_unlock();
|
||||
|
||||
mt76_wr(dev, MT_MAX_LEN_CFG, 0xa0fff |
|
||||
FIELD_PREP(MT_MAX_LEN_CFG_AMPDU, min_factor));
|
||||
}
|
||||
|
||||
static void
|
||||
mt76_mac_process_rate(struct ieee80211_rx_status *status, u16 rate)
|
||||
{
|
||||
u8 idx = FIELD_GET(MT_RXWI_RATE_INDEX, rate);
|
||||
|
||||
switch (FIELD_GET(MT_RXWI_RATE_PHY, rate)) {
|
||||
case MT_PHY_TYPE_OFDM:
|
||||
if (idx >= 8)
|
||||
idx = 0;
|
||||
|
||||
if (status->band == NL80211_BAND_2GHZ)
|
||||
idx += 4;
|
||||
|
||||
status->rate_idx = idx;
|
||||
return;
|
||||
case MT_PHY_TYPE_CCK:
|
||||
if (idx >= 8) {
|
||||
idx -= 8;
|
||||
status->enc_flags |= RX_ENC_FLAG_SHORTPRE;
|
||||
}
|
||||
|
||||
if (idx >= 4)
|
||||
idx = 0;
|
||||
|
||||
status->rate_idx = idx;
|
||||
return;
|
||||
case MT_PHY_TYPE_HT_GF:
|
||||
status->enc_flags |= RX_ENC_FLAG_HT_GF;
|
||||
/* fall through */
|
||||
case MT_PHY_TYPE_HT:
|
||||
status->encoding = RX_ENC_HT;
|
||||
status->rate_idx = idx;
|
||||
break;
|
||||
case MT_PHY_TYPE_VHT:
|
||||
status->encoding = RX_ENC_VHT;
|
||||
status->rate_idx = FIELD_GET(MT_RATE_INDEX_VHT_IDX, idx);
|
||||
status->nss = FIELD_GET(MT_RATE_INDEX_VHT_NSS, idx) + 1;
|
||||
break;
|
||||
default:
|
||||
WARN_ON(1);
|
||||
return;
|
||||
}
|
||||
|
||||
if (rate & MT_RXWI_RATE_LDPC)
|
||||
status->enc_flags |= RX_ENC_FLAG_LDPC;
|
||||
|
||||
if (rate & MT_RXWI_RATE_SGI)
|
||||
status->enc_flags |= RX_ENC_FLAG_SHORT_GI;
|
||||
|
||||
if (rate & MT_RXWI_RATE_STBC)
|
||||
status->enc_flags |= 1 << RX_ENC_FLAG_STBC_SHIFT;
|
||||
|
||||
switch (FIELD_GET(MT_RXWI_RATE_BW, rate)) {
|
||||
case MT_PHY_BW_20:
|
||||
break;
|
||||
case MT_PHY_BW_40:
|
||||
status->bw = RATE_INFO_BW_40;
|
||||
break;
|
||||
case MT_PHY_BW_80:
|
||||
status->bw = RATE_INFO_BW_80;
|
||||
break;
|
||||
default:
|
||||
WARN_ON(1);
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
static void
|
||||
mt76x0_rx_monitor_beacon(struct mt76x0_dev *dev, struct mt76x0_rxwi *rxwi,
|
||||
u16 rate, int rssi)
|
||||
{
|
||||
dev->bcn_phy_mode = FIELD_GET(MT_RXWI_RATE_PHY, rate);
|
||||
dev->avg_rssi = ((dev->avg_rssi * 15) / 16 + (rssi << 8)) / 256;
|
||||
}
|
||||
|
||||
static int
|
||||
mt76x0_rx_is_our_beacon(struct mt76x0_dev *dev, u8 *data)
|
||||
{
|
||||
struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)data;
|
||||
|
||||
return ieee80211_is_beacon(hdr->frame_control) &&
|
||||
ether_addr_equal(hdr->addr2, dev->ap_bssid);
|
||||
}
|
||||
|
||||
u32 mt76_mac_process_rx(struct mt76x0_dev *dev, struct sk_buff *skb,
|
||||
u8 *data, void *rxi)
|
||||
{
|
||||
struct ieee80211_rx_status *status = IEEE80211_SKB_RXCB(skb);
|
||||
struct mt76x0_rxwi *rxwi = rxi;
|
||||
u32 len, ctl = le32_to_cpu(rxwi->ctl);
|
||||
u16 rate = le16_to_cpu(rxwi->rate);
|
||||
int rssi;
|
||||
|
||||
len = FIELD_GET(MT_RXWI_CTL_MPDU_LEN, ctl);
|
||||
if (WARN_ON(len < 10))
|
||||
return 0;
|
||||
|
||||
if (rxwi->rxinfo & cpu_to_le32(MT_RXINFO_DECRYPT)) {
|
||||
status->flag |= RX_FLAG_DECRYPTED;
|
||||
status->flag |= RX_FLAG_IV_STRIPPED | RX_FLAG_MMIC_STRIPPED;
|
||||
}
|
||||
|
||||
status->chains = BIT(0);
|
||||
rssi = mt76x0_phy_get_rssi(dev, rxwi);
|
||||
status->chain_signal[0] = status->signal = rssi;
|
||||
status->freq = dev->mt76.chandef.chan->center_freq;
|
||||
status->band = dev->mt76.chandef.chan->band;
|
||||
|
||||
mt76_mac_process_rate(status, rate);
|
||||
|
||||
spin_lock_bh(&dev->con_mon_lock);
|
||||
if (mt76x0_rx_is_our_beacon(dev, data)) {
|
||||
mt76x0_rx_monitor_beacon(dev, rxwi, rate, rssi);
|
||||
} else if (rxwi->rxinfo & cpu_to_le32(MT_RXINFO_U2M)) {
|
||||
if (dev->avg_rssi == 0)
|
||||
dev->avg_rssi = rssi;
|
||||
else
|
||||
dev->avg_rssi = (dev->avg_rssi * 15) / 16 + rssi / 16;
|
||||
|
||||
}
|
||||
spin_unlock_bh(&dev->con_mon_lock);
|
||||
|
||||
return len;
|
||||
}
|
||||
|
||||
static enum mt76_cipher_type
|
||||
mt76_mac_get_key_info(struct ieee80211_key_conf *key, u8 *key_data)
|
||||
{
|
||||
memset(key_data, 0, 32);
|
||||
if (!key)
|
||||
return MT_CIPHER_NONE;
|
||||
|
||||
if (key->keylen > 32)
|
||||
return MT_CIPHER_NONE;
|
||||
|
||||
memcpy(key_data, key->key, key->keylen);
|
||||
|
||||
switch (key->cipher) {
|
||||
case WLAN_CIPHER_SUITE_WEP40:
|
||||
return MT_CIPHER_WEP40;
|
||||
case WLAN_CIPHER_SUITE_WEP104:
|
||||
return MT_CIPHER_WEP104;
|
||||
case WLAN_CIPHER_SUITE_TKIP:
|
||||
return MT_CIPHER_TKIP;
|
||||
case WLAN_CIPHER_SUITE_CCMP:
|
||||
return MT_CIPHER_AES_CCMP;
|
||||
default:
|
||||
return MT_CIPHER_NONE;
|
||||
}
|
||||
}
|
||||
|
||||
int mt76_mac_wcid_set_key(struct mt76x0_dev *dev, u8 idx,
|
||||
struct ieee80211_key_conf *key)
|
||||
{
|
||||
enum mt76_cipher_type cipher;
|
||||
u8 key_data[32];
|
||||
u8 iv_data[8];
|
||||
u32 val;
|
||||
|
||||
cipher = mt76_mac_get_key_info(key, key_data);
|
||||
if (cipher == MT_CIPHER_NONE && key)
|
||||
return -EINVAL;
|
||||
|
||||
trace_set_key(&dev->mt76, idx);
|
||||
|
||||
mt76_wr_copy(dev, MT_WCID_KEY(idx), key_data, sizeof(key_data));
|
||||
|
||||
memset(iv_data, 0, sizeof(iv_data));
|
||||
if (key) {
|
||||
iv_data[3] = key->keyidx << 6;
|
||||
if (cipher >= MT_CIPHER_TKIP) {
|
||||
/* Note: start with 1 to comply with spec,
|
||||
* (see comment on common/cmm_wpa.c:4291).
|
||||
*/
|
||||
iv_data[0] |= 1;
|
||||
iv_data[3] |= 0x20;
|
||||
}
|
||||
}
|
||||
mt76_wr_copy(dev, MT_WCID_IV(idx), iv_data, sizeof(iv_data));
|
||||
|
||||
val = mt76_rr(dev, MT_WCID_ATTR(idx));
|
||||
val &= ~MT_WCID_ATTR_PKEY_MODE & ~MT_WCID_ATTR_PKEY_MODE_EXT;
|
||||
val |= FIELD_PREP(MT_WCID_ATTR_PKEY_MODE, cipher & 7) |
|
||||
FIELD_PREP(MT_WCID_ATTR_PKEY_MODE_EXT, cipher >> 3);
|
||||
val &= ~MT_WCID_ATTR_PAIRWISE;
|
||||
val |= MT_WCID_ATTR_PAIRWISE *
|
||||
!!(key && key->flags & IEEE80211_KEY_FLAG_PAIRWISE);
|
||||
mt76_wr(dev, MT_WCID_ATTR(idx), val);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
int mt76_mac_shared_key_setup(struct mt76x0_dev *dev, u8 vif_idx, u8 key_idx,
|
||||
struct ieee80211_key_conf *key)
|
||||
{
|
||||
enum mt76_cipher_type cipher;
|
||||
u8 key_data[32];
|
||||
u32 val;
|
||||
|
||||
cipher = mt76_mac_get_key_info(key, key_data);
|
||||
if (cipher == MT_CIPHER_NONE && key)
|
||||
return -EINVAL;
|
||||
|
||||
trace_set_shared_key(&dev->mt76, vif_idx, key_idx);
|
||||
|
||||
mt76_wr_copy(dev, MT_SKEY(vif_idx, key_idx),
|
||||
key_data, sizeof(key_data));
|
||||
|
||||
val = mt76_rr(dev, MT_SKEY_MODE(vif_idx));
|
||||
val &= ~(MT_SKEY_MODE_MASK << MT_SKEY_MODE_SHIFT(vif_idx, key_idx));
|
||||
val |= cipher << MT_SKEY_MODE_SHIFT(vif_idx, key_idx);
|
||||
mt76_wr(dev, MT_SKEY_MODE(vif_idx), val);
|
||||
|
||||
return 0;
|
||||
}
|
154
drivers/net/wireless/mediatek/mt76/mt76x0/mac.h
Normal file
154
drivers/net/wireless/mediatek/mt76/mt76x0/mac.h
Normal file
@ -0,0 +1,154 @@
|
||||
/*
|
||||
* Copyright (C) 2014 Felix Fietkau <nbd@openwrt.org>
|
||||
* Copyright (C) 2015 Jakub Kicinski <kubakici@wp.pl>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2
|
||||
* as published by the Free Software Foundation
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*/
|
||||
|
||||
#ifndef __MT76_MAC_H
|
||||
#define __MT76_MAC_H
|
||||
|
||||
/* Note: values in original "RSSI" and "SNR" fields are not actually what they
|
||||
* are called for MT76X0U, names used by this driver are educated guesses
|
||||
* (see vendor mac/ral_omac.c).
|
||||
*/
|
||||
struct mt76x0_rxwi {
|
||||
__le32 rxinfo;
|
||||
|
||||
__le32 ctl;
|
||||
|
||||
__le16 tid_sn;
|
||||
__le16 rate;
|
||||
|
||||
s8 rssi[4];
|
||||
|
||||
__le32 bbp_rxinfo[4];
|
||||
} __packed __aligned(4);
|
||||
|
||||
#define MT_RXINFO_BA BIT(0)
|
||||
#define MT_RXINFO_DATA BIT(1)
|
||||
#define MT_RXINFO_NULL BIT(2)
|
||||
#define MT_RXINFO_FRAG BIT(3)
|
||||
#define MT_RXINFO_U2M BIT(4)
|
||||
#define MT_RXINFO_MULTICAST BIT(5)
|
||||
#define MT_RXINFO_BROADCAST BIT(6)
|
||||
#define MT_RXINFO_MYBSS BIT(7)
|
||||
#define MT_RXINFO_CRCERR BIT(8)
|
||||
#define MT_RXINFO_ICVERR BIT(9)
|
||||
#define MT_RXINFO_MICERR BIT(10)
|
||||
#define MT_RXINFO_AMSDU BIT(11)
|
||||
#define MT_RXINFO_HTC BIT(12)
|
||||
#define MT_RXINFO_RSSI BIT(13)
|
||||
#define MT_RXINFO_L2PAD BIT(14)
|
||||
#define MT_RXINFO_AMPDU BIT(15)
|
||||
#define MT_RXINFO_DECRYPT BIT(16)
|
||||
#define MT_RXINFO_BSSIDX3 BIT(17)
|
||||
#define MT_RXINFO_WAPI_KEY BIT(18)
|
||||
#define MT_RXINFO_PN_LEN GENMASK(21, 19)
|
||||
#define MT_RXINFO_SW_PKT_80211 BIT(22)
|
||||
#define MT_RXINFO_TCP_SUM_BYPASS BIT(28)
|
||||
#define MT_RXINFO_IP_SUM_BYPASS BIT(29)
|
||||
#define MT_RXINFO_TCP_SUM_ERR BIT(30)
|
||||
#define MT_RXINFO_IP_SUM_ERR BIT(31)
|
||||
|
||||
#define MT_RXWI_CTL_WCID GENMASK(7, 0)
|
||||
#define MT_RXWI_CTL_KEY_IDX GENMASK(9, 8)
|
||||
#define MT_RXWI_CTL_BSS_IDX GENMASK(12, 10)
|
||||
#define MT_RXWI_CTL_UDF GENMASK(15, 13)
|
||||
#define MT_RXWI_CTL_MPDU_LEN GENMASK(27, 16)
|
||||
#define MT_RXWI_CTL_TID GENMASK(31, 28)
|
||||
|
||||
#define MT_RXWI_FRAG GENMASK(3, 0)
|
||||
#define MT_RXWI_SN GENMASK(15, 4)
|
||||
|
||||
#define MT_RXWI_RATE_INDEX GENMASK(5, 0)
|
||||
#define MT_RXWI_RATE_LDPC BIT(6)
|
||||
#define MT_RXWI_RATE_BW GENMASK(8, 7)
|
||||
#define MT_RXWI_RATE_SGI BIT(9)
|
||||
#define MT_RXWI_RATE_STBC BIT(10)
|
||||
#define MT_RXWI_RATE_LDPC_ETXBF BIT(11)
|
||||
#define MT_RXWI_RATE_SND BIT(12)
|
||||
#define MT_RXWI_RATE_PHY GENMASK(15, 13)
|
||||
|
||||
#define MT_RATE_INDEX_VHT_IDX GENMASK(3, 0)
|
||||
#define MT_RATE_INDEX_VHT_NSS GENMASK(5, 4)
|
||||
|
||||
#define MT_RXWI_GAIN_RSSI_VAL GENMASK(5, 0)
|
||||
#define MT_RXWI_GAIN_RSSI_LNA_ID GENMASK(7, 6)
|
||||
#define MT_RXWI_ANT_AUX_LNA BIT(7)
|
||||
|
||||
#define MT_RXWI_EANT_ENC_ANT_ID GENMASK(7, 0)
|
||||
|
||||
enum mt76_phy_bandwidth {
|
||||
MT_PHY_BW_20,
|
||||
MT_PHY_BW_40,
|
||||
MT_PHY_BW_80,
|
||||
};
|
||||
|
||||
struct mt76_txwi {
|
||||
__le16 flags;
|
||||
__le16 rate_ctl;
|
||||
u8 ack_ctl;
|
||||
u8 wcid;
|
||||
__le16 len_ctl;
|
||||
__le32 iv;
|
||||
__le32 eiv;
|
||||
u8 aid;
|
||||
u8 txstream;
|
||||
u8 ctl2;
|
||||
u8 pktid;
|
||||
} __packed __aligned(4);
|
||||
|
||||
#define MT_TXWI_FLAGS_FRAG BIT(0)
|
||||
#define MT_TXWI_FLAGS_MMPS BIT(1)
|
||||
#define MT_TXWI_FLAGS_CFACK BIT(2)
|
||||
#define MT_TXWI_FLAGS_TS BIT(3)
|
||||
#define MT_TXWI_FLAGS_AMPDU BIT(4)
|
||||
#define MT_TXWI_FLAGS_MPDU_DENSITY GENMASK(7, 5)
|
||||
#define MT_TXWI_FLAGS_TXOP GENMASK(9, 8)
|
||||
#define MT_TXWI_FLAGS_CWMIN GENMASK(12, 10)
|
||||
#define MT_TXWI_FLAGS_NO_RATE_FALLBACK BIT(13)
|
||||
#define MT_TXWI_FLAGS_TX_RPT BIT(14)
|
||||
#define MT_TXWI_FLAGS_TX_RATE_LUT BIT(15)
|
||||
|
||||
#define MT_TXWI_RATE_MCS GENMASK(6, 0)
|
||||
#define MT_TXWI_RATE_BW BIT(7)
|
||||
#define MT_TXWI_RATE_SGI BIT(8)
|
||||
#define MT_TXWI_RATE_STBC GENMASK(10, 9)
|
||||
#define MT_TXWI_RATE_PHY_MODE GENMASK(15, 14)
|
||||
|
||||
#define MT_TXWI_ACK_CTL_REQ BIT(0)
|
||||
#define MT_TXWI_ACK_CTL_NSEQ BIT(1)
|
||||
#define MT_TXWI_ACK_CTL_BA_WINDOW GENMASK(7, 2)
|
||||
|
||||
#define MT_TXWI_LEN_BYTE_CNT GENMASK(11, 0)
|
||||
|
||||
#define MT_TXWI_CTL_TX_POWER_ADJ GENMASK(3, 0)
|
||||
#define MT_TXWI_CTL_CHAN_CHECK_PKT BIT(4)
|
||||
#define MT_TXWI_CTL_PIFS_REV BIT(6)
|
||||
|
||||
#define MT_TXWI_PKTID_PROBE BIT(7)
|
||||
|
||||
u32 mt76_mac_process_rx(struct mt76x0_dev *dev, struct sk_buff *skb,
|
||||
u8 *data, void *rxi);
|
||||
int mt76_mac_wcid_set_key(struct mt76x0_dev *dev, u8 idx,
|
||||
struct ieee80211_key_conf *key);
|
||||
void mt76_mac_wcid_set_rate(struct mt76x0_dev *dev, struct mt76_wcid *wcid,
|
||||
const struct ieee80211_tx_rate *rate);
|
||||
|
||||
int mt76_mac_shared_key_setup(struct mt76x0_dev *dev, u8 vif_idx, u8 key_idx,
|
||||
struct ieee80211_key_conf *key);
|
||||
u16 mt76_mac_tx_rate_val(struct mt76x0_dev *dev,
|
||||
const struct ieee80211_tx_rate *rate, u8 *nss_val);
|
||||
struct mt76_tx_status
|
||||
mt76x0_mac_fetch_tx_status(struct mt76x0_dev *dev);
|
||||
void mt76_send_tx_status(struct mt76x0_dev *dev, struct mt76_tx_status *stat, u8 *update);
|
||||
|
||||
#endif
|
Loading…
Reference in New Issue
Block a user