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drm/i915: Fix Ironlake M/N/P ranges to match the spec
Without this fix, some modes couldn't find appropriate clocks. Signed-off-by: Zhao Yakui <yakui.zhao@intel.com> Signed-off-by: Eric Anholt <eric@anholt.net> Tested-by: Matthew Garrett <mjg@redhat.com>
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@ -241,11 +241,11 @@ struct intel_limit {
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#define IRONLAKE_VCO_MIN 1760000
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#define IRONLAKE_VCO_MIN 1760000
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#define IRONLAKE_VCO_MAX 3510000
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#define IRONLAKE_VCO_MAX 3510000
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#define IRONLAKE_N_MIN 1
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#define IRONLAKE_N_MIN 1
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#define IRONLAKE_N_MAX 5
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#define IRONLAKE_N_MAX 6
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#define IRONLAKE_M_MIN 79
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#define IRONLAKE_M_MIN 79
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#define IRONLAKE_M_MAX 118
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#define IRONLAKE_M_MAX 127
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#define IRONLAKE_M1_MIN 12
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#define IRONLAKE_M1_MIN 12
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#define IRONLAKE_M1_MAX 23
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#define IRONLAKE_M1_MAX 22
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#define IRONLAKE_M2_MIN 5
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#define IRONLAKE_M2_MIN 5
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#define IRONLAKE_M2_MAX 9
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#define IRONLAKE_M2_MAX 9
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#define IRONLAKE_P_SDVO_DAC_MIN 5
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#define IRONLAKE_P_SDVO_DAC_MIN 5
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