mirror of
https://github.com/torvalds/linux.git
synced 2024-11-24 21:21:41 +00:00
Merge branch 'merge' of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc
Pull powerpc fixes from Ben Herrenschmidt: "The main thing that caused problem was that CONFIG_CPU_LITTLE_ENDIAN got turned on with allyesconfig and such, which is not a very good idea especially since it requires a newer toolchain than what most people have. So we turned it into a choice instead that defaults to big endian" * 'merge' of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc: powerpc/windfarm: Fix XServe G5 fan control Makefile issue arch/powerpc/kernel: Use %12.12s instead of %12s to avoid memory overflow powerpc/signals: Improved mark VSX not saved with small contexts fix powerpc/kdump: Adding symbols in vmcoreinfo to facilitate dump filtering powerpc: allyesconfig should not select CONFIG_CPU_LITTLE_ENDIAN powerpc: Fix error when cross building TAGS & cscope powerpc/booke: Only check for hugetlb in flush if vma != NULL powerpc/85xx: typo in dts: "interupt" (four devices) powerpc/8xx: mfspr SPRN_TBRx in lieu of mftb/mftbu is not supported powerpc/corenet64: compile with CONFIG_E{5,6}500_CPU well
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commit
a456c0d9c0
@ -75,8 +75,10 @@ LDEMULATION := lppc
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GNUTARGET := powerpcle
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MULTIPLEWORD := -mno-multiple
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else
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ifeq ($(call cc-option-yn,-mbig-endian),y)
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override CC += -mbig-endian
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override AS += -mbig-endian
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endif
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override LD += -EB
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LDEMULATION := ppc
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GNUTARGET := powerpc
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@ -128,7 +130,12 @@ CFLAGS-$(CONFIG_POWER5_CPU) += $(call cc-option,-mcpu=power5)
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CFLAGS-$(CONFIG_POWER6_CPU) += $(call cc-option,-mcpu=power6)
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CFLAGS-$(CONFIG_POWER7_CPU) += $(call cc-option,-mcpu=power7)
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# Altivec option not allowed with e500mc64 in GCC.
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ifeq ($(CONFIG_ALTIVEC),y)
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E5500_CPU := -mcpu=powerpc64
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else
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E5500_CPU := $(call cc-option,-mcpu=e500mc64,-mcpu=powerpc64)
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endif
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CFLAGS-$(CONFIG_E5500_CPU) += $(E5500_CPU)
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CFLAGS-$(CONFIG_E6500_CPU) += $(call cc-option,-mcpu=e6500,$(E5500_CPU))
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@ -637,14 +637,14 @@
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tlu@2f000 {
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compatible = "fsl,mpc8572-tlu", "fsl_tlu";
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reg = <0x2f000 0x1000>;
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interupts = <61 2 >;
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interrupts = <61 2>;
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interrupt-parent = <&mpic>;
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};
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tlu@15000 {
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compatible = "fsl,mpc8572-tlu", "fsl_tlu";
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reg = <0x15000 0x1000>;
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interupts = <75 2>;
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interrupts = <75 2>;
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interrupt-parent = <&mpic>;
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};
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};
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@ -547,14 +547,14 @@
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tlu@2f000 {
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compatible = "fsl,mpc8572-tlu", "fsl_tlu";
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reg = <0x2f000 0x1000>;
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interupts = <61 2 >;
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interrupts = <61 2>;
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interrupt-parent = <&mpic>;
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};
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tlu@15000 {
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compatible = "fsl,mpc8572-tlu", "fsl_tlu";
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reg = <0x15000 0x1000>;
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interupts = <75 2>;
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interrupts = <75 2>;
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interrupt-parent = <&mpic>;
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};
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};
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@ -583,14 +583,14 @@
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tlu@2f000 {
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compatible = "fsl,mpc8572-tlu", "fsl_tlu";
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reg = <0x2f000 0x1000>;
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interupts = <61 2 >;
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interrupts = <61 2>;
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interrupt-parent = <&mpic>;
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};
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tlu@15000 {
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compatible = "fsl,mpc8572-tlu", "fsl_tlu";
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reg = <0x15000 0x1000>;
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interupts = <75 2>;
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interrupts = <75 2>;
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interrupt-parent = <&mpic>;
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};
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};
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@ -545,14 +545,14 @@
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tlu@2f000 {
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compatible = "fsl,mpc8572-tlu", "fsl_tlu";
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reg = <0x2f000 0x1000>;
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interupts = <61 2 >;
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interrupts = <61 2>;
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interrupt-parent = <&mpic>;
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};
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tlu@15000 {
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compatible = "fsl,mpc8572-tlu", "fsl_tlu";
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reg = <0x15000 0x1000>;
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interupts = <75 2>;
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interrupts = <75 2>;
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interrupt-parent = <&mpic>;
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};
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};
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@ -71,18 +71,32 @@ udelay:
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add r4,r4,r5
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addi r4,r4,-1
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divw r4,r4,r5 /* BUS ticks */
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#ifdef CONFIG_8xx
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1: mftbu r5
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mftb r6
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mftbu r7
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#else
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1: mfspr r5, SPRN_TBRU
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mfspr r6, SPRN_TBRL
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mfspr r7, SPRN_TBRU
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#endif
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cmpw 0,r5,r7
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bne 1b /* Get [synced] base time */
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addc r9,r6,r4 /* Compute end time */
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addze r8,r5
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#ifdef CONFIG_8xx
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2: mftbu r5
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#else
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2: mfspr r5, SPRN_TBRU
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#endif
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cmpw 0,r5,r8
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blt 2b
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bgt 3f
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#ifdef CONFIG_8xx
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mftb r6
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#else
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mfspr r6, SPRN_TBRL
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#endif
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cmpw 0,r6,r9
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blt 2b
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3: blr
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@ -16,6 +16,7 @@ struct vmemmap_backing {
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unsigned long phys;
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unsigned long virt_addr;
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};
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extern struct vmemmap_backing *vmemmap_list;
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/*
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* Functions that deal with pagetables that could be at any level of
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@ -366,6 +366,8 @@ BEGIN_FTR_SECTION_NESTED(96); \
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cmpwi dest,0; \
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beq- 90b; \
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END_FTR_SECTION_NESTED(CPU_FTR_CELL_TB_BUG, CPU_FTR_CELL_TB_BUG, 96)
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#elif defined(CONFIG_8xx)
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#define MFTB(dest) mftb dest
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#else
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#define MFTB(dest) mfspr dest, SPRN_TBRL
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#endif
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@ -1174,12 +1174,19 @@
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#else /* __powerpc64__ */
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#if defined(CONFIG_8xx)
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#define mftbl() ({unsigned long rval; \
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asm volatile("mftbl %0" : "=r" (rval)); rval;})
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#define mftbu() ({unsigned long rval; \
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asm volatile("mftbu %0" : "=r" (rval)); rval;})
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#else
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#define mftbl() ({unsigned long rval; \
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asm volatile("mfspr %0, %1" : "=r" (rval) : \
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"i" (SPRN_TBRL)); rval;})
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#define mftbu() ({unsigned long rval; \
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asm volatile("mfspr %0, %1" : "=r" (rval) : \
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"i" (SPRN_TBRU)); rval;})
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#endif
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#endif /* !__powerpc64__ */
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#define mttbl(v) asm volatile("mttbl %0":: "r"(v))
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@ -29,7 +29,11 @@ static inline cycles_t get_cycles(void)
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ret = 0;
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__asm__ __volatile__(
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#ifdef CONFIG_8xx
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"97: mftb %0\n"
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#else
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"97: mfspr %0, %2\n"
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#endif
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"99:\n"
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".section __ftr_fixup,\"a\"\n"
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".align 2\n"
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@ -41,7 +45,11 @@ static inline cycles_t get_cycles(void)
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" .long 0\n"
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" .long 0\n"
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".previous"
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#ifdef CONFIG_8xx
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: "=r" (ret) : "i" (CPU_FTR_601));
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#else
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: "=r" (ret) : "i" (CPU_FTR_601), "i" (SPRN_TBRL));
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#endif
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return ret;
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#endif
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}
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@ -18,6 +18,7 @@
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#include <linux/ftrace.h>
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#include <asm/machdep.h>
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#include <asm/pgalloc.h>
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#include <asm/prom.h>
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#include <asm/sections.h>
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@ -75,6 +76,17 @@ void arch_crash_save_vmcoreinfo(void)
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#ifndef CONFIG_NEED_MULTIPLE_NODES
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VMCOREINFO_SYMBOL(contig_page_data);
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#endif
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#if defined(CONFIG_PPC64) && defined(CONFIG_SPARSEMEM_VMEMMAP)
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VMCOREINFO_SYMBOL(vmemmap_list);
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VMCOREINFO_SYMBOL(mmu_vmemmap_psize);
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VMCOREINFO_SYMBOL(mmu_psize_defs);
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VMCOREINFO_STRUCT_SIZE(vmemmap_backing);
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VMCOREINFO_OFFSET(vmemmap_backing, list);
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VMCOREINFO_OFFSET(vmemmap_backing, phys);
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VMCOREINFO_OFFSET(vmemmap_backing, virt_addr);
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VMCOREINFO_STRUCT_SIZE(mmu_psize_def);
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VMCOREINFO_OFFSET(mmu_psize_def, shift);
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#endif
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}
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/*
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@ -210,7 +210,7 @@ static void __init nvram_print_partitions(char * label)
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printk(KERN_WARNING "--------%s---------\n", label);
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printk(KERN_WARNING "indx\t\tsig\tchks\tlen\tname\n");
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list_for_each_entry(tmp_part, &nvram_partitions, partition) {
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printk(KERN_WARNING "%4d \t%02x\t%02x\t%d\t%12s\n",
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printk(KERN_WARNING "%4d \t%02x\t%02x\t%d\t%12.12s\n",
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tmp_part->index, tmp_part->header.signature,
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tmp_part->header.checksum, tmp_part->header.length,
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tmp_part->header.name);
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@ -445,6 +445,12 @@ static int save_user_regs(struct pt_regs *regs, struct mcontext __user *frame,
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#endif /* CONFIG_ALTIVEC */
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if (copy_fpr_to_user(&frame->mc_fregs, current))
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return 1;
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/*
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* Clear the MSR VSX bit to indicate there is no valid state attached
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* to this context, except in the specific case below where we set it.
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*/
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msr &= ~MSR_VSX;
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#ifdef CONFIG_VSX
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/*
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* Copy VSR 0-31 upper half from thread_struct to local
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@ -457,15 +463,7 @@ static int save_user_regs(struct pt_regs *regs, struct mcontext __user *frame,
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if (copy_vsx_to_user(&frame->mc_vsregs, current))
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return 1;
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msr |= MSR_VSX;
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} else if (!ctx_has_vsx_region)
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/*
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* With a small context structure we can't hold the VSX
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* registers, hence clear the MSR value to indicate the state
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* was not saved.
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*/
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msr &= ~MSR_VSX;
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}
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#endif /* CONFIG_VSX */
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#ifdef CONFIG_SPE
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/* save spe registers */
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@ -122,6 +122,12 @@ static long setup_sigcontext(struct sigcontext __user *sc, struct pt_regs *regs,
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flush_fp_to_thread(current);
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/* copy fpr regs and fpscr */
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err |= copy_fpr_to_user(&sc->fp_regs, current);
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/*
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* Clear the MSR VSX bit to indicate there is no valid state attached
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* to this context, except in the specific case below where we set it.
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*/
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msr &= ~MSR_VSX;
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#ifdef CONFIG_VSX
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/*
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* Copy VSX low doubleword to local buffer for formatting,
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@ -232,9 +232,15 @@ __do_get_tspec:
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lwz r6,(CFG_TB_ORIG_STAMP+4)(r9)
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/* Get a stable TB value */
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#ifdef CONFIG_8xx
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2: mftbu r3
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mftbl r4
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mftbu r0
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#else
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2: mfspr r3, SPRN_TBRU
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mfspr r4, SPRN_TBRL
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mfspr r0, SPRN_TBRU
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#endif
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cmplw cr0,r3,r0
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bne- 2b
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@ -117,6 +117,5 @@ void flush_hugetlb_page(struct vm_area_struct *vma, unsigned long vmaddr)
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struct hstate *hstate = hstate_file(vma->vm_file);
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unsigned long tsize = huge_page_shift(hstate) - 10;
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__flush_tlb_page(vma ? vma->vm_mm : NULL, vmaddr, tsize, 0);
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__flush_tlb_page(vma->vm_mm, vmaddr, tsize, 0);
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}
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@ -305,7 +305,7 @@ void __flush_tlb_page(struct mm_struct *mm, unsigned long vmaddr,
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void flush_tlb_page(struct vm_area_struct *vma, unsigned long vmaddr)
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{
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#ifdef CONFIG_HUGETLB_PAGE
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if (is_vm_hugetlb_page(vma))
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if (vma && is_vm_hugetlb_page(vma))
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flush_hugetlb_page(vma, vmaddr);
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#endif
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@ -404,13 +404,27 @@ config PPC_DOORBELL
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endmenu
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config CPU_LITTLE_ENDIAN
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bool "Build little endian kernel"
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default n
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choice
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prompt "Endianness selection"
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default CPU_BIG_ENDIAN
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help
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This option selects whether a big endian or little endian kernel will
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be built.
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config CPU_BIG_ENDIAN
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bool "Build big endian kernel"
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help
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Build a big endian kernel.
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If unsure, select this option.
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config CPU_LITTLE_ENDIAN
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bool "Build little endian kernel"
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help
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Build a little endian kernel.
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Note that if cross compiling a little endian kernel,
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CROSS_COMPILE must point to a toolchain capable of targeting
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little endian powerpc.
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endchoice
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@ -40,6 +40,7 @@ obj-$(CONFIG_WINDFARM_RM31) += windfarm_fcu_controls.o \
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windfarm_ad7417_sensor.o \
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windfarm_lm75_sensor.o \
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windfarm_lm87_sensor.o \
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windfarm_max6690_sensor.o \
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windfarm_pid.o \
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windfarm_cpufreq_clamp.o \
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windfarm_rm31.o
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