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drm/tegra: sor - Do not hardcode link speed

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Use the speed probed from the link at runtime rather than relying on a
hardcoded default.

Signed-off-by: Thierry Reding <treding@nvidia.com>
This commit is contained in:
Thierry Reding 2014-06-05 16:16:23 +02:00
parent 7890b576ed
commit a4263fed28
1 changed files with 2 additions and 2 deletions
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4
drivers/gpu/drm/tegra/sor.c
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@ -658,10 +658,10 @@ static int tegra_output_sor_enable(struct tegra_output *output)
usleep_range(250, 1000);
}
/* set link bandwidth (2.7 GHz, XXX: parameterize based on link?) */
/* set link bandwidth */
value = tegra_sor_readl(sor, SOR_CLK_CNTRL);
value &= ~SOR_CLK_CNTRL_DP_LINK_SPEED_MASK;
value |= SOR_CLK_CNTRL_DP_LINK_SPEED_G2_70;
value |= drm_dp_link_rate_to_bw_code(link.rate) << 2;
tegra_sor_writel(sor, value, SOR_CLK_CNTRL);
/* set linkctl */