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net: stmmac: work around sporadic tx issue on link-up
This is a follow-up to the discussion in [0]. It seems to me that
at least the IP version used on Amlogic SoC's sometimes has a problem
if register MAC_CTRL_REG is written whilst the chip is still processing
a previous write. But that's just a guess.
Adding a delay between two writes to this register helps, but we can
also simply omit the offending second write. This patch uses the second
approach and is based on a suggestion from Qi Duan.
Benefit of this approach is that we can save few register writes, also
on not affected chip versions.
[0] https://www.spinics.net/lists/netdev/msg831526.html
Fixes: bfab27a146
("stmmac: add the experimental PCI support")
Suggested-by: Qi Duan <qi.duan@amlogic.com>
Suggested-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
Link: https://lore.kernel.org/r/e99857ce-bd90-5093-ca8c-8cd480b5a0a2@gmail.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
This commit is contained in:
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@ -258,14 +258,18 @@ EXPORT_SYMBOL_GPL(stmmac_set_mac_addr);
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/* Enable disable MAC RX/TX */
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void stmmac_set_mac(void __iomem *ioaddr, bool enable)
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{
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u32 value = readl(ioaddr + MAC_CTRL_REG);
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u32 old_val, value;
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old_val = readl(ioaddr + MAC_CTRL_REG);
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value = old_val;
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if (enable)
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value |= MAC_ENABLE_RX | MAC_ENABLE_TX;
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else
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value &= ~(MAC_ENABLE_TX | MAC_ENABLE_RX);
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writel(value, ioaddr + MAC_CTRL_REG);
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if (value != old_val)
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writel(value, ioaddr + MAC_CTRL_REG);
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}
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void stmmac_get_mac_addr(void __iomem *ioaddr, unsigned char *addr,
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@ -986,10 +986,10 @@ static void stmmac_mac_link_up(struct phylink_config *config,
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bool tx_pause, bool rx_pause)
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{
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struct stmmac_priv *priv = netdev_priv(to_net_dev(config->dev));
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u32 ctrl;
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u32 old_ctrl, ctrl;
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ctrl = readl(priv->ioaddr + MAC_CTRL_REG);
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ctrl &= ~priv->hw->link.speed_mask;
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old_ctrl = readl(priv->ioaddr + MAC_CTRL_REG);
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ctrl = old_ctrl & ~priv->hw->link.speed_mask;
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if (interface == PHY_INTERFACE_MODE_USXGMII) {
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switch (speed) {
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@ -1064,7 +1064,8 @@ static void stmmac_mac_link_up(struct phylink_config *config,
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if (tx_pause && rx_pause)
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stmmac_mac_flow_ctrl(priv, duplex);
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writel(ctrl, priv->ioaddr + MAC_CTRL_REG);
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if (ctrl != old_ctrl)
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writel(ctrl, priv->ioaddr + MAC_CTRL_REG);
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stmmac_mac_set(priv, priv->ioaddr, true);
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if (phy && priv->dma_cap.eee) {
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