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Merge branch 'x86-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull x86 fixes from Ingo Molnar: "A CR4-shadow 32-bit init fix, plus two typo fixes" * 'x86-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: x86: Init per-cpu shadow copy of CR4 on 32-bit CPUs too x86/platform/intel-mid: Fix trivial printk message typo in intel_mid_arch_setup() x86/cpu/intel: Fix trivial typo in intel_tlb_table[]
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commit
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@ -1396,6 +1396,12 @@ void cpu_init(void)
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wait_for_master_cpu(cpu);
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/*
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* Initialize the CR4 shadow before doing anything that could
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* try to read it.
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*/
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cr4_init_shadow();
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show_ucode_info_early();
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printk(KERN_INFO "Initializing CPU#%d\n", cpu);
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@ -565,8 +565,8 @@ static const struct _tlb_table intel_tlb_table[] = {
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{ 0xb2, TLB_INST_4K, 64, " TLB_INST 4KByte pages, 4-way set associative" },
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{ 0xb3, TLB_DATA_4K, 128, " TLB_DATA 4 KByte pages, 4-way set associative" },
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{ 0xb4, TLB_DATA_4K, 256, " TLB_DATA 4 KByte pages, 4-way associative" },
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{ 0xb5, TLB_INST_4K, 64, " TLB_INST 4 KByte pages, 8-way set ssociative" },
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{ 0xb6, TLB_INST_4K, 128, " TLB_INST 4 KByte pages, 8-way set ssociative" },
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{ 0xb5, TLB_INST_4K, 64, " TLB_INST 4 KByte pages, 8-way set associative" },
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{ 0xb6, TLB_INST_4K, 128, " TLB_INST 4 KByte pages, 8-way set associative" },
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{ 0xba, TLB_DATA_4K, 64, " TLB_DATA 4 KByte pages, 4-way associative" },
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{ 0xc0, TLB_DATA_4K_4M, 8, " TLB_DATA 4 KByte and 4 MByte pages, 4-way associative" },
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{ 0xc1, STLB_4K_2M, 1024, " STLB 4 KByte and 2 MByte pages, 8-way associative" },
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@ -130,7 +130,7 @@ static void intel_mid_arch_setup(void)
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intel_mid_ops = get_intel_mid_ops[__intel_mid_cpu_chip]();
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else {
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intel_mid_ops = get_intel_mid_ops[INTEL_MID_CPU_CHIP_PENWELL]();
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pr_info("ARCH: Uknown SoC, assuming PENWELL!\n");
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pr_info("ARCH: Unknown SoC, assuming PENWELL!\n");
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}
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out:
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