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PM / devfreq: update the name of EXYNOS clock registers that were omitted
In the commit, "PM / devfreq: update the name of EXYNOS clock register" ommitted one register. Signed-off-by: MyungJoo Ham <myungjoo.ham@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
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@ -868,9 +868,9 @@ static int exynos4x12_init_tables(struct busfreq_data *data)
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int ret;
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/* Enable pause function for DREX2 DVFS */
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tmp = __raw_readl(S5P_DMC_PAUSE_CTRL);
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tmp |= DMC_PAUSE_ENABLE;
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__raw_writel(tmp, S5P_DMC_PAUSE_CTRL);
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tmp = __raw_readl(EXYNOS4_DMC_PAUSE_CTRL);
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tmp |= EXYNOS4_DMC_PAUSE_ENABLE;
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__raw_writel(tmp, EXYNOS4_DMC_PAUSE_CTRL);
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tmp = __raw_readl(EXYNOS4_CLKDIV_DMC0);
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