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octeontx2-af: Configure VLAN TPIDs

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Setup TPID's for vlan0 and vlan1 for Tx VLAN insertion offloads.

Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Signed-off-by: Jerin Jacob <jerinj@marvell.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Nithin Dabilpuram 2018-12-02 18:17:46 +05:30 committed by David S. Miller
parent a27d765916
commit a253933e6a
1 changed files with 7 additions and 0 deletions
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7
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
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@ -865,6 +865,13 @@ int rvu_mbox_handler_nix_lf_alloc(struct rvu *rvu,
(u64)pfvf->nix_qints_ctx->iova);
rvu_write64(rvu, blkaddr, NIX_AF_LFX_QINTS_CFG(nixlf), BIT_ULL(36));
/* Setup VLANX TPID's.
* Use VLAN1 for 802.1Q
* and VLAN0 for 802.1AD.
*/
cfg = (0x8100ULL << 16) | 0x88A8ULL;
rvu_write64(rvu, blkaddr, NIX_AF_LFX_TX_CFG(nixlf), cfg);
/* Enable LMTST for this NIX LF */
rvu_write64(rvu, blkaddr, NIX_AF_LFX_TX_CFG2(nixlf), BIT_ULL(0));