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Merge master.kernel.org:/pub/scm/linux/kernel/git/davej/agpgart
* master.kernel.org:/pub/scm/linux/kernel/git/davej/agpgart: [AGPGART] Further constification. [AGPGART] Fix modular agpgart ia64 allmodconfig
This commit is contained in:
commit
a22a0fab32
@ -1,7 +1,8 @@
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agpgart-y := backend.o frontend.o generic.o isoch.o
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agpgart-$(CONFIG_COMPAT) += compat_ioctl.o
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obj-$(CONFIG_AGP) += agpgart.o
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obj-$(CONFIG_COMPAT) += compat_ioctl.o
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obj-$(CONFIG_AGP_ALI) += ali-agp.o
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obj-$(CONFIG_AGP_ATI) += ati-agp.o
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obj-$(CONFIG_AGP_AMD) += amd-k7-agp.o
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@ -93,12 +93,12 @@ struct aper_size_info_fixed {
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struct agp_bridge_driver {
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struct module *owner;
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void *aperture_sizes;
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const void *aperture_sizes;
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int num_aperture_sizes;
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enum aper_size_type size_type;
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int cant_use_aperture;
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int needs_scratch_page;
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struct gatt_mask *masks;
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const struct gatt_mask *masks;
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int (*fetch_size)(void);
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int (*configure)(void);
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void (*agp_enable)(struct agp_bridge_data *, u32);
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@ -119,7 +119,7 @@ struct agp_bridge_driver {
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struct agp_bridge_data {
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const struct agp_version *version;
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struct agp_bridge_driver *driver;
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const struct agp_bridge_driver *driver;
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struct vm_operations_struct *vm_ops;
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void *previous_size;
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void *current_size;
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@ -290,7 +290,7 @@ void agp3_generic_cleanup(void);
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/* aperture sizes have been standardised since v3 */
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#define AGP_GENERIC_SIZES_ENTRIES 11
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extern struct aper_size_info_16 agp3_generic_sizes[];
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extern const struct aper_size_info_16 agp3_generic_sizes[];
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#define virt_to_gart(x) (phys_to_gart(virt_to_phys(x)))
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#define gart_to_virt(x) (phys_to_virt(gart_to_phys(x)))
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@ -182,7 +182,7 @@ static void m1541_destroy_page(void * addr)
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/* Setup function */
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static struct aper_size_info_32 ali_generic_sizes[7] =
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static const struct aper_size_info_32 ali_generic_sizes[7] =
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{
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{256, 65536, 6, 10},
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{128, 32768, 5, 9},
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@ -193,7 +193,7 @@ static struct aper_size_info_32 ali_generic_sizes[7] =
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{4, 1024, 0, 3}
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};
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static struct agp_bridge_driver ali_generic_bridge = {
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static const struct agp_bridge_driver ali_generic_bridge = {
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.owner = THIS_MODULE,
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.aperture_sizes = ali_generic_sizes,
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.size_type = U32_APER_SIZE,
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@ -217,7 +217,7 @@ static struct agp_bridge_driver ali_generic_bridge = {
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.agp_type_to_mask_type = agp_generic_type_to_mask_type,
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};
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static struct agp_bridge_driver ali_m1541_bridge = {
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static const struct agp_bridge_driver ali_m1541_bridge = {
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.owner = THIS_MODULE,
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.aperture_sizes = ali_generic_sizes,
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.size_type = U32_APER_SIZE,
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@ -344,7 +344,7 @@ static int amd_remove_memory(struct agp_memory *mem, off_t pg_start, int type)
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return 0;
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}
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static struct aper_size_info_lvl2 amd_irongate_sizes[7] =
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static const struct aper_size_info_lvl2 amd_irongate_sizes[7] =
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{
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{2048, 524288, 0x0000000c},
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{1024, 262144, 0x0000000a},
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@ -355,12 +355,12 @@ static struct aper_size_info_lvl2 amd_irongate_sizes[7] =
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{32, 8192, 0x00000000}
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};
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static struct gatt_mask amd_irongate_masks[] =
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static const struct gatt_mask amd_irongate_masks[] =
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{
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{.mask = 1, .type = 0}
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};
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static struct agp_bridge_driver amd_irongate_driver = {
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static const struct agp_bridge_driver amd_irongate_driver = {
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.owner = THIS_MODULE,
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.aperture_sizes = amd_irongate_sizes,
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.size_type = LVL2_APER_SIZE,
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@ -192,7 +192,7 @@ static u64 amd64_configure (struct pci_dev *hammer, u64 gatt_table)
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}
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static struct aper_size_info_32 amd_8151_sizes[7] =
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static const struct aper_size_info_32 amd_8151_sizes[7] =
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{
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{2048, 524288, 9, 0x00000000 }, /* 0 0 0 0 0 0 */
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{1024, 262144, 8, 0x00000400 }, /* 1 0 0 0 0 0 */
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@ -232,7 +232,7 @@ static void amd64_cleanup(void)
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}
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static struct agp_bridge_driver amd_8151_driver = {
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static const struct agp_bridge_driver amd_8151_driver = {
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.owner = THIS_MODULE,
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.aperture_sizes = amd_8151_sizes,
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.size_type = U32_APER_SIZE,
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@ -24,7 +24,7 @@
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#define ATI_GART_CACHE_ENTRY_CNTRL 0x10
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static struct aper_size_info_lvl2 ati_generic_sizes[7] =
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static const struct aper_size_info_lvl2 ati_generic_sizes[7] =
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{
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{2048, 524288, 0x0000000c},
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{1024, 262144, 0x0000000a},
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@ -410,7 +410,7 @@ static int ati_free_gatt_table(struct agp_bridge_data *bridge)
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return 0;
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}
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static struct agp_bridge_driver ati_generic_bridge = {
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static const struct agp_bridge_driver ati_generic_bridge = {
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.owner = THIS_MODULE,
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.aperture_sizes = ati_generic_sizes,
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.size_type = LVL2_APER_SIZE,
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@ -59,7 +59,7 @@ static struct _efficeon_private {
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unsigned long l1_table[EFFICEON_L1_SIZE];
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} efficeon_private;
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static struct gatt_mask efficeon_generic_masks[] =
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static const struct gatt_mask efficeon_generic_masks[] =
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{
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{.mask = 0x00000001, .type = 0}
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};
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@ -70,7 +70,7 @@ static inline unsigned long efficeon_mask_memory(unsigned long addr)
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return addr | 0x00000001;
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}
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static struct aper_size_info_lvl2 efficeon_generic_sizes[4] =
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static const struct aper_size_info_lvl2 efficeon_generic_sizes[4] =
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{
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{256, 65536, 0},
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{128, 32768, 32},
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@ -309,7 +309,7 @@ static int efficeon_remove_memory(struct agp_memory * mem, off_t pg_start, int t
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}
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static struct agp_bridge_driver efficeon_driver = {
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static const struct agp_bridge_driver efficeon_driver = {
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.owner = THIS_MODULE,
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.aperture_sizes = efficeon_generic_sizes,
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.size_type = LVL2_APER_SIZE,
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@ -1340,7 +1340,7 @@ void agp3_generic_cleanup(void)
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}
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EXPORT_SYMBOL(agp3_generic_cleanup);
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struct aper_size_info_16 agp3_generic_sizes[AGP_GENERIC_SIZES_ENTRIES] =
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const struct aper_size_info_16 agp3_generic_sizes[AGP_GENERIC_SIZES_ENTRIES] =
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{
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{4096, 1048576, 10,0x000},
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{2048, 524288, 9, 0x800},
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@ -419,7 +419,7 @@ hp_zx1_enable (struct agp_bridge_data *bridge, u32 mode)
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agp_device_command(command, (mode & AGP8X_MODE) != 0);
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}
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struct agp_bridge_driver hp_zx1_driver = {
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struct const agp_bridge_driver hp_zx1_driver = {
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.owner = THIS_MODULE,
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.size_type = FIXED_APER_SIZE,
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.configure = hp_zx1_configure,
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@ -78,7 +78,7 @@ static struct {
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} *lp_desc;
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} i460;
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static struct aper_size_info_8 i460_sizes[3] =
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static const struct aper_size_info_8 i460_sizes[3] =
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{
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/*
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* The 32GB aperture is only available with a 4M GART page size. Due to the
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@ -550,7 +550,7 @@ static unsigned long i460_mask_memory (struct agp_bridge_data *bridge,
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| (((addr & ~((1 << I460_IO_PAGE_SHIFT) - 1)) & 0xfffff000) >> 12);
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}
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struct agp_bridge_driver intel_i460_driver = {
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struct const agp_bridge_driver intel_i460_driver = {
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.owner = THIS_MODULE,
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.aperture_sizes = i460_sizes,
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.size_type = U8_APER_SIZE,
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@ -63,7 +63,7 @@ extern int agp_memory_reserved;
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#define INTEL_I7505_AGPCTRL 0x70
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#define INTEL_I7505_MCHCFG 0x50
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static struct aper_size_info_fixed intel_i810_sizes[] =
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static const struct aper_size_info_fixed intel_i810_sizes[] =
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{
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{64, 16384, 4},
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/* The 32M mode still requires a 64k gatt */
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@ -1365,18 +1365,18 @@ static int intel_7505_configure(void)
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}
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/* Setup function */
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static struct gatt_mask intel_generic_masks[] =
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static const struct gatt_mask intel_generic_masks[] =
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{
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{.mask = 0x00000017, .type = 0}
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};
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static struct aper_size_info_8 intel_815_sizes[2] =
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static const struct aper_size_info_8 intel_815_sizes[2] =
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{
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{64, 16384, 4, 0},
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{32, 8192, 3, 8},
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};
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static struct aper_size_info_8 intel_8xx_sizes[7] =
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static const struct aper_size_info_8 intel_8xx_sizes[7] =
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{
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{256, 65536, 6, 0},
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{128, 32768, 5, 32},
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@ -1387,7 +1387,7 @@ static struct aper_size_info_8 intel_8xx_sizes[7] =
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{4, 1024, 0, 63}
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};
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static struct aper_size_info_16 intel_generic_sizes[7] =
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static const struct aper_size_info_16 intel_generic_sizes[7] =
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{
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{256, 65536, 6, 0},
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{128, 32768, 5, 32},
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@ -1398,7 +1398,7 @@ static struct aper_size_info_16 intel_generic_sizes[7] =
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{4, 1024, 0, 63}
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};
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static struct aper_size_info_8 intel_830mp_sizes[4] =
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static const struct aper_size_info_8 intel_830mp_sizes[4] =
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{
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{256, 65536, 6, 0},
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{128, 32768, 5, 32},
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@ -1406,7 +1406,7 @@ static struct aper_size_info_8 intel_830mp_sizes[4] =
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{32, 8192, 3, 56}
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};
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static struct agp_bridge_driver intel_generic_driver = {
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static const struct agp_bridge_driver intel_generic_driver = {
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.owner = THIS_MODULE,
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.aperture_sizes = intel_generic_sizes,
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.size_type = U16_APER_SIZE,
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@ -1430,7 +1430,7 @@ static struct agp_bridge_driver intel_generic_driver = {
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.agp_type_to_mask_type = agp_generic_type_to_mask_type,
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};
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static struct agp_bridge_driver intel_810_driver = {
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static const struct agp_bridge_driver intel_810_driver = {
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.owner = THIS_MODULE,
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.aperture_sizes = intel_i810_sizes,
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.size_type = FIXED_APER_SIZE,
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@ -1455,7 +1455,7 @@ static struct agp_bridge_driver intel_810_driver = {
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.agp_type_to_mask_type = agp_generic_type_to_mask_type,
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};
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static struct agp_bridge_driver intel_815_driver = {
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static const struct agp_bridge_driver intel_815_driver = {
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.owner = THIS_MODULE,
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.aperture_sizes = intel_815_sizes,
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.size_type = U8_APER_SIZE,
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@ -1479,7 +1479,7 @@ static struct agp_bridge_driver intel_815_driver = {
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.agp_type_to_mask_type = agp_generic_type_to_mask_type,
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};
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static struct agp_bridge_driver intel_830_driver = {
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static const struct agp_bridge_driver intel_830_driver = {
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.owner = THIS_MODULE,
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.aperture_sizes = intel_i830_sizes,
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.size_type = FIXED_APER_SIZE,
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@ -1504,7 +1504,7 @@ static struct agp_bridge_driver intel_830_driver = {
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.agp_type_to_mask_type = intel_i830_type_to_mask_type,
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};
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static struct agp_bridge_driver intel_820_driver = {
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static const struct agp_bridge_driver intel_820_driver = {
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.owner = THIS_MODULE,
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.aperture_sizes = intel_8xx_sizes,
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.size_type = U8_APER_SIZE,
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@ -1528,7 +1528,7 @@ static struct agp_bridge_driver intel_820_driver = {
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.agp_type_to_mask_type = agp_generic_type_to_mask_type,
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};
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static struct agp_bridge_driver intel_830mp_driver = {
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static const struct agp_bridge_driver intel_830mp_driver = {
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.owner = THIS_MODULE,
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.aperture_sizes = intel_830mp_sizes,
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.size_type = U8_APER_SIZE,
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@ -1552,7 +1552,7 @@ static struct agp_bridge_driver intel_830mp_driver = {
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.agp_type_to_mask_type = agp_generic_type_to_mask_type,
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};
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static struct agp_bridge_driver intel_840_driver = {
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static const struct agp_bridge_driver intel_840_driver = {
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.owner = THIS_MODULE,
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.aperture_sizes = intel_8xx_sizes,
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.size_type = U8_APER_SIZE,
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@ -1576,7 +1576,7 @@ static struct agp_bridge_driver intel_840_driver = {
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.agp_type_to_mask_type = agp_generic_type_to_mask_type,
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};
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static struct agp_bridge_driver intel_845_driver = {
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static const struct agp_bridge_driver intel_845_driver = {
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.owner = THIS_MODULE,
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.aperture_sizes = intel_8xx_sizes,
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.size_type = U8_APER_SIZE,
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@ -1600,7 +1600,7 @@ static struct agp_bridge_driver intel_845_driver = {
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.agp_type_to_mask_type = agp_generic_type_to_mask_type,
|
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};
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static struct agp_bridge_driver intel_850_driver = {
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static const struct agp_bridge_driver intel_850_driver = {
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.owner = THIS_MODULE,
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.aperture_sizes = intel_8xx_sizes,
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.size_type = U8_APER_SIZE,
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@ -1624,7 +1624,7 @@ static struct agp_bridge_driver intel_850_driver = {
|
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.agp_type_to_mask_type = agp_generic_type_to_mask_type,
|
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};
|
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static struct agp_bridge_driver intel_860_driver = {
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static const struct agp_bridge_driver intel_860_driver = {
|
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.owner = THIS_MODULE,
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.aperture_sizes = intel_8xx_sizes,
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.size_type = U8_APER_SIZE,
|
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@ -1648,7 +1648,7 @@ static struct agp_bridge_driver intel_860_driver = {
|
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.agp_type_to_mask_type = agp_generic_type_to_mask_type,
|
||||
};
|
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|
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static struct agp_bridge_driver intel_915_driver = {
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static const struct agp_bridge_driver intel_915_driver = {
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.owner = THIS_MODULE,
|
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.aperture_sizes = intel_i830_sizes,
|
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.size_type = FIXED_APER_SIZE,
|
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@ -1673,7 +1673,7 @@ static struct agp_bridge_driver intel_915_driver = {
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.agp_type_to_mask_type = intel_i830_type_to_mask_type,
|
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};
|
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|
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static struct agp_bridge_driver intel_i965_driver = {
|
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static const struct agp_bridge_driver intel_i965_driver = {
|
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.owner = THIS_MODULE,
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.aperture_sizes = intel_i830_sizes,
|
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.size_type = FIXED_APER_SIZE,
|
||||
@ -1698,7 +1698,7 @@ static struct agp_bridge_driver intel_i965_driver = {
|
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.agp_type_to_mask_type = intel_i830_type_to_mask_type,
|
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};
|
||||
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static struct agp_bridge_driver intel_7505_driver = {
|
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static const struct agp_bridge_driver intel_7505_driver = {
|
||||
.owner = THIS_MODULE,
|
||||
.aperture_sizes = intel_8xx_sizes,
|
||||
.size_type = U8_APER_SIZE,
|
||||
|
@ -272,7 +272,7 @@ static void nvidia_tlbflush(struct agp_memory *mem)
|
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}
|
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|
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|
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static struct aper_size_info_8 nvidia_generic_sizes[5] =
|
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static const struct aper_size_info_8 nvidia_generic_sizes[5] =
|
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{
|
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{512, 131072, 7, 0},
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{256, 65536, 6, 8},
|
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@ -283,13 +283,13 @@ static struct aper_size_info_8 nvidia_generic_sizes[5] =
|
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};
|
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|
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|
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static struct gatt_mask nvidia_generic_masks[] =
|
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static const struct gatt_mask nvidia_generic_masks[] =
|
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{
|
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{ .mask = 1, .type = 0}
|
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};
|
||||
|
||||
|
||||
static struct agp_bridge_driver nvidia_driver = {
|
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static const struct agp_bridge_driver nvidia_driver = {
|
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.owner = THIS_MODULE,
|
||||
.aperture_sizes = nvidia_generic_sizes,
|
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.size_type = U8_APER_SIZE,
|
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|
@ -210,7 +210,7 @@ parisc_agp_enable(struct agp_bridge_data *bridge, u32 mode)
|
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agp_device_command(command, (mode & AGP8X_MODE) != 0);
|
||||
}
|
||||
|
||||
struct agp_bridge_driver parisc_agp_driver = {
|
||||
struct const agp_bridge_driver parisc_agp_driver = {
|
||||
.owner = THIS_MODULE,
|
||||
.size_type = FIXED_APER_SIZE,
|
||||
.configure = parisc_agp_configure,
|
||||
|
@ -247,7 +247,7 @@ static struct agp_bridge_data *sgi_tioca_find_bridge(struct pci_dev *pdev)
|
||||
return bridge;
|
||||
}
|
||||
|
||||
struct agp_bridge_driver sgi_tioca_driver = {
|
||||
struct const agp_bridge_driver sgi_tioca_driver = {
|
||||
.owner = THIS_MODULE,
|
||||
.size_type = U16_APER_SIZE,
|
||||
.configure = sgi_tioca_configure,
|
||||
|
@ -108,7 +108,7 @@ static void sis_delayed_enable(struct agp_bridge_data *bridge, u32 mode)
|
||||
}
|
||||
}
|
||||
|
||||
static struct aper_size_info_8 sis_generic_sizes[7] =
|
||||
static const struct aper_size_info_8 sis_generic_sizes[7] =
|
||||
{
|
||||
{256, 65536, 6, 99},
|
||||
{128, 32768, 5, 83},
|
||||
|
@ -385,12 +385,12 @@ static int serverworks_remove_memory(struct agp_memory *mem, off_t pg_start,
|
||||
return 0;
|
||||
}
|
||||
|
||||
static struct gatt_mask serverworks_masks[] =
|
||||
static const struct gatt_mask serverworks_masks[] =
|
||||
{
|
||||
{.mask = 1, .type = 0}
|
||||
};
|
||||
|
||||
static struct aper_size_info_lvl2 serverworks_sizes[7] =
|
||||
static const struct aper_size_info_lvl2 serverworks_sizes[7] =
|
||||
{
|
||||
{2048, 524288, 0x80000000},
|
||||
{1024, 262144, 0xc0000000},
|
||||
@ -423,7 +423,7 @@ static void serverworks_agp_enable(struct agp_bridge_data *bridge, u32 mode)
|
||||
agp_device_command(command, 0);
|
||||
}
|
||||
|
||||
static struct agp_bridge_driver sworks_driver = {
|
||||
static const struct agp_bridge_driver sworks_driver = {
|
||||
.owner = THIS_MODULE,
|
||||
.aperture_sizes = serverworks_sizes,
|
||||
.size_type = LVL2_APER_SIZE,
|
||||
|
@ -460,7 +460,7 @@ void null_cache_flush(void)
|
||||
|
||||
/* Setup function */
|
||||
|
||||
static struct aper_size_info_32 uninorth_sizes[7] =
|
||||
static const struct aper_size_info_32 uninorth_sizes[7] =
|
||||
{
|
||||
#if 0 /* Not sure uninorth supports that high aperture sizes */
|
||||
{256, 65536, 6, 64},
|
||||
@ -477,7 +477,7 @@ static struct aper_size_info_32 uninorth_sizes[7] =
|
||||
* Not sure that u3 supports that high aperture sizes but it
|
||||
* would strange if it did not :)
|
||||
*/
|
||||
static struct aper_size_info_32 u3_sizes[8] =
|
||||
static const struct aper_size_info_32 u3_sizes[8] =
|
||||
{
|
||||
{512, 131072, 7, 128},
|
||||
{256, 65536, 6, 64},
|
||||
@ -489,7 +489,7 @@ static struct aper_size_info_32 u3_sizes[8] =
|
||||
{4, 1024, 0, 1}
|
||||
};
|
||||
|
||||
struct agp_bridge_driver uninorth_agp_driver = {
|
||||
struct const agp_bridge_driver uninorth_agp_driver = {
|
||||
.owner = THIS_MODULE,
|
||||
.aperture_sizes = (void *)uninorth_sizes,
|
||||
.size_type = U32_APER_SIZE,
|
||||
@ -514,7 +514,7 @@ struct agp_bridge_driver uninorth_agp_driver = {
|
||||
.cant_use_aperture = 1,
|
||||
};
|
||||
|
||||
struct agp_bridge_driver u3_agp_driver = {
|
||||
struct const agp_bridge_driver u3_agp_driver = {
|
||||
.owner = THIS_MODULE,
|
||||
.aperture_sizes = (void *)u3_sizes,
|
||||
.size_type = U32_APER_SIZE,
|
||||
|
@ -89,7 +89,7 @@ static void via_tlbflush(struct agp_memory *mem)
|
||||
}
|
||||
|
||||
|
||||
static struct aper_size_info_8 via_generic_sizes[9] =
|
||||
static const struct aper_size_info_8 via_generic_sizes[9] =
|
||||
{
|
||||
{256, 65536, 6, 0},
|
||||
{128, 32768, 5, 128},
|
||||
@ -170,7 +170,7 @@ static void via_tlbflush_agp3(struct agp_memory *mem)
|
||||
}
|
||||
|
||||
|
||||
static struct agp_bridge_driver via_agp3_driver = {
|
||||
static const struct agp_bridge_driver via_agp3_driver = {
|
||||
.owner = THIS_MODULE,
|
||||
.aperture_sizes = agp3_generic_sizes,
|
||||
.size_type = U8_APER_SIZE,
|
||||
@ -194,7 +194,7 @@ static struct agp_bridge_driver via_agp3_driver = {
|
||||
.agp_type_to_mask_type = agp_generic_type_to_mask_type,
|
||||
};
|
||||
|
||||
static struct agp_bridge_driver via_driver = {
|
||||
static const struct agp_bridge_driver via_driver = {
|
||||
.owner = THIS_MODULE,
|
||||
.aperture_sizes = via_generic_sizes,
|
||||
.size_type = U8_APER_SIZE,
|
||||
|
Loading…
Reference in New Issue
Block a user